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authorHemant Kumar <hemantk@codeaurora.org>2017-01-27 14:51:07 -0800
committerHemant Kumar <hemantk@codeaurora.org>2017-02-01 11:39:10 -0800
commit3796885dba3051fe15e09085cdd68f4f5651802f (patch)
tree247c86973fa2c5694de864981c2120d76634560d
parent314869eb56763d34f91d5483b0d510267894fadd (diff)
usb: dwc3: Prevent pipe_PowerDown transition during U1 exit
During U1 exit, the controller might send LFPS ping at the same time when the P1 to P0 transition occurs(GUSB3PIPECTL[27] = '0'). The de-assertion of the pipe_TxElecIdle signal during the pipe_PowerDown signal transition violates the PIPE specification. Fix this by setting GUSB3PIPECTL[27] = '1' so that there is no pipe_PowerDown transition during U1 exit. This fix is applicable for DWC3 revision 3.10 or older. Change-Id: I7708d42c0f8b67d315be59e9ff9f04ccb74b9b5c Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
-rw-r--r--drivers/usb/dwc3/core.c5
-rw-r--r--drivers/usb/dwc3/core.h2
2 files changed, 7 insertions, 0 deletions
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 5aae319198fa..4553650390fb 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -178,6 +178,11 @@ static int dwc3_core_reset(struct dwc3 *dwc)
reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
reg &= ~DWC3_GUSB3PIPECTL_DELAYP1TRANS;
+
+ /* core exits U1/U2/U3 only in PHY power state P1/P2/P3 respectively */
+ if (dwc->revision <= DWC3_REVISION_310A)
+ reg |= DWC3_GUSB3PIPECTL_UX_EXIT_IN_PX;
+
dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
dwc3_notify_event(dwc, DWC3_CONTROLLER_RESET_EVENT, 0);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index c2cdfd1a823b..c3c494b804f4 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -213,6 +213,7 @@
/* Global USB3 PIPE Control Register */
#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
#define DWC3_GUSB3PIPECTL_U2SSINP3OK (1 << 29)
+#define DWC3_GUSB3PIPECTL_UX_EXIT_IN_PX (1 << 27)
#define DWC3_GUSB3PIPECTL_REQP1P2P3 (1 << 24)
#define DWC3_GUSB3PIPECTL_DEP1P2P3(n) ((n) << 19)
#define DWC3_GUSB3PIPECTL_DEP1P2P3_MASK DWC3_GUSB3PIPECTL_DEP1P2P3(7)
@@ -917,6 +918,7 @@ struct dwc3 {
#define DWC3_REVISION_260A 0x5533260a
#define DWC3_REVISION_270A 0x5533270a
#define DWC3_REVISION_280A 0x5533280a
+#define DWC3_REVISION_310A 0x5533310a
/*
* NOTICE: we're using bit 31 as a "is usb 3.1" flag. This is really