diff options
| author | Venkat Gopalakrishnan <venkatg@codeaurora.org> | 2016-10-25 16:22:04 -0700 |
|---|---|---|
| committer | Venkat Gopalakrishnan <venkatg@codeaurora.org> | 2016-11-04 15:13:10 -0700 |
| commit | 359e6bb764a5efa6456c7baabf6f4dc326ad7efc (patch) | |
| tree | 63d437d6a3ad150d3a535fab0fae79e19a48530f | |
| parent | 758693b4a6d94a0724081578d24f6ba1cc449255 (diff) | |
ARM: dts: msm: update bus bandwidth vote for msmcobalt ufs
The bandwidth vote determines the bus throughput needed for a
given running UFS gear frequency. For high throughput use cases
the current interface speed based votes may not be sufficient to
achieve peak user level throughput, as it doesn't count for other
system level latencies in the data path. Hence vote higher but
making sure the system stays in nominal voltage corner.
Change-Id: I95cda7e33288df7099826b37c2f436c5a33792e8
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt.dtsi | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index b58e2d2c7cc6..3ad4b6b5622d 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -1788,6 +1788,16 @@ qcom,msm-bus,num-cases = <22>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = + /* + * During HS G3 UFS runs at nominal voltage corner, vote + * higher bandwidth to push other buses in the data path + * to run at nominal to achieve max throughput. + * 4GBps pushes BIMC to run at nominal. + * 200MBps pushes CNOC to run at nominal. + * Vote for half of this bandwidth for HS G3 1-lane. + * For max bandwidth, vote high enough to push the buses + * to run in turbo voltage corner. + */ <95 512 0 0>, <1 650 0 0>, /* No vote */ <95 512 922 0>, <1 650 1000 0>, /* PWM G1 */ <95 512 1844 0>, <1 650 1000 0>, /* PWM G2 */ @@ -1799,17 +1809,17 @@ <95 512 14752 0>, <1 650 1000 0>, /* PWM G4 L2 */ <95 512 127796 0>, <1 650 1000 0>, /* HS G1 RA */ <95 512 255591 0>, <1 650 1000 0>, /* HS G2 RA */ - <95 512 511181 0>, <1 650 1000 0>, /* HS G3 RA */ + <95 512 2097152 0>, <1 650 102400 0>, /* HS G3 RA */ <95 512 255591 0>, <1 650 1000 0>, /* HS G1 RA L2 */ <95 512 511181 0>, <1 650 1000 0>, /* HS G2 RA L2 */ - <95 512 1022362 0>, <1 650 1000 0>, /* HS G3 RA L2 */ + <95 512 4194304 0>, <1 650 204800 0>, /* HS G3 RA L2 */ <95 512 149422 0>, <1 650 1000 0>, /* HS G1 RB */ <95 512 298189 0>, <1 650 1000 0>, /* HS G2 RB */ - <95 512 596378 0>, <1 650 1000 0>, /* HS G3 RB */ + <95 512 2097152 0>, <1 650 102400 0>, /* HS G3 RB */ <95 512 298189 0>, <1 650 1000 0>, /* HS G1 RB L2 */ <95 512 596378 0>, <1 650 1000 0>, /* HS G2 RB L2 */ - <95 512 1192756 0>, <1 650 1000 0>, /* HS G3 RB L2 */ - <95 512 4096000 0>, <1 650 1000 0>; /* Max. bandwidth */ + <95 512 4194304 0>, <1 650 204800 0>, /* HS G3 RB L2 */ + <95 512 7643136 0>, <1 650 307200 0>; /* Max. bandwidth */ qcom,bus-vector-names = "MIN", "PWM_G1_L1", "PWM_G2_L1", "PWM_G3_L1", "PWM_G4_L1", "PWM_G1_L2", "PWM_G2_L2", "PWM_G3_L2", "PWM_G4_L2", |