diff options
| author | Rahul Shahare <rshaha@codeaurora.org> | 2019-04-16 13:37:26 +0530 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2019-05-05 21:53:17 -0700 |
| commit | 32ebd2b51c3a8c5421ea0bb0cbed05b34101d5e2 (patch) | |
| tree | 3a1f271abf89c1600095d48f0e7792b2a65be706 | |
| parent | f4d62ca185dd067aec1a6ebf14375abfb95aa935 (diff) | |
ARM: dts: msm: Add "qcom,core-dev-table" for msm8996 target
This will enable memlat_cpu0 & msmlat_cpu2.
The governor expects a "qcom,core-dev-table" table as part of a given
memlat hardware monitor's device tree node.
This table is read upon registration of the memlat governor. The table
is then used to determine the memory bandwidth vote corresponding to the
maximum of the core frequencies.
Change-Id: If2f3d86a830e8c2fcd341510e93eb32b41c18812
Signed-off-by: Rahul Shahare <rshaha@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msm8996.dtsi | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom/msm8996.dtsi b/arch/arm/boot/dts/qcom/msm8996.dtsi index b11458580b09..593b227d540f 100644 --- a/arch/arm/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996.dtsi @@ -652,14 +652,25 @@ compatible = "qcom,arm-memlat-mon"; qcom,cpulist = <&CPU0 &CPU1>; qcom,target-dev = <&memlat_cpu0>; - status = "disabled"; + qcom,core-dev-table = + < 307200 1525>, + < 537600 3509>, + < 691200 4066>, + < 768000 5928>; }; qcom,arm-memlat-mon-2 { compatible = "qcom,arm-memlat-mon"; qcom,cpulist = <&CPU2 &CPU3>; qcom,target-dev = <&memlat_cpu2>; - status = "disabled"; + qcom,core-dev-table = + < 307200 1525>, + < 825600 3509>, + < 1209600 4066>, + < 1440000 7904>, + < 1747200 9887>, + < 2054400 11863>, + < 2342400 13763>; }; devfreq_cpufreq: devfreq-cpufreq { |