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authorRakesh Sunki <rsunki@qca.qualcomm.com>2015-12-10 15:11:19 -0800
committerAkash Patel <akashp@codeaurora.org>2016-02-17 15:20:53 -0800
commit30de2f1e488e5467e938f427c9b647c542469d18 (patch)
treea50f44df68b8e7f46f57c41b826332a21134af07
parent3e502cb8f8832fa5d9eb3c8b1735595ed7106a4b (diff)
qcacld-3.0: SAP DFS-3 Feature support in WMA
Adding support for parsing the WMI_PHYERR_EVENTID for DFS-3 in WMA event handler. Configure the hw board id to DFS module fetched from the wmi service ready event. Change-Id: I003fab790c7f46b54e5d41bcf1bbfa16f0cdc722 CRs-Fixed: 964262
-rw-r--r--core/wma/inc/wma_dfs_interface.h17
-rw-r--r--core/wma/inc/wma_internal.h11
-rw-r--r--core/wma/src/wma_features.c52
-rw-r--r--core/wma/src/wma_main.c1
4 files changed, 74 insertions, 7 deletions
diff --git a/core/wma/inc/wma_dfs_interface.h b/core/wma/inc/wma_dfs_interface.h
index 5783ed454642..27fa5b4fe31a 100644
--- a/core/wma/inc/wma_dfs_interface.h
+++ b/core/wma/inc/wma_dfs_interface.h
@@ -103,6 +103,9 @@
/* In case of VHT160, we can have 8 20Mhz channels */
#define IEE80211_MAX_20M_SUB_CH 8
+#define WMA_DFS2_PHYERROR_CODE 0x5
+#define WMA_DFS2_FALSE_RADAR_EXT 0x24
+
/**
* struct dfs_ieee80211_channel - channel info
* @ic_freq: frequency in MHz
@@ -169,6 +172,19 @@ struct ieee80211_dfs_state {
};
/**
+ * enum DFS_HWBD_ID - Board ID to differentiate between DFS-2 and DFS-3
+ * @DFS_HWBD_NONE: No hw board information/currently used for adreastea FPGA
+ * @DFS_HWBD_QCA6174: Rome(AR6320)
+ * @DFS_HWBD_QCA2582: Killer 1525
+ */
+typedef enum {
+ DFS_HWBD_NONE = 0,
+ DFS_HWBD_QCA6174 = 1,
+ DFS_HWBD_QCA2582 = 2,
+} DFS_HWBD_ID;
+
+
+/**
* struct ieee80211com - per device structure
* @ic_opmode: operation mode
* @ic_channels: ieee80211 channel list
@@ -239,6 +255,7 @@ typedef struct ieee80211com {
int32_t dfs_pri_multiplier;
cdf_spinlock_t chan_lock;
bool disable_phy_err_processing;
+ DFS_HWBD_ID dfs_hw_bd_id;
} IEEE80211COM, *PIEEE80211COM;
/**
diff --git a/core/wma/inc/wma_internal.h b/core/wma/inc/wma_internal.h
index ea192525f642..bf8b1dfafb84 100644
--- a/core/wma/inc/wma_internal.h
+++ b/core/wma/inc/wma_internal.h
@@ -77,8 +77,15 @@
#define MKK 0x40
#define ETSI 0x30
-/* Maximum Buffer length allowed for DFS phyerrors */
-#define DFS_MAX_BUF_LENGHT 4096
+/* Maximum Buffer length allowed for DFS-2 phyerrors */
+#define DFS_MAX_BUF_LENGTH 4096
+
+/*
+ * Maximum Buffer length allowed for DFS-3 phyerrors
+ * When 160MHz is supported the Max length of phyerrors
+ * is larger than the legacy phyerrors.
+ */
+#define DFS3_MAX_BUF_LENGTH 4436
#define WMI_DEFAULT_NOISE_FLOOR_DBM (-96)
diff --git a/core/wma/src/wma_features.c b/core/wma/src/wma_features.c
index 8c733ee6853b..689851376a1d 100644
--- a/core/wma/src/wma_features.c
+++ b/core/wma/src/wma_features.c
@@ -2181,10 +2181,12 @@ static int wma_unified_phyerr_rx_event_handler(void *handle,
cdf_size_t n;
A_UINT64 tsf64 = 0;
int phy_err_code = 0;
+ A_UINT32 phy_err_mask = 0;
int error = 0;
tpAniSirGlobal mac_ctx =
(tpAniSirGlobal)cds_get_context(CDF_MODULE_ID_PE);
bool enable_log = false;
+ int max_dfs_buf_length = 0;
if (NULL == mac_ctx) {
WMA_LOGE("%s: mac_ctx is NULL", __func__);
@@ -2211,10 +2213,19 @@ static int wma_unified_phyerr_rx_event_handler(void *handle,
__func__, sizeof(*pe_hdr), datalen);
return 0;
}
- if (pe_hdr->buf_len > DFS_MAX_BUF_LENGHT) {
+ /*
+ * The max buffer lenght is larger for DFS-3 than DFS-2.
+ * So, accordingly use the correct max buffer size.
+ */
+ if (wma->hw_bd_id != WMI_HWBD_QCA6174)
+ max_dfs_buf_length = DFS3_MAX_BUF_LENGTH;
+ else
+ max_dfs_buf_length = DFS_MAX_BUF_LENGTH;
+
+ if (pe_hdr->buf_len > max_dfs_buf_length) {
WMA_LOGE("%s: Received Invalid Phyerror event buffer length = %d"
"Maximum allowed buf length = %d", __func__,
- pe_hdr->buf_len, DFS_MAX_BUF_LENGHT);
+ pe_hdr->buf_len, max_dfs_buf_length);
return 0;
}
@@ -2228,6 +2239,21 @@ static int wma_unified_phyerr_rx_event_handler(void *handle,
tsf64 |= (((uint64_t) pe_hdr->tsf_u32) << 32);
/*
+ * Check the HW board ID to figure out
+ * if DFS-3 is supported. In DFS-3
+ * phyerror mask indicates the type of
+ * phyerror, whereas in DFS-2 phyerrorcode
+ * indicates the type of phyerror. If the
+ * board is NOT WMI_HWBD_QCA6174, for now
+ * assume that it supports DFS-3.
+ */
+ if (wma->hw_bd_id != WMI_HWBD_QCA6174) {
+ phy_err_mask = pe_hdr->rsPhyErrMask0;
+ WMA_LOGD("%s: DFS-3 phyerror mask = 0x%x",
+ __func__, phy_err_mask);
+ }
+
+ /*
* Loop over the bufp, extracting out phyerrors
* wmi_unified_comb_phyerr_rx_event.bufp is a char pointer,
* which isn't correct here - what we have received here
@@ -2271,14 +2297,30 @@ static int wma_unified_phyerr_rx_event_handler(void *handle,
error = 1;
break;
}
- phy_err_code = WMI_UNIFIED_PHYERRCODE_GET(&ev->hdr);
+ /*
+ * If the board id is WMI_HWBD_QCA6174
+ * then it supports only DFS-2. So, fetch
+ * phyerror code in order to know the type
+ * of phyerror.
+ */
+ if (wma->hw_bd_id == WMI_HWBD_QCA6174) {
+ phy_err_code = WMI_UNIFIED_PHYERRCODE_GET(&ev->hdr);
+ WMA_LOGD("%s: DFS-2 phyerror code = 0x%x",
+ __func__, phy_err_code);
+ }
/*
- * If the phyerror category matches,
+ * phy_err_code is set for DFS-2 and phy_err_mask
+ * is set for DFS-3. Checking both to support
+ * compatability for older platforms.
+ * If the phyerror or phyerrmask category matches,
* pass radar events to the dfs pattern matching code.
* Don't pass radar events with no buffer payload.
*/
- if (phy_err_code == 0x5 || phy_err_code == 0x24) {
+ if (((phy_err_mask & WMI_PHY_ERROR_MASK0_RADAR) ||
+ (phy_err_mask & WMI_PHY_ERROR_MASK0_FALSE_RADAR_EXT)) ||
+ (phy_err_code == WMA_DFS2_PHYERROR_CODE ||
+ phy_err_code == WMA_DFS2_FALSE_RADAR_EXT)) {
if (ev->hdr.buf_len > 0) {
/* Calling in to the DFS module to process the phyerr */
dfs_process_phyerr(ic, &ev->bufp[0],
diff --git a/core/wma/src/wma_main.c b/core/wma/src/wma_main.c
index 815fbd9c964c..5ca415c0ccf0 100644
--- a/core/wma/src/wma_main.c
+++ b/core/wma/src/wma_main.c
@@ -3815,6 +3815,7 @@ void wma_rx_service_ready_event(WMA_HANDLE handle, void *cmd_param_info)
sizeof(wma_handle->hw_bd_info));
WMA_LOGE("%s: Board version is unknown!", __func__);
}
+ wma_handle->dfs_ic->dfs_hw_bd_id = wma_handle->hw_bd_id;
/* TODO: Recheck below line to dump service ready event */
/* dbg_print_wmi_service_11ac(ev); */