summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAravind Venkateswaran <aravindh@codeaurora.org>2016-05-26 14:23:48 -0700
committerKyle Yan <kyan@codeaurora.org>2016-05-31 15:23:52 -0700
commit2fcd240ed3cd80a5ee38ef599033e21e99772e2c (patch)
tree50897da4e1cbd6bc45262213ea662da6575a749a
parent350c68c1244f3ca8129770e7d707e64f1621bfae (diff)
ARM: dts: msm: add mnoc_ahb clock for DSI device on msmcobalt
mnoc_ahb clock should be enabled prior to enabling the mdss_ahb clock for any register access in the DSI domain. Change-Id: I19bd72aebd9f82596dc04fe4b3179c81ab3c162d Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
-rw-r--r--arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi
index 9b1cc2fcfebc..7ff5153f5bc7 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi
@@ -287,6 +287,7 @@
qcom,timing-db-mode;
clocks = <&clock_mmss clk_mmss_mdss_mdp_clk>,
+ <&clock_mmss clk_mmss_mnoc_ahb_clk>,
<&clock_mmss clk_mmss_mdss_ahb_clk>,
<&clock_mmss clk_mmss_mdss_axi_clk>,
<&clock_mmss clk_ext_byte0_clk_src>,
@@ -294,7 +295,7 @@
<&clock_mmss clk_ext_pclk0_clk_src>,
<&clock_mmss clk_ext_pclk1_clk_src>;
clock-names = "mdp_core_clk",
- "iface_clk",
+ "mnoc_clk", "iface_clk",
"bus_clk",
"ext_byte0_clk", "ext_byte1_clk",
"ext_pixel0_clk", "ext_pixel1_clk";