diff options
| author | Neeraj Upadhyay <neeraju@codeaurora.org> | 2016-11-09 18:09:53 +0530 |
|---|---|---|
| committer | Neeraj Upadhyay <neeraju@codeaurora.org> | 2016-11-21 09:59:42 +0530 |
| commit | 2ce615a0360241ed18de55ab6a713fa01fb26156 (patch) | |
| tree | d3a2b03c8bcc26dd329c93692547da152202bd63 | |
| parent | df4eabb360ae1eeadabe02663a5770d0657bcfbe (diff) | |
ARM: dts: msm: Add restart node and imem entries for msmfalcon
Add restart node for msmfalcon. Additionally, add IMEM
entries for restart-reason, dload_type, and boot_stats.
Change-Id: I48e84889b0867d98d70056eecae07becebae4c00
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmfalcon.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi index e975645b8c47..5335d5be39ef 100644 --- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi +++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi @@ -265,6 +265,13 @@ qcom,summing-threshold = <0x10>; }; + restart@10ac000 { + compatible = "qcom,pshold"; + reg = <0x10ac000 0x4>, + <0x1fd3000 0x4>; + reg-names = "pshold-base", "tcsr-boot-misc-detect"; + }; + spmi_bus: qcom,spmi@800f000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x800f000 0x1000>, @@ -884,6 +891,21 @@ #address-cells = <1>; #size-cells = <1>; + dload_type@18 { + compatible = "qcom,msm-imem-dload-type"; + reg = <0x18 4>; + }; + + restart_reason@65c { + compatible = "qcom,msm-imem-restart_reason"; + reg = <0x65c 4>; + }; + + boot_stats@6b0 { + compatible = "qcom,msm-imem-boot_stats"; + reg = <0x6b0 32>; + }; + pil@94c { compatible = "qcom,msm-imem-pil"; reg = <0x94c 200>; |