diff options
| author | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-12-14 15:49:40 -0800 |
|---|---|---|
| committer | Vicky Wallace <vwallace@codeaurora.org> | 2017-01-19 17:08:08 -0800 |
| commit | 2a377eef4420a76a18d177bfcc5bab6fec7d10f4 (patch) | |
| tree | 5cf5c6b3dc3439ea58209a329594867536853a4a | |
| parent | 1f1d94408446043289fe0126897f98af2dce0ecd (diff) | |
clk: msm: Update the frequency table for csiphy clock on MSMCOBALT v2
Add 274.29 MHz as a supported frequency for the csiphy_clk_src RCG
on MSMCOBALT v2.
Change-Id: I2eb5fc2cdce08c67f165be9094c88f454f0de4a1
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
| -rw-r--r-- | drivers/clk/msm/clock-mmss-8998.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/msm/clock-mmss-8998.c b/drivers/clk/msm/clock-mmss-8998.c index 2a112aad1fa3..eb543010c17b 100644 --- a/drivers/clk/msm/clock-mmss-8998.c +++ b/drivers/clk/msm/clock-mmss-8998.c @@ -527,6 +527,7 @@ static struct clk_freq_tbl ftbl_csiphy_clk_src[] = { static struct clk_freq_tbl ftbl_csiphy_clk_src_vq[] = { F_MM( 164570000, mmpll10_pll_out, 3.5, 0, 0), F_MM( 256000000, mmpll4_pll_out, 3, 0, 0), + F_MM( 274290000, mmpll7_pll_out, 3.5, 0, 0), F_MM( 300000000, mmsscc_gpll0, 2, 0, 0), F_MM( 384000000, mmpll4_pll_out, 2, 0, 0), F_END |