Merge "clk: qcom: Remove non-op BRANCH_HALT_NO_CHECK_ON_DISABLE flag"

4 files changed, 11 insertions, 18 deletions

diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c
index 0987c8e7f807..8aea1d519311 100644
--- a/drivers/clk/qcom/clk-branch.c
+++ b/drivers/clk/qcom/clk-branch.c
@@ -83,9 +83,6 @@ static int clk_branch_wait(const struct clk_branch *br, bool enabling,
 
 	if (br->halt_check == BRANCH_HALT_DELAY || (!enabling && voted)) {
 		udelay(10);
-	} else if ((br->halt_check == BRANCH_HALT_NO_CHECK_ON_DISABLE) &&
-								!enabling) {
-		return 0;
 	} else if (br->halt_check == BRANCH_HALT_ENABLE ||
 		   br->halt_check == BRANCH_HALT ||
 		   (enabling && voted)) {
diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h
index 331f58d651e5..8a934cf8bed1 100644
--- a/drivers/clk/qcom/clk-branch.h
+++ b/drivers/clk/qcom/clk-branch.h
@@ -42,10 +42,6 @@ struct clk_branch {
 #define BRANCH_HALT_ENABLE		1 /* pol: 0 = halt */
 #define BRANCH_HALT_ENABLE_VOTED	(BRANCH_HALT_ENABLE | BRANCH_VOTED)
 #define BRANCH_HALT_DELAY		2 /* No bit to check; just delay */
-/* No halt check during clk disable for the clocks controlled by other masters
- * via voting registers like SMMU clocks.
- */
-#define BRANCH_HALT_NO_CHECK_ON_DISABLE	4
 
 	struct clk_regmap clkr;
 };
diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index a7b8ac07e73a..0f39bf278cd4 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -1253,7 +1253,7 @@ static struct clk_branch gcc_mmss_noc_cfg_ahb_clk = {
 
 static struct clk_branch gcc_mmss_bimc_gfx_clk = {
 	.halt_reg = 0x9010,
-	.halt_check = BRANCH_HALT_NO_CHECK_ON_DISABLE,
+	.halt_check = BRANCH_VOTED,
 	.clkr = {
 		.enable_reg = 0x9010,
 		.enable_mask = BIT(0),
@@ -2692,7 +2692,7 @@ static struct clk_branch gcc_aggre0_cnoc_ahb_clk = {
 
 static struct clk_branch gcc_smmu_aggre0_axi_clk = {
 	.halt_reg = 0x81014,
-	.halt_check = BRANCH_HALT_NO_CHECK_ON_DISABLE,
+	.halt_check = BRANCH_VOTED,
 	.clkr = {
 		.enable_reg = 0x81014,
 		.enable_mask = BIT(0),
@@ -2717,7 +2717,7 @@ static struct clk_gate2 gcc_aggre0_noc_qosgen_extref_clk = {
 
 static struct clk_branch gcc_smmu_aggre0_ahb_clk = {
 	.halt_reg = 0x81018,
-	.halt_check = BRANCH_HALT_NO_CHECK_ON_DISABLE,
+	.halt_check = BRANCH_VOTED,
 	.clkr = {
 		.enable_reg = 0x81018,
 		.enable_mask = BIT(0),
@@ -2871,7 +2871,7 @@ static struct clk_branch gcc_rx1_usb2_clkref_clk = {
 
 static struct clk_branch hlos1_vote_lpass_core_smmu_clk = {
 	.halt_reg = 0x7d010,
-	.halt_check = BRANCH_HALT_NO_CHECK_ON_DISABLE,
+	.halt_check = BRANCH_VOTED,
 	.clkr = {
 		.enable_reg = 0x7d010,
 		.enable_mask = BIT(0),
@@ -2884,7 +2884,7 @@ static struct clk_branch hlos1_vote_lpass_core_smmu_clk = {
 
 static struct clk_branch hlos1_vote_lpass_adsp_smmu_clk = {
 	.halt_reg = 0x7d014,
-	.halt_check = BRANCH_HALT_NO_CHECK_ON_DISABLE,
+	.halt_check = BRANCH_VOTED,
 	.clkr = {
 		.enable_reg = 0x7d014,
 		.enable_mask = BIT(0),
diff --git a/drivers/clk/qcom/gcc-msmfalcon.c b/drivers/clk/qcom/gcc-msmfalcon.c
index 2cbc9dff047b..42b91d70aa54 100644
--- a/drivers/clk/qcom/gcc-msmfalcon.c
+++ b/drivers/clk/qcom/gcc-msmfalcon.c
@@ -1173,7 +1173,7 @@ static struct clk_branch gcc_aggre2_usb3_axi_clk = {
 
 static struct clk_branch gcc_bimc_gfx_clk = {
 	.halt_reg = 0x7106c,
-	.halt_check = BRANCH_HALT_NO_CHECK_ON_DISABLE,
+	.halt_check = BRANCH_VOTED,
 	.clkr = {
 		.enable_reg = 0x7106c,
 		.enable_mask = BIT(0),
@@ -1711,7 +1711,7 @@ static struct clk_branch gcc_gp3_clk = {
 
 static struct clk_branch gcc_gpu_bimc_gfx_clk = {
 	.halt_reg = 0x71010,
-	.halt_check = BRANCH_HALT_NO_CHECK_ON_DISABLE,
+	.halt_check = BRANCH_VOTED,
 	.clkr = {
 		.enable_reg = 0x71010,
 		.enable_mask = BIT(0),
@@ -1737,7 +1737,7 @@ static struct clk_branch gcc_gpu_bimc_gfx_src_clk = {
 
 static struct clk_branch gcc_gpu_cfg_ahb_clk = {
 	.halt_reg = 0x71004,
-	.halt_check = BRANCH_HALT_NO_CHECK_ON_DISABLE,
+	.halt_check = BRANCH_VOTED,
 	.clkr = {
 		.enable_reg = 0x71004,
 		.enable_mask = BIT(0),
@@ -2516,7 +2516,7 @@ static struct clk_branch gcc_usb_phy_cfg_ahb2phy_clk = {
 
 static struct clk_branch hlos1_vote_lpass_adsp_smmu_clk = {
 	.halt_reg = 0x7d014,
-	.halt_check = BRANCH_HALT_NO_CHECK_ON_DISABLE,
+	.halt_check = BRANCH_VOTED,
 	.clkr = {
 		.enable_reg = 0x7d014,
 		.enable_mask = BIT(0),
@@ -2529,7 +2529,7 @@ static struct clk_branch hlos1_vote_lpass_adsp_smmu_clk = {
 
 static struct clk_branch hlos1_vote_turing_adsp_smmu_clk = {
 	.halt_reg = 0x7d048,
-	.halt_check = BRANCH_HALT_NO_CHECK_ON_DISABLE,
+	.halt_check = BRANCH_VOTED,
 	.clkr = {
 		.enable_reg = 0x7d048,
 		.enable_mask = BIT(0),
@@ -2542,7 +2542,7 @@ static struct clk_branch hlos1_vote_turing_adsp_smmu_clk = {
 
 static struct clk_branch hlos2_vote_turing_adsp_smmu_clk = {
 	.halt_reg = 0x7e048,
-	.halt_check = BRANCH_HALT_NO_CHECK_ON_DISABLE,
+	.halt_check = BRANCH_VOTED,
 	.clkr = {
 		.enable_reg = 0x7e048,
 		.enable_mask = BIT(0),