diff options
| author | Linux Build Service Account <lnxbuild@localhost> | 2016-09-13 05:43:52 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2016-09-13 05:43:51 -0700 |
| commit | 212c5900df410a9cb7d2f4d658bfafcedc7cecb6 (patch) | |
| tree | ebef9a9718bd85234626e62a8e168ba310b52b08 | |
| parent | 48e1a69c5f3147aabc067dac515f75d32921fcd9 (diff) | |
| parent | f795f9a639c668e20d55e8e27a21845810d5c200 (diff) | |
Merge "ARM: dts: msm: enable aggre1 ufs hw ctl clock for msmcobalt"
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index aa27d96659e2..cd01d5158fc4 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -1732,7 +1732,7 @@ "rx_lane0_sync_clk"; clocks = <&clock_gcc clk_gcc_ufs_axi_hw_ctl_clk>, - <&clock_gcc clk_gcc_aggre1_ufs_axi_clk>, + <&clock_gcc clk_gcc_aggre1_ufs_axi_hw_ctl_clk>, <&clock_gcc clk_gcc_ufs_ahb_clk>, <&clock_gcc clk_gcc_ufs_unipro_core_hw_ctl_clk>, <&clock_gcc clk_gcc_ufs_ice_core_hw_ctl_clk>, |