summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorShashank Mittal <mittals@codeaurora.org>2016-03-09 16:46:34 -0800
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-25 16:04:15 -0700
commit1f99478c12c44dcf64a52164e833bfddf95a42e2 (patch)
tree1ed13a4022dcecaafbcd2cee3d7d7f86baef5361
parent22867419a7443b231b2943f9cc7e5d986138cf76 (diff)
coresight-etm4x: use trace ids starting 0x1 for ETMs devices
ETM parser expects ETM trace ids starting from 0x1. This change fixes the start of ETM trace id to make it compatible with ETM parser. Change-Id: Icc5c6de317468b845448dae22a447e8b9a82ea54 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
-rw-r--r--drivers/hwtracing/coresight/coresight-etm4x.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 12118ace4b44..f47cd00d0f1b 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -2543,11 +2543,9 @@ static void etm4_init_default_data(struct etmv4_drvdata *drvdata)
drvdata->vmid_mask1 = 0x0;
/*
- * A trace ID value of 0 is invalid, so let's start at some
- * random value that fits in 7 bits. ETMv3.x has 0x10 so let's
- * start at 0x20.
+ * Start trace id from 0x1.
*/
- drvdata->trcid = 0x20 + drvdata->cpu;
+ drvdata->trcid = 0x1 + drvdata->cpu;
}
static int etm4_late_init(struct etmv4_drvdata *drvdata)