Merge "msm: mdss: dp: fix parity byte calculation"

7 files changed, 152 insertions, 72 deletions

diff --git a/arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi b/arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi
index 5685e9041fe4..645f9c2c083c 100644
--- a/arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi
+++ b/arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi
@@ -1508,7 +1508,7 @@
 		mdss_dp_usbplug_cc_active: mdss_dp_usbplug_cc_active {
 			mux {
 				pins = "gpio38";
-				function = "usb_phy";
+				function = "gpio";
 			};
 
 			config {
@@ -1521,7 +1521,7 @@
 		mdss_dp_usbplug_cc_suspend: mdss_dp_usbplug_cc_suspend {
 			mux {
 				pins = "gpio38";
-				function = "usb_phy";
+				function = "gpio";
 			};
 
 			config {
diff --git a/drivers/clk/msm/mdss/mdss-dp-pll-8998-util.c b/drivers/clk/msm/mdss/mdss-dp-pll-8998-util.c
index af89610f8c65..c13ff563c8bf 100644
--- a/drivers/clk/msm/mdss/mdss-dp-pll-8998-util.c
+++ b/drivers/clk/msm/mdss/mdss-dp-pll-8998-util.c
@@ -29,6 +29,8 @@ int link2xclk_divsel_set_div(struct div_clk *clk, int div)
 	int rc;
 	u32 link2xclk_div_tx0, link2xclk_div_tx1;
 	u32 phy_mode;
+	u8 orientation;
+	u32 spare_value;
 	struct mdss_pll_resources *dp_res = clk->priv;
 
 	rc = mdss_pll_resource_enable(dp_res, true);
@@ -37,6 +39,11 @@ int link2xclk_divsel_set_div(struct div_clk *clk, int div)
 		return rc;
 	}
 
+	spare_value = MDSS_PLL_REG_R(dp_res->phy_base, DP_PHY_SPARE0);
+	orientation = (spare_value & 0xF0) >> 4;
+	pr_debug("spare_value=0x%x, orientation=0x%x\n", spare_value,
+			orientation);
+
 	link2xclk_div_tx0 = MDSS_PLL_REG_R(dp_res->phy_base,
 				QSERDES_TX0_OFFSET + TXn_TX_BAND);
 	link2xclk_div_tx1 = MDSS_PLL_REG_R(dp_res->phy_base,
@@ -49,8 +56,12 @@ int link2xclk_divsel_set_div(struct div_clk *clk, int div)
 	link2xclk_div_tx0 |= 0x4;
 	link2xclk_div_tx1 |= 0x4;
 
-	/*configure DP PHY MODE */
-	phy_mode = 0x58;
+	/* Configure DP PHY MODE depending on the plug orientation */
+	if (orientation == ORIENTATION_CC2)
+		phy_mode = 0x48;
+	else
+		phy_mode = 0x58;
+
 
 	MDSS_PLL_REG_W(dp_res->phy_base,
 			QSERDES_TX0_OFFSET + TXn_TX_BAND,
@@ -334,11 +345,9 @@ int dp_config_vco_rate(struct dp_pll_vco_clk *vco, unsigned long rate)
 	wmb();
 
 	if (orientation == ORIENTATION_CC2)
-		MDSS_PLL_REG_W(dp_res->phy_base,
-				DP_PHY_MODE, 0x48);
+		MDSS_PLL_REG_W(dp_res->phy_base, DP_PHY_MODE, 0x48);
 	else
-		MDSS_PLL_REG_W(dp_res->phy_base,
-				DP_PHY_MODE, 0x58);
+		MDSS_PLL_REG_W(dp_res->phy_base, DP_PHY_MODE, 0x58);
 
 	MDSS_PLL_REG_W(dp_res->phy_base,
 			DP_PHY_TX0_TX1_LANE_CTL, 0x05);
@@ -452,7 +461,7 @@ static int dp_pll_enable(struct clk *c)
 	struct dp_pll_vco_clk *vco = mdss_dp_to_vco_clk(c);
 	struct mdss_pll_resources *dp_res = vco->priv;
 	u8 orientation, ln_cnt;
-	u32 spare_value, bias_en, drvr_en;
+	u32 spare_value, bias_en, drvr_en, lane_mode;
 
 	spare_value = MDSS_PLL_REG_R(dp_res->phy_base, DP_PHY_SPARE0);
 	ln_cnt = spare_value & 0x0F;
@@ -562,12 +571,18 @@ static int dp_pll_enable(struct clk *c)
 	 */
 	wmb();
 
+	if (vco->rate == DP_VCO_HSCLK_RATE_2700MHZDIV1000)
+		lane_mode = 0xc6;
+	else
+		lane_mode = 0xf6;
+
 	MDSS_PLL_REG_W(dp_res->phy_base,
 			QSERDES_TX0_OFFSET + TXn_LANE_MODE_1,
-			0xf6);
+			lane_mode);
 	MDSS_PLL_REG_W(dp_res->phy_base,
 			QSERDES_TX1_OFFSET + TXn_LANE_MODE_1,
-			0xf6);
+			lane_mode);
+
 	MDSS_PLL_REG_W(dp_res->phy_base,
 			QSERDES_TX0_OFFSET + TXn_CLKBUF_ENABLE,
 			0x1f);
diff --git a/drivers/video/fbdev/msm/mdss_dp.c b/drivers/video/fbdev/msm/mdss_dp.c
index 132dc0e028ae..032f4ca38e50 100644
--- a/drivers/video/fbdev/msm/mdss_dp.c
+++ b/drivers/video/fbdev/msm/mdss_dp.c
@@ -711,7 +711,7 @@ static int mdss_dp_config_gpios(struct mdss_dp_drv_pdata *dp, bool enable)
 		}
 		if (gpio_is_valid(dp->aux_sel_gpio)) {
 			rc = gpio_direction_output(
-				dp->aux_sel_gpio, 0);
+				dp->aux_sel_gpio, dp->aux_sel_gpio_output);
 			if (rc)
 				pr_err("unable to set dir for aux_sel gpio\n");
 		}
@@ -1076,11 +1076,6 @@ static int mdss_dp_get_lane_mapping(struct mdss_dp_drv_pdata *dp,
 		lane_map->lane1 = 0;
 		lane_map->lane2 = 2;
 		lane_map->lane3 = 3;
-
-		if (gpio_is_valid(dp->usbplug_cc_gpio)) {
-			gpio_set_value(dp->usbplug_cc_gpio, 1);
-			pr_debug("Configured cc gpio for new Orientation\n");
-		}
 	}
 
 	pr_debug("lane0 = %d, lane1 = %d, lane2 =%d, lane3 =%d\n",
@@ -1196,7 +1191,6 @@ end:
 static int mdss_dp_on_irq(struct mdss_dp_drv_pdata *dp_drv)
 {
 	int ret = 0;
-	enum plug_orientation orientation = ORIENTATION_NONE;
 	struct lane_mapping ln_map;
 
 	/* wait until link training is completed */
@@ -1210,15 +1204,14 @@ static int mdss_dp_on_irq(struct mdss_dp_drv_pdata *dp_drv)
 
 		mutex_lock(&dp_drv->train_mutex);
 
-		orientation = usbpd_get_plug_orientation(dp_drv->pd);
-		pr_debug("plug orientation = %d\n", orientation);
-
-		ret = mdss_dp_get_lane_mapping(dp_drv, orientation, &ln_map);
+		ret = mdss_dp_get_lane_mapping(dp_drv, dp_drv->orientation,
+				&ln_map);
 		if (ret)
 			goto exit;
 
 		mdss_dp_phy_share_lane_config(&dp_drv->phy_io,
-				orientation, dp_drv->dpcd.max_lane_count);
+				dp_drv->orientation,
+				dp_drv->dpcd.max_lane_count);
 
 		ret = mdss_dp_enable_mainlink_clocks(dp_drv);
 		if (ret)
@@ -1247,7 +1240,6 @@ exit:
 int mdss_dp_on_hpd(struct mdss_dp_drv_pdata *dp_drv)
 {
 	int ret = 0;
-	enum plug_orientation orientation = ORIENTATION_NONE;
 	struct lane_mapping ln_map;
 
 	/* wait until link training is completed */
@@ -1267,10 +1259,7 @@ int mdss_dp_on_hpd(struct mdss_dp_drv_pdata *dp_drv)
 	}
 	mdss_dp_hpd_configure(&dp_drv->ctrl_io, true);
 
-	orientation = usbpd_get_plug_orientation(dp_drv->pd);
-	pr_debug("plug Orientation = %d\n", orientation);
-
-	ret = mdss_dp_get_lane_mapping(dp_drv, orientation, &ln_map);
+	ret = mdss_dp_get_lane_mapping(dp_drv, dp_drv->orientation, &ln_map);
 	if (ret)
 		goto exit;
 
@@ -1289,8 +1278,8 @@ int mdss_dp_on_hpd(struct mdss_dp_drv_pdata *dp_drv)
 		goto exit;
 	}
 
-	mdss_dp_phy_share_lane_config(&dp_drv->phy_io,
-			orientation, dp_drv->dpcd.max_lane_count);
+	mdss_dp_phy_share_lane_config(&dp_drv->phy_io, dp_drv->orientation,
+			dp_drv->dpcd.max_lane_count);
 
 	pr_debug("link_rate = 0x%x\n", dp_drv->link_rate);
 
@@ -1478,6 +1467,12 @@ static int mdss_dp_notify_clients(struct mdss_dp_drv_pdata *dp, bool enable)
 	return mdss_dp_send_cable_notification(dp, enable);
 }
 
+static void mdss_dp_set_default_resolution(struct mdss_dp_drv_pdata *dp)
+{
+	hdmi_edid_set_video_resolution(dp->panel_data.panel_info.edid_data,
+			DEFAULT_VIDEO_RESOLUTION, true);
+}
+
 static int mdss_dp_edid_init(struct mdss_panel_data *pdata)
 {
 	struct mdss_dp_drv_pdata *dp_drv = NULL;
@@ -1512,6 +1507,8 @@ static int mdss_dp_edid_init(struct mdss_panel_data *pdata)
 	dp_drv->edid_buf = edid_init_data.buf;
 	dp_drv->edid_buf_size = edid_init_data.buf_size;
 
+	mdss_dp_set_default_resolution(dp_drv);
+
 	return 0;
 }
 
@@ -1532,12 +1529,22 @@ static int mdss_dp_host_init(struct mdss_panel_data *pdata)
 		pr_err("%s: host init done already\n", __func__);
 		return 0;
 	}
+
 	ret = mdss_dp_regulator_ctrl(dp_drv, true);
 	if (ret) {
 		pr_err("failed to enable regulators\n");
 		goto vreg_error;
 	}
 
+	dp_drv->orientation = usbpd_get_plug_orientation(dp_drv->pd);
+
+	dp_drv->aux_sel_gpio_output = 0;
+	if (dp_drv->orientation == ORIENTATION_CC2)
+		dp_drv->aux_sel_gpio_output = 1;
+
+	pr_debug("orientation = %d, aux_sel_gpio_output = %d\n",
+			dp_drv->orientation, dp_drv->aux_sel_gpio_output);
+
 	mdss_dp_pinctrl_set_state(dp_drv, true);
 	mdss_dp_config_gpios(dp_drv, true);
 
@@ -1559,9 +1566,6 @@ static int mdss_dp_host_init(struct mdss_panel_data *pdata)
 	       mdss_dp_get_ctrl_hw_version(&dp_drv->ctrl_io),
 	       mdss_dp_get_phy_hw_version(&dp_drv->phy_io));
 
-	pr_debug("plug Orientation = %d\n",
-			usbpd_get_plug_orientation(dp_drv->pd));
-
 	mdss_dp_phy_aux_setup(&dp_drv->phy_io);
 
 	mdss_dp_irq_enable(dp_drv);
@@ -1569,8 +1573,11 @@ static int mdss_dp_host_init(struct mdss_panel_data *pdata)
 	mdss_dp_dpcd_cap_read(dp_drv);
 
 	ret = mdss_dp_edid_read(dp_drv);
-	if (ret)
+	if (ret) {
+		pr_info("edid read error, setting default resolution\n");
+		mdss_dp_set_default_resolution(dp_drv);
 		goto edid_error;
+	}
 
 	pr_debug("edid_read success. buf_size=%d\n",
 				dp_drv->edid_buf_size);
@@ -1581,14 +1588,13 @@ static int mdss_dp_host_init(struct mdss_panel_data *pdata)
 		goto edid_error;
 	}
 
+edid_error:
 	mdss_dp_update_cable_status(dp_drv, true);
 	mdss_dp_notify_clients(dp_drv, true);
 	dp_drv->dp_initialized = true;
 
 	return ret;
 
-edid_error:
-	mdss_dp_clk_ctrl(dp_drv, DP_CORE_PM, false);
 clk_error:
 	mdss_dp_regulator_ctrl(dp_drv, false);
 	mdss_dp_config_gpios(dp_drv, false);
diff --git a/drivers/video/fbdev/msm/mdss_dp.h b/drivers/video/fbdev/msm/mdss_dp.h
index dc84694f2238..00869e74d4ea 100644
--- a/drivers/video/fbdev/msm/mdss_dp.h
+++ b/drivers/video/fbdev/msm/mdss_dp.h
@@ -39,11 +39,6 @@
 #define EDP_PORT_MAX		1
 #define EDP_SINK_CAP_LEN	16
 
-#define EDP_AUX_ERR_NONE	0
-#define EDP_AUX_ERR_ADDR	-1
-#define EDP_AUX_ERR_TOUT	-2
-#define EDP_AUX_ERR_NACK	-3
-
 /* 4 bits of aux command */
 #define EDP_CMD_AUX_WRITE	0x8
 #define EDP_CMD_AUX_READ	0x9
@@ -388,6 +383,7 @@ struct mdss_dp_drv_pdata {
 	struct platform_device *ext_pdev;
 
 	struct usbpd *pd;
+	enum plug_orientation orientation;
 	struct dp_hdcp hdcp;
 	struct usbpd_svid_handler svid_handler;
 	struct dp_alt_mode alt_mode;
@@ -438,6 +434,7 @@ struct mdss_dp_drv_pdata {
 	struct dss_module_power power_data[DP_MAX_PM];
 	struct dp_pinctrl_res pin_res;
 	int aux_sel_gpio;
+	int aux_sel_gpio_output;
 	int aux_en_gpio;
 	int usbplug_cc_gpio;
 	int hpd_gpio;
@@ -511,17 +508,52 @@ enum dp_lane_count {
 	DP_LANE_COUNT_4	= 4,
 };
 
+enum dp_aux_error {
+	EDP_AUX_ERR_NONE	= 0,
+	EDP_AUX_ERR_ADDR	= -1,
+	EDP_AUX_ERR_TOUT	= -2,
+	EDP_AUX_ERR_NACK	= -3,
+	EDP_AUX_ERR_DEFER	= -4,
+	EDP_AUX_ERR_NACK_DEFER	= -5,
+};
+
+static inline char *mdss_dp_get_aux_error(u32 aux_error)
+{
+	switch (aux_error) {
+	case EDP_AUX_ERR_NONE:
+		return DP_ENUM_STR(EDP_AUX_ERR_NONE);
+	case EDP_AUX_ERR_ADDR:
+		return DP_ENUM_STR(EDP_AUX_ERR_ADDR);
+	case EDP_AUX_ERR_TOUT:
+		return DP_ENUM_STR(EDP_AUX_ERR_TOUT);
+	case EDP_AUX_ERR_NACK:
+		return DP_ENUM_STR(EDP_AUX_ERR_NACK);
+	case EDP_AUX_ERR_DEFER:
+		return DP_ENUM_STR(EDP_AUX_ERR_DEFER);
+	case EDP_AUX_ERR_NACK_DEFER:
+		return DP_ENUM_STR(EDP_AUX_ERR_NACK_DEFER);
+	default:
+		return "unknown";
+	}
+}
+
 enum test_response {
-	TEST_NACK	= 0x0,
-	TEST_ACK	= 0x1,
+	TEST_ACK			= 0x1,
+	TEST_NACK			= 0x2,
+	TEST_EDID_CHECKSUM_WRITE	= 0x4,
 };
 
 static inline char *mdss_dp_get_test_response(u32 test_response)
 {
 	switch (test_response) {
-	case TEST_NACK:		return DP_ENUM_STR(TEST_NACK);
-	case TEST_ACK:		return DP_ENUM_STR(TEST_ACK);
-	default:		return "unknown";
+	case TEST_NACK:
+		return DP_ENUM_STR(TEST_NACK);
+	case TEST_ACK:
+		return DP_ENUM_STR(TEST_ACK);
+	case TEST_EDID_CHECKSUM_WRITE:
+		return DP_ENUM_STR(TEST_EDID_CHECKSUM_WRITE);
+	default:
+		return "unknown";
 	}
 }
 
diff --git a/drivers/video/fbdev/msm/mdss_dp_aux.c b/drivers/video/fbdev/msm/mdss_dp_aux.c
index b64518194926..b216506fe2a9 100644
--- a/drivers/video/fbdev/msm/mdss_dp_aux.c
+++ b/drivers/video/fbdev/msm/mdss_dp_aux.c
@@ -34,6 +34,9 @@
 #include "mdss_dp.h"
 #include "mdss_dp_util.h"
 
+static void dp_sink_parse_test_request(struct mdss_dp_drv_pdata *ep);
+static void dp_sink_parse_sink_count(struct mdss_dp_drv_pdata *ep);
+
 /*
  * edp buffer operation
  */
@@ -139,7 +142,6 @@ static int dp_cmd_fifo_tx(struct edp_buf *tp, unsigned char *base)
 		data &= 0x00ff00; /* index = 0, write */
 		if (cnt == 0)
 			data |= BIT(31);  /* INDEX_WRITE */
-		pr_debug("data=%x\n", data);
 		dp_write(base + DP_AUX_DATA, data);
 		cnt++;
 		dp++;
@@ -150,7 +152,6 @@ static int dp_cmd_fifo_tx(struct edp_buf *tp, unsigned char *base)
 		data |= BIT(8); /* I2C */
 
 	data |= BIT(9); /* GO */
-	pr_debug("data=%x\n", data);
 	dp_write(base + DP_AUX_TRANS_CTRL, data);
 
 	return tp->len;
@@ -173,7 +174,6 @@ static int dp_cmd_fifo_rx(struct edp_buf *rp, int len, unsigned char *base)
 	data = dp_read(base + DP_AUX_DATA);
 	for (i = 0; i < len; i++) {
 		data = dp_read(base + DP_AUX_DATA);
-		pr_debug("data=%x\n", data);
 		*dp++ = (char)((data >> 8) & 0xff);
 	}
 
@@ -196,9 +196,6 @@ static int dp_aux_write_cmds(struct mdss_dp_drv_pdata *ep,
 
 	cm = cmd;
 	while (cm) {
-		pr_debug("i2c=%d read=%d addr=%x len=%d next=%d\n",
-			cm->i2c, cm->read, cm->addr, cm->len,
-			cm->next);
 		ret = dp_buf_add_cmd(tp, cm);
 		if (ret <= 0)
 			break;
@@ -254,9 +251,6 @@ static int dp_aux_read_cmds(struct mdss_dp_drv_pdata *ep,
 	cm = cmds;
 	len = 0;
 	while (cm) {
-		pr_debug("i2c=%d read=%d addr=%x len=%d next=%d\n",
-			cm->i2c, cm->read, cm->addr, cm->len,
-			cm->next);
 		ret = dp_buf_add_cmd(tp, cm);
 		len += cm->len;
 		if (ret <= 0)
@@ -302,9 +296,6 @@ int dp_aux_read(void *ep, struct edp_cmd *cmds)
 
 void dp_aux_native_handler(struct mdss_dp_drv_pdata *ep, u32 isr)
 {
-
-	pr_debug("isr=%x\n", isr);
-
 	if (isr & EDP_INTR_AUX_I2C_DONE)
 		ep->aux_error_num = EDP_AUX_ERR_NONE;
 	else if (isr & EDP_INTR_WRONG_ADDR)
@@ -319,9 +310,6 @@ void dp_aux_native_handler(struct mdss_dp_drv_pdata *ep, u32 isr)
 
 void dp_aux_i2c_handler(struct mdss_dp_drv_pdata *ep, u32 isr)
 {
-
-	pr_debug("isr=%x\n", isr);
-
 	if (isr & EDP_INTR_AUX_I2C_DONE) {
 		if (isr & (EDP_INTR_I2C_NACK | EDP_INTR_I2C_DEFER))
 			ep->aux_error_num = EDP_AUX_ERR_NACK;
@@ -333,11 +321,11 @@ void dp_aux_i2c_handler(struct mdss_dp_drv_pdata *ep, u32 isr)
 		else if (isr & EDP_INTR_TIMEOUT)
 			ep->aux_error_num = EDP_AUX_ERR_TOUT;
 		if (isr & EDP_INTR_NACK_DEFER)
-			ep->aux_error_num = EDP_AUX_ERR_NACK;
+			ep->aux_error_num = EDP_AUX_ERR_NACK_DEFER;
 		if (isr & EDP_INTR_I2C_NACK)
 			ep->aux_error_num = EDP_AUX_ERR_NACK;
 		if (isr & EDP_INTR_I2C_DEFER)
-			ep->aux_error_num = EDP_AUX_ERR_NACK;
+			ep->aux_error_num = EDP_AUX_ERR_DEFER;
 	}
 
 	complete(&ep->aux_comp);
@@ -707,7 +695,8 @@ static int dp_aux_chan_ready(struct mdss_dp_drv_pdata *ep)
 
 	for (cnt = 5; cnt; cnt--) {
 		ret = dp_aux_write_buf(ep, EDID_START_ADDRESS, &data, 1, 1);
-		pr_debug("ret=%d\n", ret);
+		pr_debug("ret = %d, aux_error = %s\n",
+				ret, mdss_dp_get_aux_error(ep->aux_error_num));
 		if (ret >= 0)
 			break;
 		msleep(100);
@@ -721,6 +710,20 @@ static int dp_aux_chan_ready(struct mdss_dp_drv_pdata *ep)
 	return 0;
 }
 
+static void dp_aux_send_checksum(struct mdss_dp_drv_pdata *dp, u32 checksum)
+{
+	char data[4];
+
+	data[0] = checksum;
+	pr_debug("writing checksum %d\n", data[0]);
+	dp_aux_write_buf(dp, 0x261, data, 1, 0);
+
+	data[0] = TEST_EDID_CHECKSUM_WRITE;
+	pr_debug("sending test response %s\n",
+			mdss_dp_get_test_response(data[0]));
+	dp_aux_write_buf(dp, 0x260, data, 1, 0);
+}
+
 int mdss_dp_edid_read(struct mdss_dp_drv_pdata *dp)
 {
 	struct edp_buf *rp = &dp->rxp;
@@ -728,6 +731,7 @@ int mdss_dp_edid_read(struct mdss_dp_drv_pdata *dp)
 	int edid_blk = 0, blk_num = 0, retries = 10;
 	bool edid_parsing_done = false;
 	const u8 cea_tag = 0x02;
+	u32 checksum = 0;
 
 	ret = dp_aux_chan_ready(dp);
 	if (ret) {
@@ -735,6 +739,12 @@ int mdss_dp_edid_read(struct mdss_dp_drv_pdata *dp)
 		return ret;
 	}
 
+	/**
+	 * Parse the test request vector to see whether there is a
+	 * TEST_EDID_READ test request.
+	 */
+	dp_sink_parse_test_request(dp);
+
 	do {
 		rlen = dp_aux_read_buf(dp, EDID_START_ADDRESS +
 				(blk_num * EDID_BLOCK_SIZE),
@@ -747,8 +757,11 @@ int mdss_dp_edid_read(struct mdss_dp_drv_pdata *dp)
 		pr_debug("blk_num=%d, rlen=%d\n", blk_num, rlen);
 
 		if (dp_edid_is_valid_header(rp->data)) {
-			if (dp_edid_buf_error(rp->data, rp->len))
-				continue;
+			ret = dp_edid_buf_error(rp->data, rp->len);
+			if (ret) {
+				pr_err("corrupt edid block detected\n");
+				goto end;
+			}
 
 			if (edid_parsing_done) {
 				blk_num++;
@@ -765,6 +778,7 @@ int mdss_dp_edid_read(struct mdss_dp_drv_pdata *dp)
 				rp->data);
 
 			edid_parsing_done = true;
+			checksum = rp->data[rp->len - 1];
 		} else {
 			edid_blk++;
 			blk_num++;
@@ -783,10 +797,17 @@ int mdss_dp_edid_read(struct mdss_dp_drv_pdata *dp)
 			rp->data, EDID_BLOCK_SIZE);
 
 		if (edid_blk == dp->edid.ext_block_cnt)
-			return 0;
+			goto end;
 	} while (retries--);
 
-	return 0;
+end:
+	if (dp->test_data.test_requested == TEST_EDID_READ) {
+		pr_debug("sending checksum %d\n", checksum);
+		dp_aux_send_checksum(dp, checksum);
+		dp->test_data = (const struct dpcd_test_request){ 0 };
+	}
+
+	return ret;
 }
 
 static void dp_sink_capability_read(struct mdss_dp_drv_pdata *ep,
@@ -935,6 +956,8 @@ static void dp_sink_capability_read(struct mdss_dp_drv_pdata *ep,
 		cap->training_read_interval = 4000 * data; /* us */
 	pr_debug("training_interval=%d\n",
 			 cap->training_read_interval);
+
+	dp_sink_parse_sink_count(ep);
 }
 
 static int dp_link_status_read(struct mdss_dp_drv_pdata *ep, int len)
@@ -1141,7 +1164,8 @@ static void dp_sink_parse_sink_count(struct mdss_dp_drv_pdata *ep)
  */
 static bool dp_is_test_supported(u32 test_requested)
 {
-	return test_requested == TEST_LINK_TRAINING;
+	return (test_requested == TEST_LINK_TRAINING) ||
+		(test_requested == TEST_EDID_READ);
 }
 
 /**
diff --git a/drivers/video/fbdev/msm/mdss_dp_util.c b/drivers/video/fbdev/msm/mdss_dp_util.c
index 10962548c3c5..b1bfe2c548ba 100644
--- a/drivers/video/fbdev/msm/mdss_dp_util.c
+++ b/drivers/video/fbdev/msm/mdss_dp_util.c
@@ -312,8 +312,8 @@ void mdss_dp_setup_tr_unit(struct dss_io_data *ctrl_io, u8 link_rate,
 	}
 
 	if (tu_entry == tu_table + ARRAY_SIZE(tu_table)) {
-		pr_err("requested ln_cnt=%d, lrate=0x%x not supported\n",
-				ln_cnt, link_rate);
+		pr_err("requested res=%d, ln_cnt=%d, lrate=0x%x not supported\n",
+				res, ln_cnt, link_rate);
 		return;
 	}
 
@@ -604,8 +604,9 @@ static u8 mdss_dp_calculate_parity_byte(u32 data)
 	u8 iData = 0;
 	u8 i = 0;
 	u8 parityByte;
+	u8 num_byte = (data & 0xFF00) > 0 ? 8 : 2;
 
-	for (i = 0; i < 8; i++) {
+	for (i = 0; i < num_byte; i++) {
 		iData = (data >> i*4) & 0xF;
 
 		ci = iData ^ x1;
diff --git a/drivers/video/fbdev/msm/mdss_dp_util.h b/drivers/video/fbdev/msm/mdss_dp_util.h
index 82e9f9417662..5e238d5be2b4 100644
--- a/drivers/video/fbdev/msm/mdss_dp_util.h
+++ b/drivers/video/fbdev/msm/mdss_dp_util.h
@@ -245,6 +245,8 @@ static const struct dp_vc_tu_mapping_table tu_table[] = {
 			0x21, 0x001a, false, 0x00, 0x00, 0x00, 0x27},
 	{HDMI_VFRMT_1920x1080p60_16_9, 4, 06, 24,
 			0x16, 0x000f, false, 0x00, 0x00, 0x00, 0x1f},
+	{HDMI_VFRMT_1920x1080p60_16_9, 4, 10, 24,
+			0x21, 0x0013, false, 0x21, 0x8, 0x1, 0x26},
 	{HDMI_VFRMT_1920x1080p60_16_9, 2, 10, 24,
 			0x21, 0x0011, false, 0x00, 0x00, 0x00, 0x27},
 	{HDMI_VFRMT_1920x1080p60_16_9, 1, 20, 24,