qcacld: SAR Thermal limit for 2g and 5g

The lower Tx power level will come as a configuration parameter
thru the .ini file and it will be passed to the FW through a
new WMI command from CLD to FW.

Change-Id: Ied6f083c417653b00c71ba5c8a5a21ad8de04e3b
CRs-Fixed: 615582

10 files changed, 162 insertions, 1 deletions

diff --git a/CORE/HDD/inc/wlan_hdd_cfg.h b/CORE/HDD/inc/wlan_hdd_cfg.h
index b030c4bc3eb8..88e3b16966b4 100644
--- a/CORE/HDD/inc/wlan_hdd_cfg.h
+++ b/CORE/HDD/inc/wlan_hdd_cfg.h
@@ -2211,6 +2211,18 @@ This feature requires the dependent cfg.ini "gRoamPrefer5GHz" set to 1 */
 #define CFG_ENABLE_RX_THREAD_MAX                   (1)
 #define CFG_ENABLE_RX_THREAD_DEFAULT               (1)
 
+/* SAR Thermal limit values for 2g and 5g */
+
+#define CFG_SET_TXPOWER_LIMIT2G_NAME               "TxPower2g"
+#define CFG_SET_TXPOWER_LIMIT2G_MIN                ( 0 )
+#define CFG_SET_TXPOWER_LIMIT2G_MAX                ( 30 )
+#define CFG_SET_TXPOWER_LIMIT2G_DEFAULT            ( 15 )
+
+#define CFG_SET_TXPOWER_LIMIT5G_NAME               "TxPower5g"
+#define CFG_SET_TXPOWER_LIMIT5G_MIN                ( 0 )
+#define CFG_SET_TXPOWER_LIMIT5G_MAX                ( 30 )
+#define CFG_SET_TXPOWER_LIMIT5G_DEFAULT            ( 15 )
+
 /*---------------------------------------------------------------------------
   Type declarations
   -------------------------------------------------------------------------*/
@@ -2667,6 +2679,8 @@ typedef struct
    v_U16_t                     thermalTempMaxLevel2;
    v_U16_t                     thermalTempMinLevel3;
    v_U16_t                     thermalTempMaxLevel3;
+   v_U32_t                     TxPower2g;
+   v_U32_t                     TxPower5g;
 #endif
    v_U32_t                     gEnableDebugLog;
    v_U8_t                      enableRxThread;
diff --git a/CORE/HDD/src/wlan_hdd_cfg.c b/CORE/HDD/src/wlan_hdd_cfg.c
index 8f5b54dc0ea2..819deb123dc0 100644
--- a/CORE/HDD/src/wlan_hdd_cfg.c
+++ b/CORE/HDD/src/wlan_hdd_cfg.c
@@ -3078,6 +3078,20 @@ REG_VARIABLE( CFG_SAP_MAX_NO_PEERS, WLAN_PARAM_Integer,
               CFG_THERMAL_TEMP_MAX_LEVEL3_DEFAULT,
               CFG_THERMAL_TEMP_MAX_LEVEL3_MIN,
               CFG_THERMAL_TEMP_MAX_LEVEL3_MAX ),
+
+  REG_VARIABLE( CFG_SET_TXPOWER_LIMIT2G_NAME , WLAN_PARAM_Integer,
+              hdd_config_t, TxPower2g,
+              VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
+              CFG_SET_TXPOWER_LIMIT2G_DEFAULT,
+              CFG_SET_TXPOWER_LIMIT2G_MIN,
+              CFG_SET_TXPOWER_LIMIT2G_MAX ),
+
+  REG_VARIABLE( CFG_SET_TXPOWER_LIMIT5G_NAME , WLAN_PARAM_Integer,
+             hdd_config_t, TxPower5g,
+             VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
+             CFG_SET_TXPOWER_LIMIT5G_DEFAULT,
+             CFG_SET_TXPOWER_LIMIT5G_MIN,
+             CFG_SET_TXPOWER_LIMIT5G_MAX ),
 #endif /*#ifndef QCA_WIFI_ISOC*/
    REG_VARIABLE( CFG_ENABLE_DEBUG_CONNECT_ISSUE, WLAN_PARAM_Integer,
               hdd_config_t, gEnableDebugLog,
diff --git a/CORE/HDD/src/wlan_hdd_main.c b/CORE/HDD/src/wlan_hdd_main.c
index d9f982a1983a..9df6dfe484b2 100644
--- a/CORE/HDD/src/wlan_hdd_main.c
+++ b/CORE/HDD/src/wlan_hdd_main.c
@@ -9015,6 +9015,7 @@ int hdd_wlan_startup(struct device *dev, v_VOID_t *hif_sc)
 #endif
 #ifndef QCA_WIFI_ISOC
    tSmeThermalParams thermalParam;
+   tSirTxPowerLimit *hddtxlimit;
 #endif
 
    ENTER();
@@ -9806,6 +9807,24 @@ int hdd_wlan_startup(struct device *dev, v_VOID_t *hif_sc)
        hddLog(VOS_TRACE_LEVEL_ERROR,
                "%s: Error while initializing thermal information", __func__);
    }
+
+   /* SAR power limit */
+   hddtxlimit = vos_mem_malloc(sizeof(tSirTxPowerLimit));
+   if (!hddtxlimit)
+   {
+       VOS_TRACE(VOS_MODULE_ID_HDD, VOS_TRACE_LEVEL_ERROR,
+                 "%s: Memory allocation for TxPowerLimit "
+                 "failed!", __func__);
+       goto err_nl_srv;
+   }
+   hddtxlimit->txPower2g = pHddCtx->cfg_ini->TxPower2g;
+   hddtxlimit->txPower5g = pHddCtx->cfg_ini->TxPower5g;
+
+   if (eHAL_STATUS_SUCCESS != sme_TxpowerLimit(pHddCtx->hHal,hddtxlimit))
+   {
+        hddLog(VOS_TRACE_LEVEL_ERROR,
+               "%s: Error setting txlimit in sme", __func__);
+   }
 #endif /*#ifndef QCA_WIFI_ISOC*/
 #if defined(QCA_WIFI_2_0) && !defined(QCA_WIFI_ISOC)
    complete(&wlan_start_comp);
diff --git a/CORE/MAC/inc/sirApi.h b/CORE/MAC/inc/sirApi.h
index 19a7a98205c6..3020e837d922 100644
--- a/CORE/MAC/inc/sirApi.h
+++ b/CORE/MAC/inc/sirApi.h
@@ -4849,4 +4849,12 @@ typedef struct{
     u_int8_t thermalMgmtEnabled;
     u_int32_t throttlePeriod;
 } t_thermal_mgmt, *tp_thermal_mgmt;
+
+typedef struct sSirTxPowerLimit
+{
+    /* Thermal limits for 2g and 5g */
+    u_int32_t txPower2g;
+    u_int32_t txPower5g;
+} tSirTxPowerLimit;
+
 #endif /* __SIR_API_H */
diff --git a/CORE/MAC/src/include/sirParams.h b/CORE/MAC/src/include/sirParams.h
index c641ccb02395..41a8a34de5b1 100644
--- a/CORE/MAC/src/include/sirParams.h
+++ b/CORE/MAC/src/include/sirParams.h
@@ -648,6 +648,8 @@ typedef struct sSirMbMsgP2p
 #define SIR_HAL_SET_PLM_REQ                (SIR_HAL_ITC_MSG_TYPES_BEGIN + 250)
 #endif
 
+#define SIR_HAL_SET_TX_POWER_LIMIT         (SIR_HAL_ITC_MSG_TYPES_BEGIN + 251)
+
 #define SIR_HAL_MSG_TYPES_END              (SIR_HAL_MSG_TYPES_BEGIN + 0x1FF)
 
 // CFG message types
diff --git a/CORE/SERVICES/WMA/wma.c b/CORE/SERVICES/WMA/wma.c
index 253d10fc56f4..195aa430c70e 100644
--- a/CORE/SERVICES/WMA/wma.c
+++ b/CORE/SERVICES/WMA/wma.c
@@ -14124,6 +14124,59 @@ VOS_STATUS wma_process_set_thermal_level(tp_wma_handle wma,
 	return VOS_STATUS_SUCCESS;
 }
 
+/* function     :   wma_ProcessTxPowerLimits
+ * Description  :   This function sends the power limits for 2g/5g to firmware
+ * Args         :
+		    handle     : Pointer to WMA handle
+ *                  ptxlim     : Pointer to  power limit values
+ * Returns      :   VOS_STATUS based on values sent to firmware
+ *
+ */
+VOS_STATUS wma_ProcessTxPowerLimits(WMA_HANDLE handle,
+			tSirTxPowerLimit *ptxlim)
+{
+	tp_wma_handle wma = (tp_wma_handle)handle;
+	int32_t ret = 0;
+	u_int32_t txpower_params2g = 0;
+	u_int32_t txpower_params5g = 0;
+
+	if (!wma || !wma->wmi_handle) {
+		WMA_LOGE("%s: WMA is closed, can not issue tx power limit",
+			 __func__);
+		return VOS_STATUS_E_INVAL;
+        }
+	/* Set value and reason code for 2g and 5g power limit */
+
+	SET_PDEV_PARAM_TXPOWER_REASON(txpower_params2g,
+			WMI_PDEV_PARAM_TXPOWER_REASON_SAR);
+	SET_PDEV_PARAM_TXPOWER_VALUE(txpower_params2g,
+			ptxlim->txPower2g);
+
+	SET_PDEV_PARAM_TXPOWER_REASON(txpower_params5g,
+			WMI_PDEV_PARAM_TXPOWER_REASON_SAR);
+	SET_PDEV_PARAM_TXPOWER_VALUE(txpower_params5g,
+			ptxlim->txPower5g);
+
+	WMA_LOGD("%s: txpower2g: %x txpower5g: %x",
+			__func__, txpower_params2g, txpower_params5g);
+
+	ret = wmi_unified_pdev_set_param(wma->wmi_handle,
+			WMI_PDEV_PARAM_TXPOWER_LIMIT2G, txpower_params2g);
+	if (ret) {
+		WMA_LOGE("%s: Failed to set txpower 2g (%d)",
+			__func__, ret);
+		return VOS_STATUS_E_FAILURE;
+	}
+	ret = wmi_unified_pdev_set_param(wma->wmi_handle,
+			WMI_PDEV_PARAM_TXPOWER_LIMIT5G, txpower_params5g);
+	if (ret) {
+		WMA_LOGE("%s: Failed to set txpower 5g (%d)",
+				 __func__, ret);
+		return VOS_STATUS_E_FAILURE;
+	}
+	return VOS_STATUS_SUCCESS;
+}
+
 /*
  * FUNCTION: wma_ProcessAddPeriodicTxPtrnInd
  * WMI command sent to firmware to add patterns
@@ -14703,7 +14756,11 @@ VOS_STATUS wma_mc_process_msg(v_VOID_t *vos_context, vos_msg_t *msg)
 				 (tSirDelPeriodicTxPtrn *)msg->bodyptr);
 			vos_mem_free(msg->bodyptr);
 			break;
-
+		case WDA_TX_POWER_LIMIT:
+			wma_ProcessTxPowerLimits(wma_handle,
+				(tSirTxPowerLimit *)msg->bodyptr);
+			vos_mem_free(msg->bodyptr);
+			break;
 #ifdef FEATURE_WLAN_LPHB
 		case WDA_LPHB_CONF_REQ:
 			wma_process_lphb_conf_req(wma_handle, (tSirLPHBReq *)msg->bodyptr);
diff --git a/CORE/SME/inc/sme_Api.h b/CORE/SME/inc/sme_Api.h
index a003eee923ed..0537f9e7f3ae 100644
--- a/CORE/SME/inc/sme_Api.h
+++ b/CORE/SME/inc/sme_Api.h
@@ -3406,6 +3406,14 @@ eHalStatus sme_InitThermalInfo( tHalHandle hHal, tSmeThermalParams thermalParam
     \- return eHalStatus
     -------------------------------------------------------------------------*/
 eHalStatus sme_SetThermalLevel( tHalHandle hHal, tANI_U8 level );
+/* ---------------------------------------------------------------------------
+   \fn sme_TxpowerLimit
+   \brief SME API to set txpower limits
+   \param hHal
+   \param psmetx : power limits for 2g/5g
+   \- return eHalStatus
+  -------------------------------------------------------------------------*/
+eHalStatus sme_TxpowerLimit( tHalHandle hHal, tSirTxPowerLimit *psmetx);
 #endif
 eHalStatus sme_UpdateConnectDebug(tHalHandle hHal, tANI_U32 set_value);
 #endif //#if !defined( __SME_API_H )
diff --git a/CORE/SME/src/sme_common/sme_Api.c b/CORE/SME/src/sme_common/sme_Api.c
index 112b2de5cde6..9bce9f06b8f2 100644
--- a/CORE/SME/src/sme_common/sme_Api.c
+++ b/CORE/SME/src/sme_common/sme_Api.c
@@ -11442,6 +11442,39 @@ eHalStatus sme_SetThermalLevel( tHalHandle hHal, tANI_U8 level )
     vos_mem_free(pLevel);
     return eHAL_STATUS_FAILURE;
 }
+/* ---------------------------------------------------------------------------
+   \fn sme_TxpowerLimit
+   \brief SME API to set txpower limits
+   \param hHal
+   \param psmetx : power limits for 2g/5g
+   \- return eHalStatus
+ -------------------------------------------------------------------------*/
+eHalStatus sme_TxpowerLimit(tHalHandle hHal, tSirTxPowerLimit *psmetx)
+{
+     eHalStatus status = eHAL_STATUS_SUCCESS;
+     VOS_STATUS vosStatus = VOS_STATUS_SUCCESS;
+     vos_msg_t vosMessage;
+     tpAniSirGlobal pMac = PMAC_STRUCT(hHal);
+
+     if (eHAL_STATUS_SUCCESS == (status = sme_AcquireGlobalLock(&pMac->sme)))
+     {
+          vosMessage.type = WDA_TX_POWER_LIMIT;
+          vosMessage.reserved = 0;
+          vosMessage.bodyptr = psmetx;
+
+          vosStatus = vos_mq_post_message(VOS_MQ_ID_WDA, &vosMessage);
+          if (!VOS_IS_STATUS_SUCCESS(vosStatus))
+          {
+             VOS_TRACE( VOS_MODULE_ID_SME, VOS_TRACE_LEVEL_ERROR,
+                        "%s: not able to post WDA_TX_POWER_LIMIT",
+                        __func__);
+             status = eHAL_STATUS_FAILURE;
+             vos_mem_free(psmetx);
+          }
+          sme_ReleaseGlobalLock(&pMac->sme);
+     }
+     return(status);
+}
 #endif /* #ifndef QCA_WIFI_ISOC */
 
 eHalStatus sme_UpdateConnectDebug(tHalHandle hHal, tANI_U32 set_value)
diff --git a/CORE/WDA/inc/wlan_qct_wda.h b/CORE/WDA/inc/wlan_qct_wda.h
index e3ad56fe6c87..abc69dc916f5 100644
--- a/CORE/WDA/inc/wlan_qct_wda.h
+++ b/CORE/WDA/inc/wlan_qct_wda.h
@@ -1299,6 +1299,8 @@ tSirRetStatus uMacPostCtrlMsg(void* pSirGlobal, tSirMbMsg* pMb);
 #define WDA_ADD_PERIODIC_TX_PTRN_IND    SIR_HAL_ADD_PERIODIC_TX_PTRN_IND
 #define WDA_DEL_PERIODIC_TX_PTRN_IND    SIR_HAL_DEL_PERIODIC_TX_PTRN_IND
 
+#define WDA_TX_POWER_LIMIT          SIR_HAL_SET_TX_POWER_LIMIT
+
 #define WDA_RATE_UPDATE_IND         SIR_HAL_RATE_UPDATE_IND
 
 #define WDA_INIT_THERMAL_INFO_CMD   SIR_HAL_INIT_THERMAL_INFO_CMD
diff --git a/firmware_bin/WCNSS_qcom_cfg.ini b/firmware_bin/WCNSS_qcom_cfg.ini
index a06ecdb6fc7b..42dffc4cb629 100755
--- a/firmware_bin/WCNSS_qcom_cfg.ini
+++ b/firmware_bin/WCNSS_qcom_cfg.ini
@@ -494,6 +494,10 @@ isP2pDeviceAddrAdministrated=0
 
 #Enable Rx thread
 gEnableRxThread=1
+
+# Set Thermal Power limit
+TxPower2g=10
+TxPower5g=10
 END
 
 # Note: Configuration parser would not read anything past the END marker