adv7481: Modify EDID array to support 1080p60Hz

1080p60Hz HDMI_OUT(PC) not displayed in TIF due to wrong clock value,
So increasing clock value to 148.5MHz in Detailed Timing Descriptor
And reorder video data block to support 1080p60Hz.

Change-Id: I91ffc02f97c9b4fa5362444382af1b91af9c03b6
Signed-off-by: Suprith Malligere Shankaregowda <supgow@codeaurora.org>

1 files changed, 36 insertions, 24 deletions

diff --git a/drivers/media/i2c/adv7481.c b/drivers/media/i2c/adv7481.c
index eb2b37ce1095..0e4d22f757a8 100644
--- a/drivers/media/i2c/adv7481.c
+++ b/drivers/media/i2c/adv7481.c
@@ -190,23 +190,25 @@ const uint8_t adv7481_default_edid_data[] = {
 0x19,
 /* EDID Structure Version and Revision */
 0x01, 0x03,
-/* Display Parameters */
+/* Display Parameters [20-24] bytes */
 0x80, 0x10, 0x09, 0x78, 0x0A,
-/* Color characteristics */
+/* Color characteristics [25-34] bytes */
 0x0D, 0xC9, 0xA0, 0x57, 0x47, 0x98, 0x27, 0x12,
 0x48, 0x4C,
-/* Established Timings */
+/* Established Timings [35-36] bytes*/
 0x21, 0x08, 0x00,
 /* Standard Timings */
+/*  D1 -> (act_pix(1920)/8)-31 */
+/*  C0 -> (refresh rate - 60)  */
 0xD1, 0xC0, 0xD1, 0x40, 0x81, 0xC0, 0x81, 0x40,
 0x3B, 0xC0, 0x3B, 0x40, 0x31, 0xC0, 0x31, 0x40,
-/* Detailed Timings Block */
-0x1A, 0x36, 0x80, 0xA0, 0x70, 0x38, 0x1F, 0x40,
-0x30, 0x20, 0x35, 0x00, 0x40, 0x44, 0x21, 0x00,
+/* Detailed Timings Block | Preferred Timing Mode */
+0x02, 0x3A, 0x80, 0x18, 0x71, 0x38, 0x2D, 0x40,
+0x58, 0x2C, 0x45, 0x00, 0xDC, 0x0C, 0x11, 0x00,
 0x00, 0x1E,
 /* Monitor Descriptor Block 2 */
-0x00, 0x19, 0x00, 0xA0, 0x50, 0xD0, 0x15, 0x20,
-0x30, 0x20, 0x35, 0x00, 0x80, 0xD8, 0x10, 0x00,
+0x01, 0x1D, 0x00, 0xBC, 0x52, 0xD0, 0x1E, 0x20,
+0xB8, 0x28, 0x55, 0x40, 0xA0, 0x5A, 0x00, 0x00,
 0x00, 0x1E,
 /* Monitor Descriptor Block 3 */
 0x00, 0x00, 0x00, 0xFD, 0x00, 0x17, 0x4B, 0x0F,
@@ -219,16 +221,26 @@ const uint8_t adv7481_default_edid_data[] = {
 /* Extension Flag CEA */
 0x01,
 /* Checksum */
-0x16,
+0x5D,
 
-/* Block 1 (Extension Block) */
-/* Extension Header */
-0x02, 0x03, 0x22,
+/* CEA-861 extension block */
+/* Block 1 (Extension Block) 128 bytes*/
+/* Extension Header
+ * 0x23H[35D] - Detailed Timing Descriptor starts
+ */
+0x02, 0x03, 0x23,
 /* Display supports */
 0x71,
-/* Video Data Block */
-0x4C, 0x84, 0x13, 0x3C, 0x03, 0x02, 0x11, 0x12,
-0x01, 0x90, 0x1F, 0x20, 0x22,
+/* Data collection block begin
+ * bit 7..5 : Block Type Tag(1:Audio, 2:Video, 3:Vendor specific, 4:speaker)
+ * bit 4..0 : Total number of bytes in block
+ * Eg: Video Data Block
+ * 4D -> D stands for 13 more bytes to read
+ * 90[10010000] -> bit 7:1 stands for native display
+ *              -> bit 6..0: VIC value of supported standard resolution
+ */
+0x4D, 0x90, 0x1F, 0x22, 0x20, 0x04, 0x13, 0x3E,
+0x3C, 0x12, 0x11, 0x03, 0x02, 0x01,
 /* HDMI VSDB */
 /* Deep color All, Max_TMDS_Clock = 150 MHz */
 0x68, 0x03, 0x0C, 0x00, 0x10, 0x00, 0x80,
@@ -240,17 +252,17 @@ const uint8_t adv7481_default_edid_data[] = {
 /* Speaker Allocation Data Block */
 0x83, 0x01, 0x00, 0x00,
 /* Detailed Timing Descriptor */
-0x1A, 0x36, 0x80, 0xA0, 0x70, 0x38, 0x1F, 0x40,
-0x30, 0x20, 0x35, 0x00, 0x40, 0x44, 0x21, 0x00,
+0x02, 0x3A, 0x80, 0x18, 0x71, 0x38, 0x2D, 0x40,
+0x58, 0x2C, 0x45, 0x00, 0xDC, 0x0C, 0x11, 0x00,
 0x00, 0x1E,
 /* Detailed Timing Descriptor */
-0x00, 0x19, 0x00, 0xA0, 0x50, 0xD0, 0x15, 0x20,
-0x30, 0x20, 0x35, 0x00, 0x80, 0xD8, 0x10, 0x00,
+0x01, 0x1D, 0x00, 0xBC, 0x52, 0xD0, 0x1E, 0x20,
+0xB8, 0x28, 0x55, 0x40, 0xA0, 0x5A, 0x00, 0x00,
 0x00, 0x1E,
 /* Detailed Timing Descriptor */
-0x41, 0x0A, 0xD0, 0xA0, 0x20, 0xE0, 0x13, 0x10,
-0x30, 0x20, 0x3A, 0x00, 0xD8, 0x90, 0x00, 0x00,
-0x00, 0x18,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00,
 /* Detailed Timing Descriptor */
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -260,9 +272,9 @@ const uint8_t adv7481_default_edid_data[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00,
 /* DTD padding */
-0x00, 0x00, 0x00,
+0x00, 0x00,
 /* Checksum */
-0x8C
+0xFB
 };
 
 #define ADV7481_EDID_SIZE ARRAY_SIZE(adv7481_default_edid_data)