diff options
| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-09-14 18:05:00 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-09-23 08:44:27 +0200 |
| commit | 5c56e5fc60b501877437281b84f8ddcf7241e5f2 (patch) | |
| tree | c71c40a05533f6258a4beb8d477be994b129ba01 | |
| parent | 19fadc7cfc8533064c422c7e02a1b3fbf83e31ea (diff) | |
MIPS: SNI: Fix MIPS_L1_CACHE_SHIFT
[ Upstream commit 564c836fd945a94b5dd46597d6b7adb464092650 ]
Commit 930beb5ac09a ("MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>") forgot
to select the correct MIPS_L1_CACHE_SHIFT for SNI RM. This breaks non
coherent DMA because of a wrong allocation alignment.
Fixes: 930beb5ac09a ("MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>")
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
| -rw-r--r-- | arch/mips/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 596cbda9cb3d..9d8bc19edc48 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -817,6 +817,7 @@ config SNI_RM select I8253 select I8259 select ISA + select MIPS_L1_CACHE_SHIFT_6 select SWAP_IO_SPACE if CPU_BIG_ENDIAN select SYS_HAS_CPU_R4X00 select SYS_HAS_CPU_R5000 |