diff options
| author | Camus Wong <camusw@codeaurora.org> | 2018-06-29 15:44:59 -0400 |
|---|---|---|
| committer | Camus Wong <camusw@codeaurora.org> | 2018-07-04 13:32:43 -0400 |
| commit | 12e735d655fc49eb265dcc9aec804a69933f692b (patch) | |
| tree | e1e69faa6f9b74d8d22a05f71422ff992352a221 | |
| parent | d8c2c85fcdf401331649be84777a5f9e42cd2b9f (diff) | |
DRM: DSI: setup software context during DSI prepare with splash
When splash handoff is enabled, it should skip the hardware init
function. However, the software context should setup properly to
reflect actual hardware state.
Change-Id: I2a69bf5fadab726459e874597022cf5b54503102
Signed-off-by: Camus Wong <camusw@codeaurora.org>
| -rw-r--r-- | drivers/gpu/drm/msm/dba_bridge.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/dsi-staging/dsi_display.c | 60 |
2 files changed, 58 insertions, 5 deletions
diff --git a/drivers/gpu/drm/msm/dba_bridge.c b/drivers/gpu/drm/msm/dba_bridge.c index 62294ddf8034..b4a04931e52e 100644 --- a/drivers/gpu/drm/msm/dba_bridge.c +++ b/drivers/gpu/drm/msm/dba_bridge.c @@ -232,6 +232,9 @@ static void _dba_bridge_post_disable(struct drm_bridge *bridge) return; } + if (d_bridge->cont_splash_enabled) + d_bridge->cont_splash_enabled = false; + if (d_bridge->ops.power_on) { rc = d_bridge->ops.power_on(d_bridge->dba_ctx, false, 0); if (rc) diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c index 7c9c3c7b4cca..4bf694e2e7fa 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c @@ -176,6 +176,18 @@ static int dsi_display_ctrl_power_on(struct dsi_display *display) if (display->cont_splash_enabled) { pr_debug("skip ctrl power on\n"); + for (i = 0; i < display->ctrl_count; i++) { + ctrl = &display->ctrl[i]; + if (!ctrl->ctrl) + continue; + if (!ctrl->ctrl->current_state.pwr_enabled) { + ctrl->ctrl->pwr_info.host_pwr.refcount++; + ctrl->ctrl->pwr_info.digital.refcount++; + ctrl->ctrl->current_state.power_state = + DSI_CTRL_POWER_VREG_ON; + ctrl->ctrl->current_state.pwr_enabled = true; + } + } return rc; } @@ -239,6 +251,16 @@ static int dsi_display_phy_power_on(struct dsi_display *display) /* early return for splash enabled case */ if (display->cont_splash_enabled) { pr_debug("skip phy power on\n"); + for (i = 0; i < display->ctrl_count; i++) { + ctrl = &display->ctrl[i]; + if (!ctrl->ctrl) + continue; + if (!ctrl->phy->power_state) { + ctrl->phy->pwr_info.digital.refcount++; + ctrl->phy->pwr_info.phy_pwr.refcount++; + ctrl->phy->power_state = true; + } + } return rc; } @@ -298,9 +320,25 @@ static int dsi_display_ctrl_core_clk_on(struct dsi_display *display) int i; struct dsi_display_ctrl *m_ctrl, *ctrl; + m_ctrl = &display->ctrl[display->clk_master_idx]; + /* early return for splash enabled case */ if (display->cont_splash_enabled) { pr_debug("skip core clk on calling\n"); + m_ctrl->ctrl->current_state.pwr_enabled = true; + m_ctrl->ctrl->current_state.core_clk_enabled = true; + m_ctrl->ctrl->current_state.power_state = + DSI_CTRL_POWER_CORE_CLK_ON; + for (i = 0; i < display->ctrl_count; i++) { + ctrl = &display->ctrl[i]; + if (!ctrl->ctrl || (ctrl == m_ctrl)) + continue; + ctrl->ctrl->current_state.pwr_enabled = true; + ctrl->ctrl->current_state.core_clk_enabled = true; + ctrl->ctrl->current_state.power_state = + DSI_CTRL_POWER_CORE_CLK_ON; + } + return rc; } @@ -309,9 +347,6 @@ static int dsi_display_ctrl_core_clk_on(struct dsi_display *display) * be enabled before the other controller. Master controller in the * clock context refers to the controller that sources the clock. */ - - m_ctrl = &display->ctrl[display->clk_master_idx]; - rc = dsi_ctrl_set_power_state(m_ctrl->ctrl, DSI_CTRL_POWER_CORE_CLK_ON); if (rc) { pr_err("[%s] failed to turn on clocks, rc=%d\n", @@ -346,9 +381,26 @@ static int dsi_display_ctrl_link_clk_on(struct dsi_display *display) int i; struct dsi_display_ctrl *m_ctrl, *ctrl; + m_ctrl = &display->ctrl[display->clk_master_idx]; + /* early return for splash enabled case */ if (display->cont_splash_enabled) { pr_debug("skip ctrl link clk on calling\n"); + m_ctrl->ctrl->current_state.pwr_enabled = true; + m_ctrl->ctrl->current_state.core_clk_enabled = true; + m_ctrl->ctrl->current_state.link_clk_enabled = true; + m_ctrl->ctrl->current_state.power_state = + DSI_CTRL_POWER_LINK_CLK_ON; + for (i = 0; i < display->ctrl_count; i++) { + ctrl = &display->ctrl[i]; + if (!ctrl->ctrl || (ctrl == m_ctrl)) + continue; + ctrl->ctrl->current_state.pwr_enabled = true; + ctrl->ctrl->current_state.core_clk_enabled = true; + ctrl->ctrl->current_state.link_clk_enabled = true; + ctrl->ctrl->current_state.power_state = + DSI_CTRL_POWER_LINK_CLK_ON; + } return rc; } @@ -358,8 +410,6 @@ static int dsi_display_ctrl_link_clk_on(struct dsi_display *display) * clock context refers to the controller that sources the clock. */ - m_ctrl = &display->ctrl[display->clk_master_idx]; - rc = dsi_ctrl_set_clock_source(m_ctrl->ctrl, &display->clock_info.src_clks); if (rc) { |
