| Commit message (Collapse) | Author | Age |
| ... | |
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Currently driver is scheduling pm_qos_work again even though
pm_qos_latency is not passed from dts file. Add a check for
pm_qos_latency and don't schedule work if pm_qos_latency value
is zero. Also remove use of static variable for last_irq_count and
add the variable for the same in dwc3 structure for the case where
multi DWC3 usages are used.
Change-Id: I55e1e3a7d48fbea0a421802aae176ac57a48869f
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Add POWER_SUPPLY_PROP_REAL_TYPE property for usb_psy to present its real
charger type. POWER_SUPPLY_PROP_TYPE in usb_psy is always set to
POWER_SUPPLY_TYPE_USB_PD for healthd to recognize it as an AC charger.
Also add usb_port_psy with POWER_SUPPLY_TYPE_USB type is added for healthd
to recognize it as an USB host. Their ONLINE properties will be updated
according to the VBUS status, type-c mode and real charger type.
With this type being set statically, update the usb phy and pd policy
engine code to look at real type.
Change-Id: I90aa69325cc82b09dfb513c0eeecbc61e092a57f
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
|
| |/ /
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
If __dwc3_msm_ep_queue() fails, then req_complete is freed
but it is not being removed from mdwc->request_list. This
may result into list_add corruption issue on next USB cable
connect when USB endless request is queued. Fix this issue
by deleting req_complete from mdwc->req_complete_list.
CRs-Fixed: 1007571
Change-Id: I00300bc529db75593939a13fbea33acefa717da5
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
|
| |/
|
|
|
|
|
|
|
|
|
|
| |
Latency involved in handling dwc3 interrupt in real time threaded
interrupt is sometimes resulting into RT throttling. Hence queue
bottom half work from dwc3 hard irq handler to a high priority
workqueue. Also, update the corresponding irq flag in host
controller platform driver.
Change-Id: If65a522efb6d792eea7fa7afc4c5e4dcd1cb6fb8
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
|
| |
|
|
|
|
|
|
|
|
|
|
| |
commit 1eec2157d84dcb ("usb: dwc3: Update core clock rate based on
USB port speed.") only sets clk rate for HS/FS/LS device add notification.
In case super speed device is plugged in after LS/FS/HS device unplug in
absence of runtime suspend, core clk rate remains at high speed core clk
rate. Fix this issue by setting the core clk rate back to default when
a device is being removed from root hub.
Change-Id: I0ac37b7ff08a9a297441304eb2cfaff398d44bb9
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
|
| |
|
|
|
|
|
|
|
|
|
| |
In some cases it is useful to manually force the controller to
run at certain speeds (USB 2.0 or USB 3.0 speeds). For example,
EUD (Emebedded USB Debug) can only work when controller is
operating in USB 2.0 speeds. User can force USB 2.0 if EUD is
required.
Change-Id: Id022f372014a9218537bd1b5477d4555aff4578c
Signed-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>
|
| |
|
|
|
|
|
|
|
|
| |
Maximum hardware supported speed flag limits the maximum speed
of the usb controller to high or super. Adding this additional
flag as maximum_speed flag can be changed from different sources
such as power delivery stack.
Change-Id: I18f414e822b5525fe848a48384fac102cdae7b03
Signed-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>
|
| |\ |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Core clock rate can be reduced or increased based on operating
speeds. Controller starts in Super Speed mode (higher core clock
rate) and it will operate in super or high or full or low speed
upon device connection. Update the core clock rate based on bus
speed to allows system to operate in better low power state (such
as SVS1/SVS2 based on system configuration). High Speed rate for
core clock is programmed from dtsi. Super Speed rate will be used
if High speed core clock rate is not provided for backward
compatibility.
Change-Id: I265149d34de19ab50bd7f106a670a7112bfae384
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
|
| |/
|
|
|
|
|
|
|
| |
Reset and initiate controller and phy low power mode to bring them to
known good state during boot up. This will avoid any leakage and makes
sure that DP/DM lines are in high-z state.
Change-Id: I55dbe8d42ce9e56046bd7c99e17c2ec6f368c9a6
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
|
| |\ |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| | |
Speed is not notified in case of platforms having micro USB connector
instead of USB type C connector. In this case, set speed as High speed
only as by default only high speed is supported over micro USB ports.
Change-Id: I6f29914ca9e2345157330651464b7a0c151f1f97
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
|
| |/
|
|
|
|
|
|
|
|
|
|
|
| |
Format specifier %p can leak kernel addresses while not valuing the
kptr_restrict system settings. When kptr_restrict is set to (1), kernel
pointers printed using the %pK format specifier will be replaced with 0's.
Debugging Note : &pK prints only Zeros as address. If you need actual
address information, write 0 to kptr_restrict.
echo 0 > /proc/sys/kernel/kptr_restrict
Change-Id: Ib1f9a151e3cb186763541dc86cb5b67a7d739ece
Signed-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>
|
| |\ |
|
| | |
| |
| |
| |
| |
| |
| |
| | |
Add required changes to enable to vote for PM_QOS_LATENCY based on
number of interrupts fired during certain duration.
Change-Id: I92ace85ee7fd40c3f33f1b9f7bdd32469d990d84
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
|
| |\ \ |
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
There is a possibility of dwc3_msm_ep_queue() and msm_ep_unconfig() racing
each other if suspend happens right after configured. This scenario will
result in NOC error if start_xfer command gets queued after
msm_ep_unconfig(). Hence fix the issue by adding spinlock protection for
DBM endpoint configuration and unconfiguration.
Change-Id: I3fd007647370250017c97faebffadb35afb7fc4d
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
|
| |\| |
| |/
|/| |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
There is a chance that error might occur in connect_work before
endless request is queued to USB controller and bails out. In this case,
DBM endpoint will not be disabled and results in setendpoint config
command timeouts after next connect and could cause usb endpoint enable
fails. Fix this by disabling DBM endpoint corresponding to USB endpoint
in msm_ep_unconfig() if there are no requests queued to USB endpoint.
Change-Id: I5601d76c58263150a3ad5b026a8f2b10da087ba5
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
|
| |\ \ |
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
USB core provides atomic notifier that can be used by platform
drivers to perform hardware reset/recovery on HC died error.
This error is fatal and requires complete hardware
re-initialization. This will remove and add hcd again.
CRs-fixed: 1048766
Change-Id: Ic889ef002717a8fa33e9b7c27fab14a8778bba89
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
|
| |\ \ \ |
|
| | |/ /
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Commit 3dd2172dfecc ("USB: dwc3-msm: Enable power event irq in case of
host bus suspend") is added to enable power_event_irq during host bus
suspend. This is to map MPM pin for DM to power_event_irq to wakeup during
system suspend in host mode. Currently MPM driver has support for mapping
multiple MPM pins to single IRQ. Hence it is not required to enable
power_event_irq during host bus suspend.
Change-Id: I5c7d6b4d43baa0b387342a8bd261361a5c07fe23
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
|
| |\ \ \
| |/ /
|/| | |
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Enable update xfer for DBM while configuring dbm endpoint
and also clear update xfer before queueing end xfer command as
part of endpoint disable as hardware programming guide.
CRs-Fixed: 965207
Change-Id: Ib5ec650884ad06394280416ccf877c1ccce1eaaf
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
|
| |\ \ \ |
|
| | |/ /
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Currently USB driver is not failing probe if USB core-clk-rate property
is not exist. This leads to USB enumeration failures across connect/
disconnect. Hence make core-clk-rate property mandatory and if in case
not defined, fail the probe. Also Fail probe if extcon property not
defined in case of OTG mode.
Also return error if dwc3_core_pre_init() fails during dwc3-msm_resume()
due to phy init fails and don't go ahead with setting up event buffers
as event buffers allocation is done.
Change-Id: I3927ad2f670e45acd10f8568857cf9f3434df657
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
|
| |\ \ \
| | |/
| |/| |
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
When function driver calls dwc3_msm_ep_queue() to queue endless request,
first check endpoint status and whether any request already queued or not.
If that is the case, return error. Else go ahead with queuing request
to USB HW. This helps in resolving the crash seen when request is being
queued again.
Change-Id: I3d6a603c693d1df36719f57684ffad409e1a0e78
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
|
| |\| | |
|
| | |/
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
On new platforms, endpoint clock gating is added for dbm endpoints
with Synopsys USB3.0 controller. This hardware feature requires
initialization of DBM endpoint before BAM pipe reset for bam2bam mode
data transfers working. Hence change sequence such that do DBM endpoint
initialization first followed by BAM pipe reset and do start transfer
as last operation.
CRs-Fixed: 965207
Change-Id: Ib5bfd1a7d258fe336a4c9924850fc9223c1c81f6
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
|
| |/
|
|
|
|
|
|
|
|
|
|
|
|
| |
If PMIC provides boost power for VBUS in host mode, it may
need to know the amount of current of an attached device
in order to optimize for overall power consumption. We can
pass the bMaxPower obtained from a device's configuration
descriptor when it is attached. This only affects devices
(including hubs) directly attached to the root port, as
any device downstream of a hub will either consume part of
the hub's budget or has external power.
Change-Id: I1ad2cfecb7a2f6bdeaced29a1753cdc1bf3849db
Signed-off-by: Jack Pham <jackp@codeaurora.org>
|
| |
|
|
|
|
|
|
|
|
| |
It is required to put/get vote for aggre2_snoc_axi_clk before turning
ON USB core clock for read/write transactions to be successful over
NOC from USB->DDR. Hence add support for voting aggre2_snoc_axi_clk
before enabling USB core clock as part of exiting low power mode.
Change-Id: Icb17d65fbbe49d93971905948c3dc9ab17de152a
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
|
| |\ |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Currenlty driver is clearing mdwc->inrestart flag only if vbus_active
is high only after making sure USB entered low power mode. There is a
chance cable is disconnected during execution of restart work and endup
not clearing mdwc->in_restart flag if disconnect happens. Hence fix this
by clearing mdwc->in_restart flag always irrespective of vbus_active set
or cleared.
Change-Id: I15fa1893c798946c7514bf8cb23773b5784e671e
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
|
| |\ \ |
|
| | |/
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
If ERRATIC event irq is triggered by USB controller, it requires to perform
block reset USB controller as recovery mechanism as per SNPS data book.
Error recovery happens through allowing USB entering low power mode and
exit low power mode. We might see recovery failing as check for P3 state is
true as part of suspend and results in USB not entering low power mode.
Fix this issue by allowing USB enter low power mode in case of recovery
flag mdwc->in_restart set.
CRs-Fixed: 1060831
Change-Id: I41f935da3d4af1dd04eb4b3299e36a0f528633da
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
|
| |/
|
|
|
|
|
|
|
|
|
|
|
| |
Commit 18cd808986ba101d ("usb: dwc3-msm: Make power collapse
and power-on-reset mandatory") removed the device tree properties
for power-collapse due to which the dwc3_restart_usb_work() which
was supposed to do a full POR sequence by simulating a cable
disconnection-reconnection sequence now only does a dbm reset.
Fix this, so that dwc3_restart_usb_work(), does a full POR.
CRs-Fixed: 975249
Change-Id: Iaabe9283ec80954a2e504a55f2b4cdf93ca8ae46
Signed-off-by: Azhar Shaikh <azhars@codeaurora.org>
|
| |\ |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Memory core and memory peripheral blocks should remain
on upon host bus suspend otherwise XHCI controller
fails to respond to XHCI commands upon host bus resume.
These memory blocks will be turned off only upon stopping
host mode or vbus off in device mode.
Change-Id: I1f53c9536b6896111707b77954d2b6cf4d227db8
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
|
| |/
|
|
|
|
|
|
|
|
|
|
| |
USB3 core expects pipe clock input for USB connection establishment
and functionality working. In case of maximum speed of USB3 core set
to HS/FS mode, it is required to disable pipe clock requirement and
instead use UTMI clock from HS PHY as clock input. Hence disable
this pipe clock requirement for the case, where maximum speed is set
to FS as well.
Change-Id: Ife9d6a16e1607b40c71eb1897947bf4645ac9561
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
|
| |
|
|
|
|
|
|
|
|
| |
There is possibility where any control request for USB GSI endpint
e.g. CLEAR_FEATURE racing against USB GSI endpoint operation. Hence
acquire lock for USB GSI endpoint related operations which involves
sending required USB commands for the endpoint operation.
Change-Id: If14af809c443e12bd64e54910602c4aeeca4f0df
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
|
| |\ |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Use extcon notification to select the maximum speed for host as well
as for peripheral mode. Notification handler sets maximum speed based
on the extcon cable state flag. This provides an option to start host
or peripheral in high speed only mode and leave ss phy suspended.
Change-Id: Ic48c661e68a293822d30cbd491e0fe6e46d385c9
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Signed-off-by: Jack Pham <jackp@codeaurora.org>
|
| |/
|
|
|
|
|
|
|
| |
Fix the bug introduced by commit 82d4ec97786d
("usb: Add support for reset controller framework") which
overrides the core clock rate from device tree.
Change-Id: Ic3ef2229fa8552301e09dfb912e79e044a81324f
Signed-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>
|
| |\ |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
When gadget driver sets VBUS current draw, this should
only be applicable if the charger type is SDP. For
other downstream types, such as CDP, it can draw up up
to the maximum (1.5A) without having to follow the rules of
configured/suspended current limits. Further, with Power
Delivery role swap supported, it's possible the gadget (UFP)
is a power source, so vbus_draw() should be no-op'ed.
Change-Id: If7f8233a0eb2644e5534a51a4a4f65212d448382
Signed-off-by: Jack Pham <jackp@codeaurora.org>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
The current api which performs the clock reset is moved to use the reset
framework, so support the changes in USB driver for the same. The reset
framework requires to get reset handle and perform assert/deassert of the
resets.
Change-Id: Ifcde1c6af624294cbd1944eaa9b526dd6dcc51de
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
|
| |/
|
|
|
|
|
|
|
|
|
|
| |
Sometime endpoint command timeout happening after
usb device enumeration. Controller stops responding to
any endpoint commands afterwards. To recover from this
condition restart usb by simulating vbus off and on
except for end transfer command. Also increase the
command timeout from 1500us to 3000us.
Change-Id: I7c1833d844fd432b33158686361e24e66a2fd92c
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
|
| |\ |
|