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path: root/drivers/clk/msm/clock-local2.c
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Diffstat (limited to 'drivers/clk/msm/clock-local2.c')
-rw-r--r--drivers/clk/msm/clock-local2.c37
1 files changed, 3 insertions, 34 deletions
diff --git a/drivers/clk/msm/clock-local2.c b/drivers/clk/msm/clock-local2.c
index adb07cdb7e8d..076ead6aaf34 100644
--- a/drivers/clk/msm/clock-local2.c
+++ b/drivers/clk/msm/clock-local2.c
@@ -1339,34 +1339,6 @@ static struct frac_entry frac_table_810m[] = { /* Link rate of 162M */
{0, 0},
};
-static bool is_same_rcg_config(struct rcg_clk *rcg, struct clk_freq_tbl *freq,
- bool has_mnd)
-{
- u32 cfg;
-
- /* RCG update pending */
- if (readl_relaxed(CMD_RCGR_REG(rcg)) & CMD_RCGR_CONFIG_DIRTY_MASK)
- return false;
- if (has_mnd)
- if (readl_relaxed(M_REG(rcg)) != freq->m_val ||
- readl_relaxed(N_REG(rcg)) != freq->n_val ||
- readl_relaxed(D_REG(rcg)) != freq->d_val)
- return false;
- /*
- * Both 0 and 1 represent same divider value in HW.
- * Always use 0 to simplify comparison.
- */
- if ((freq->div_src_val & CFG_RCGR_DIV_MASK) == 1)
- freq->div_src_val &= ~CFG_RCGR_DIV_MASK;
- cfg = readl_relaxed(CFG_RCGR_REG(rcg));
- if ((cfg & CFG_RCGR_DIV_MASK) == 1)
- cfg &= ~CFG_RCGR_DIV_MASK;
- if (cfg != freq->div_src_val)
- return false;
-
- return true;
-}
-
static int set_rate_edp_pixel(struct clk *clk, unsigned long rate)
{
struct rcg_clk *rcg = to_rcg_clk(clk);
@@ -1404,8 +1376,7 @@ static int set_rate_edp_pixel(struct clk *clk, unsigned long rate)
pixel_freq->d_val = ~frac->den;
}
spin_lock_irqsave(&local_clock_reg_lock, flags);
- if (!is_same_rcg_config(rcg, pixel_freq, true))
- __set_rate_mnd(rcg, pixel_freq);
+ __set_rate_mnd(rcg, pixel_freq);
spin_unlock_irqrestore(&local_clock_reg_lock, flags);
return 0;
}
@@ -1466,8 +1437,7 @@ static int set_rate_byte(struct clk *clk, unsigned long rate)
byte_freq->div_src_val |= BVAL(4, 0, div);
spin_lock_irqsave(&local_clock_reg_lock, flags);
- if (!is_same_rcg_config(rcg, byte_freq, false))
- __set_rate_hid(rcg, byte_freq);
+ __set_rate_hid(rcg, byte_freq);
spin_unlock_irqrestore(&local_clock_reg_lock, flags);
return 0;
@@ -1788,8 +1758,7 @@ static int rcg_clk_set_rate_dp(struct clk *clk, unsigned long rate)
}
spin_lock_irqsave(&local_clock_reg_lock, flags);
- if (!is_same_rcg_config(rcg, freq_tbl, true))
- __set_rate_mnd(rcg, freq_tbl);
+ __set_rate_mnd(rcg, freq_tbl);
spin_unlock_irqrestore(&local_clock_reg_lock, flags);
return 0;
}