summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi16
-rw-r--r--arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dtsi9
-rw-r--r--drivers/clk/msm/virtclk-front-8996.c144
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_gpu.c17
-rw-r--r--drivers/media/i2c/adv7481.c5
-rw-r--r--drivers/misc/qseecom.c2
-rw-r--r--drivers/net/can/spi/k61.c29
-rw-r--r--drivers/platform/msm/ipa/ipa_v2/ipa_flt.c10
-rw-r--r--drivers/platform/msm/ipa/ipa_v3/ipa_flt.c25
-rw-r--r--drivers/spi/spi_qsd.c26
-rw-r--r--drivers/video/fbdev/msm/mdss_mdp_intf_video.c15
11 files changed, 260 insertions, 38 deletions
diff --git a/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi b/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi
index a672b04cbb35..eb78cfd8b133 100644
--- a/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi
+++ b/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi
@@ -36,8 +36,8 @@
pinctrl-0 = <&spi_9_active>;
pinctrl-1 = <&spi_9_sleep>;
clock-names = "iface_clk", "core_clk";
- clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>,
- <&clock_gcc clk_gcc_blsp2_qup3_spi_apps_clk>;
+ clocks = <&clock_virt clk_gcc_blsp2_ahb_clk>,
+ <&clock_virt clk_gcc_blsp2_qup3_spi_apps_clk>;
status = "disabled";
};
@@ -54,8 +54,8 @@
qcom,clk-freq-out = <400000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
- clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,
- <&clock_gcc clk_gcc_blsp1_qup6_i2c_apps_clk>;
+ clocks = <&clock_virt clk_gcc_blsp1_ahb_clk>,
+ <&clock_virt clk_gcc_blsp1_qup6_i2c_apps_clk>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_6_active>;
pinctrl-1 = <&i2c_6_sleep>;
@@ -75,8 +75,8 @@
qcom,clk-freq-out = <400000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
- clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>,
- <&clock_gcc clk_gcc_blsp2_qup2_i2c_apps_clk>;
+ clocks = <&clock_virt clk_gcc_blsp2_ahb_clk>,
+ <&clock_virt clk_gcc_blsp2_qup2_i2c_apps_clk>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_8_active>;
pinctrl-1 = <&i2c_8_sleep>;
@@ -99,8 +99,8 @@
qcom,bam-rx-ep-pipe-index = <3>;
qcom,master-id = <86>;
clock-names = "core_clk", "iface_clk";
- clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,
- <&clock_gcc clk_gcc_blsp1_ahb_clk>;
+ clocks = <&clock_virt clk_gcc_blsp1_uart2_apps_clk>,
+ <&clock_virt clk_gcc_blsp1_ahb_clk>;
pinctrl-names = "sleep", "default";
pinctrl-0 = <&blsp1_uart2_sleep>;
pinctrl-1 = <&blsp1_uart2_active>;
diff --git a/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dtsi b/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dtsi
index 2a9aaf575fb2..5ec05c8011d2 100644
--- a/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dtsi
+++ b/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dtsi
@@ -96,8 +96,8 @@
interrupt-names = "hc_irq", "pwr_irq";
clock-names = "iface_clk", "core_clk";
- clocks = <&clock_gcc clk_gcc_sdcc2_ahb_clk>,
- <&clock_gcc clk_gcc_sdcc2_apps_clk>;
+ clocks = <&clock_virt clk_gcc_sdcc2_ahb_clk>,
+ <&clock_virt clk_gcc_sdcc2_apps_clk>;
qcom,large-address-bus;
qcom,bus-width = <4>;
@@ -696,6 +696,11 @@
qcom,pipe-attr-ee;
};
+ clock_virt: qcom,virtclk-frontend@0 {
+ compatible = "qcom,virtclk-frontend-8996";
+ #clock-cells = <1>;
+ };
+
clock_gcc: qcom,gcc@300000 {
compatible = "qcom,dummycc";
#clock-cells = <1>;
diff --git a/drivers/clk/msm/virtclk-front-8996.c b/drivers/clk/msm/virtclk-front-8996.c
index 84cd55bd85bf..2e978cd3a456 100644
--- a/drivers/clk/msm/virtclk-front-8996.c
+++ b/drivers/clk/msm/virtclk-front-8996.c
@@ -337,6 +337,134 @@ static struct virtclk_front gcc_sdcc2_apps_clk = {
},
};
+static struct virtclk_front gcc_usb3_phy_pipe_clk = {
+ .c = {
+ .dbg_name = "gcc_usb3_phy_pipe_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_usb3_phy_pipe_clk.c),
+ },
+};
+
+static struct virtclk_front gcc_usb3_phy_aux_clk = {
+ .c = {
+ .dbg_name = "gcc_usb3_phy_aux_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_usb3_phy_aux_clk.c),
+ },
+};
+
+static struct virtclk_front gcc_usb30_mock_utmi_clk = {
+ .c = {
+ .dbg_name = "gcc_usb30_mock_utmi_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_usb30_mock_utmi_clk.c),
+ },
+};
+
+static struct virtclk_front gcc_aggre2_usb3_axi_clk = {
+ .c = {
+ .dbg_name = "gcc_aggre2_usb3_axi_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_aggre2_usb3_axi_clk.c),
+ },
+};
+
+static struct virtclk_front gcc_sys_noc_usb3_axi_clk = {
+ .c = {
+ .dbg_name = "gcc_sys_noc_usb3_axi_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_sys_noc_usb3_axi_clk.c),
+ },
+};
+
+static struct virtclk_front gcc_usb30_master_clk = {
+ .c = {
+ .dbg_name = "gcc_usb30_master_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_usb30_master_clk.c),
+ },
+};
+
+static struct virtclk_front gcc_usb30_sleep_clk = {
+ .c = {
+ .dbg_name = "gcc_usb30_sleep_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_usb30_sleep_clk.c),
+ },
+};
+
+static struct virtclk_front gcc_usb_phy_cfg_ahb2phy_clk = {
+ .c = {
+ .dbg_name = "gcc_usb_phy_cfg_ahb2phy_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_usb_phy_cfg_ahb2phy_clk.c),
+ },
+};
+
+static struct virtclk_front gcc_usb3_clkref_clk = {
+ .c = {
+ .dbg_name = "gcc_usb3_clkref_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_usb3_clkref_clk.c),
+ },
+};
+
+static struct virtclk_front hlos1_vote_lpass_adsp_smmu_clk = {
+ .c = {
+ .dbg_name = "gcc_lpass_adsp_smmu_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(hlos1_vote_lpass_adsp_smmu_clk.c),
+ },
+};
+
+static struct virtclk_front gcc_mss_cfg_ahb_clk = {
+ .c = {
+ .dbg_name = "gcc_mss_cfg_ahb_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_mss_cfg_ahb_clk.c),
+ },
+};
+
+static struct virtclk_front gcc_mss_q6_bimc_axi_clk = {
+ .c = {
+ .dbg_name = "gcc_mss_q6_bimc_axi_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_mss_q6_bimc_axi_clk.c),
+ },
+};
+
+static struct virtclk_front gcc_boot_rom_ahb_clk = {
+ .c = {
+ .dbg_name = "gcc_boot_rom_ahb_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_boot_rom_ahb_clk.c),
+ },
+};
+
+static struct virtclk_front gpll0_out_msscc = {
+ .c = {
+ .dbg_name = "gcc_mss_gpll0_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gpll0_out_msscc.c),
+ },
+};
+
+static struct virtclk_front gcc_mss_snoc_axi_clk = {
+ .c = {
+ .dbg_name = "gcc_mss_snoc_axi_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_mss_snoc_axi_clk.c),
+ },
+};
+
+static struct virtclk_front gcc_mss_mnoc_bimc_axi_clk = {
+ .c = {
+ .dbg_name = "gcc_mss_mnoc_bimc_axi_clk",
+ .ops = &virtclk_front_ops,
+ CLK_INIT(gcc_mss_mnoc_bimc_axi_clk.c),
+ },
+};
+
static struct clk_lookup msm_clocks_8996[] = {
CLK_LIST(gcc_blsp1_ahb_clk),
CLK_LIST(gcc_blsp1_qup1_spi_apps_clk),
@@ -378,6 +506,22 @@ static struct clk_lookup msm_clocks_8996[] = {
CLK_LIST(gcc_blsp2_uart6_apps_clk),
CLK_LIST(gcc_sdcc2_ahb_clk),
CLK_LIST(gcc_sdcc2_apps_clk),
+ CLK_LIST(gcc_usb3_phy_pipe_clk),
+ CLK_LIST(gcc_usb3_phy_aux_clk),
+ CLK_LIST(gcc_usb30_mock_utmi_clk),
+ CLK_LIST(gcc_aggre2_usb3_axi_clk),
+ CLK_LIST(gcc_sys_noc_usb3_axi_clk),
+ CLK_LIST(gcc_usb30_master_clk),
+ CLK_LIST(gcc_usb30_sleep_clk),
+ CLK_LIST(gcc_usb_phy_cfg_ahb2phy_clk),
+ CLK_LIST(gcc_usb3_clkref_clk),
+ CLK_LIST(hlos1_vote_lpass_adsp_smmu_clk),
+ CLK_LIST(gcc_mss_cfg_ahb_clk),
+ CLK_LIST(gcc_mss_q6_bimc_axi_clk),
+ CLK_LIST(gcc_boot_rom_ahb_clk),
+ CLK_LIST(gpll0_out_msscc),
+ CLK_LIST(gcc_mss_snoc_axi_clk),
+ CLK_LIST(gcc_mss_mnoc_bimc_axi_clk),
};
static const struct of_device_id msm8996_virtclk_front_match_table[] = {
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 8986ba6c110b..16b10b608855 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -397,14 +397,6 @@ static int _adreno_get_pwrlevels(struct msm_gpu *gpu, struct device_node *node)
{
struct device_node *child;
- gpu->active_level = 1;
-
- /* The device tree will tell us the best clock to initialize with */
- of_property_read_u32(node, "qcom,initial-pwrlevel", &gpu->active_level);
-
- if (gpu->active_level >= ARRAY_SIZE(gpu->gpufreq))
- gpu->active_level = 1;
-
for_each_child_of_node(node, child) {
unsigned int index;
@@ -453,6 +445,15 @@ static int adreno_get_pwrlevels(struct msm_gpu *gpu, struct device_node *parent)
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
struct device_node *node, *child;
+ gpu->active_level = 1;
+
+ /* The device tree will tell us the best clock to initialize with */
+ of_property_read_u32(parent, "qcom,initial-pwrlevel",
+ &gpu->active_level);
+
+ if (gpu->active_level >= ARRAY_SIZE(gpu->gpufreq))
+ gpu->active_level = 1;
+
/* See if the target has defined a number of power bins */
node = of_find_node_by_name(parent, "qcom,gpu-pwrlevel-bins");
if (!node) {
diff --git a/drivers/media/i2c/adv7481.c b/drivers/media/i2c/adv7481.c
index 74d7b9584827..19c237e8a286 100644
--- a/drivers/media/i2c/adv7481.c
+++ b/drivers/media/i2c/adv7481.c
@@ -2449,7 +2449,6 @@ static int adv7481_remove(struct platform_device *pdev)
return 0;
}
-#ifdef CONFIG_PM_SLEEP
static int adv7481_suspend(struct device *dev)
{
struct adv7481_state *state;
@@ -2487,10 +2486,6 @@ static int adv7481_resume(struct device *dev)
static SIMPLE_DEV_PM_OPS(adv7481_pm_ops, adv7481_suspend, adv7481_resume);
#define ADV7481_PM_OPS (&adv7481_pm_ops)
-#else
-#define ADV7481_PM_OPS NULL
-#endif
-
static struct platform_driver adv7481_driver = {
.driver = {
.owner = THIS_MODULE,
diff --git a/drivers/misc/qseecom.c b/drivers/misc/qseecom.c
index 313506143d98..16dd7dd37f78 100644
--- a/drivers/misc/qseecom.c
+++ b/drivers/misc/qseecom.c
@@ -1729,7 +1729,7 @@ static int __qseecom_process_incomplete_cmd(struct qseecom_dev_handle *data,
if (ptr_svc->svc.listener_id != lstnr) {
pr_warn("Service requested does not exist\n");
__qseecom_qseos_fail_return_resp_tz(data, resp,
- &send_data_rsp, ptr_svc, lstnr);
+ &send_data_rsp, NULL, lstnr);
return -ERESTARTSYS;
}
pr_debug("waking up rcv_req_wq and waiting for send_resp_wq\n");
diff --git a/drivers/net/can/spi/k61.c b/drivers/net/can/spi/k61.c
index 9ce0ad854caa..84c13a1c04a5 100644
--- a/drivers/net/can/spi/k61.c
+++ b/drivers/net/can/spi/k61.c
@@ -23,6 +23,7 @@
#include <linux/of_device.h>
#include <linux/of_gpio.h>
#include <linux/uaccess.h>
+#include <linux/pm.h>
#define DEBUG_K61 0
#if DEBUG_K61 == 1
@@ -921,11 +922,39 @@ static const struct of_device_id k61_match_table[] = {
{ }
};
+#ifdef CONFIG_PM
+static int k61_suspend(struct device *dev)
+{
+ struct spi_device *spi = to_spi_device(dev);
+
+ enable_irq_wake(spi->irq);
+ return 0;
+}
+
+static int k61_resume(struct device *dev)
+{
+ struct spi_device *spi = to_spi_device(dev);
+ struct k61_can *priv_data = spi_get_drvdata(spi);
+
+ disable_irq_wake(spi->irq);
+ k61_rx_message(priv_data);
+ return 0;
+}
+
+static const struct dev_pm_ops k61_dev_pm_ops = {
+ .suspend = k61_suspend,
+ .resume = k61_resume,
+};
+#endif
+
static struct spi_driver k61_driver = {
.driver = {
.name = "k61",
.of_match_table = k61_match_table,
.owner = THIS_MODULE,
+#ifdef CONFIG_PM
+ .pm = &k61_dev_pm_ops,
+#endif
},
.probe = k61_probe,
.remove = k61_remove,
diff --git a/drivers/platform/msm/ipa/ipa_v2/ipa_flt.c b/drivers/platform/msm/ipa/ipa_v2/ipa_flt.c
index c0af295c7362..834f028d3e48 100644
--- a/drivers/platform/msm/ipa/ipa_v2/ipa_flt.c
+++ b/drivers/platform/msm/ipa/ipa_v2/ipa_flt.c
@@ -1039,6 +1039,11 @@ static int __ipa_add_flt_rule(struct ipa_flt_tbl *tbl, enum ipa_ip_type ip,
goto error;
}
}
+ } else {
+ if (rule->rt_tbl_idx > 0) {
+ IPAERR_RL("invalid RT tbl\n");
+ goto error;
+ }
}
entry = kmem_cache_zalloc(ipa_ctx->flt_rule_cache, GFP_KERNEL);
@@ -1160,6 +1165,11 @@ static int __ipa_mdfy_flt_rule(struct ipa_flt_rule_mdfy *frule,
goto error;
}
}
+ } else {
+ if (frule->rule.rt_tbl_idx > 0) {
+ IPAERR_RL("invalid RT tbl\n");
+ goto error;
+ }
}
entry->rule = frule->rule;
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_flt.c b/drivers/platform/msm/ipa/ipa_v3/ipa_flt.c
index a03d8978c6c2..ced8c8b2d3ab 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_flt.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_flt.c
@@ -757,10 +757,16 @@ static int __ipa_validate_flt_rule(const struct ipa_flt_rule *rule,
goto error;
}
}
+ } else {
+ if (rule->rt_tbl_idx > 0) {
+ IPAERR("invalid RT tbl\n");
+ goto error;
+ }
}
if (rule->rule_id) {
- if (!(rule->rule_id & ipahal_get_rule_id_hi_bit())) {
+ if ((rule->rule_id < ipahal_get_rule_id_hi_bit()) ||
+ (rule->rule_id >= ((ipahal_get_rule_id_hi_bit()<<1)-1))) {
IPAERR("invalid rule_id provided 0x%x\n"
"rule_id with bit 0x%x are auto generated\n",
rule->rule_id, ipahal_get_rule_id_hi_bit());
@@ -866,7 +872,8 @@ static int __ipa_add_flt_rule(struct ipa3_flt_tbl *tbl, enum ipa_ip_type ip,
ipa_insert_failed:
list_del(&entry->link);
/* if rule id was allocated from idr, remove it */
- if (!(entry->rule_id & ipahal_get_rule_id_hi_bit()))
+ if ((entry->rule_id < ipahal_get_rule_id_hi_bit()) &&
+ (entry->rule_id >= ipahal_get_low_rule_id()))
idr_remove(&entry->tbl->rule_ids, entry->rule_id);
kmem_cache_free(ipa3_ctx->flt_rule_cache, entry);
@@ -913,7 +920,8 @@ static int __ipa_add_flt_rule_after(struct ipa3_flt_tbl *tbl,
ipa_insert_failed:
list_del(&entry->link);
/* if rule id was allocated from idr, remove it */
- if (!(entry->rule_id & ipahal_get_rule_id_hi_bit()))
+ if ((entry->rule_id < ipahal_get_rule_id_hi_bit()) &&
+ (entry->rule_id >= ipahal_get_low_rule_id()))
idr_remove(&entry->tbl->rule_ids, entry->rule_id);
kmem_cache_free(ipa3_ctx->flt_rule_cache, entry);
@@ -947,7 +955,8 @@ static int __ipa_del_flt_rule(u32 rule_hdl)
entry->tbl->rule_cnt, entry->rule_id);
entry->cookie = 0;
/* if rule id was allocated from idr, remove it */
- if (!(entry->rule_id & ipahal_get_rule_id_hi_bit()))
+ if ((entry->rule_id < ipahal_get_rule_id_hi_bit()) &&
+ (entry->rule_id >= ipahal_get_low_rule_id()))
idr_remove(&entry->tbl->rule_ids, entry->rule_id);
kmem_cache_free(ipa3_ctx->flt_rule_cache, entry);
@@ -1003,6 +1012,11 @@ static int __ipa_mdfy_flt_rule(struct ipa_flt_rule_mdfy *frule,
goto error;
}
}
+ } else {
+ if (frule->rule.rt_tbl_idx > 0) {
+ IPAERR_RL("invalid RT tbl\n");
+ goto error;
+ }
}
entry->rule = frule->rule;
@@ -1367,7 +1381,8 @@ int ipa3_reset_flt(enum ipa_ip_type ip)
if (entry->rt_tbl)
entry->rt_tbl->ref_cnt--;
/* if rule id was allocated from idr, remove it */
- if (!(entry->rule_id & ipahal_get_rule_id_hi_bit()))
+ if ((entry->rule_id < ipahal_get_rule_id_hi_bit()) &&
+ (entry->rule_id >= ipahal_get_low_rule_id()))
idr_remove(&entry->tbl->rule_ids,
entry->rule_id);
entry->cookie = 0;
diff --git a/drivers/spi/spi_qsd.c b/drivers/spi/spi_qsd.c
index 73396072a052..5c56001e36db 100644
--- a/drivers/spi/spi_qsd.c
+++ b/drivers/spi/spi_qsd.c
@@ -54,6 +54,7 @@ static inline void msm_spi_dma_unmap_buffers(struct msm_spi *dd);
static int get_local_resources(struct msm_spi *dd);
static void put_local_resources(struct msm_spi *dd);
static void msm_spi_slv_setup(struct msm_spi *dd);
+static inline int msm_spi_wait_valid(struct msm_spi *dd);
static inline int msm_spi_configure_gsbi(struct msm_spi *dd,
struct platform_device *pdev)
@@ -84,18 +85,22 @@ static inline int msm_spi_configure_gsbi(struct msm_spi *dd,
return 0;
}
-static inline void msm_spi_register_init(struct msm_spi *dd)
+static inline int msm_spi_register_init(struct msm_spi *dd)
{
- if (dd->pdata->is_slv_ctrl)
+ if (dd->pdata->is_slv_ctrl) {
writel_relaxed(0x00000002, dd->base + SPI_SW_RESET);
- else
+ if (msm_spi_wait_valid(dd))
+ return -EIO;
+ } else {
writel_relaxed(0x00000001, dd->base + SPI_SW_RESET);
+ }
msm_spi_set_state(dd, SPI_OP_STATE_RESET);
writel_relaxed(0x00000000, dd->base + SPI_OPERATIONAL);
writel_relaxed(0x00000000, dd->base + SPI_CONFIG);
writel_relaxed(0x00000000, dd->base + SPI_IO_MODES);
if (dd->qup_ver)
writel_relaxed(0x00000000, dd->base + QUP_OPERATIONAL_MASK);
+ return 0;
}
static int msm_spi_pinctrl_init(struct msm_spi *dd)
@@ -1561,10 +1566,11 @@ static inline void msm_spi_set_cs(struct spi_device *spi, bool set_flag)
pm_runtime_put_autosuspend(dd->dev);
}
-static void reset_core(struct msm_spi *dd)
+static int reset_core(struct msm_spi *dd)
{
u32 spi_ioc;
- msm_spi_register_init(dd);
+ if (msm_spi_register_init(dd))
+ return -EIO;
/*
* The SPI core generates a bogus input overrun error on some targets,
* when a transition from run to reset state occurs and if the FIFO has
@@ -1581,6 +1587,7 @@ static void reset_core(struct msm_spi *dd)
*/
mb();
msm_spi_set_state(dd, SPI_OP_STATE_RESET);
+ return 0;
}
static void put_local_resources(struct msm_spi *dd)
@@ -1694,7 +1701,11 @@ static int msm_spi_transfer_one(struct spi_master *master,
return -EINVAL;
}
- reset_core(dd);
+ if (reset_core(dd)) {
+ mutex_unlock(&dd->core_lock);
+ spi_finalize_current_message(master);
+ return -EIO;
+ }
if (dd->use_dma) {
msm_spi_bam_pipe_connect(dd, &dd->bam.prod,
&dd->bam.prod.config);
@@ -2450,7 +2461,8 @@ static int init_resources(struct platform_device *pdev)
}
}
- msm_spi_register_init(dd);
+ if (msm_spi_register_init(dd))
+ goto err_spi_state;
/*
* The SPI core generates a bogus input overrun error on some targets,
* when a transition from run to reset state occurs and if the FIFO has
diff --git a/drivers/video/fbdev/msm/mdss_mdp_intf_video.c b/drivers/video/fbdev/msm/mdss_mdp_intf_video.c
index bdf6705ef597..335614a33aaf 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_intf_video.c
+++ b/drivers/video/fbdev/msm/mdss_mdp_intf_video.c
@@ -2458,10 +2458,21 @@ static int mdss_mdp_video_early_wake_up(struct mdss_mdp_ctl *ctl)
* lot of latency rendering the input events useless in preventing the
* idle time out.
*/
- if (ctl->mfd->idle_state == MDSS_FB_IDLE_TIMER_RUNNING) {
- if (ctl->mfd->idle_time)
+ if ((ctl->mfd->idle_state == MDSS_FB_IDLE_TIMER_RUNNING) ||
+ (ctl->mfd->idle_state == MDSS_FB_IDLE)) {
+ /*
+ * Modify the idle time so that an idle fallback can be
+ * triggered for those cases, where we have no update
+ * despite of a touch event and idle time is 0.
+ */
+ if (!ctl->mfd->idle_time) {
+ ctl->mfd->idle_time = 70;
+ schedule_delayed_work(&ctl->mfd->idle_notify_work,
+ msecs_to_jiffies(200));
+ } else {
mod_delayed_work(system_wq, &ctl->mfd->idle_notify_work,
msecs_to_jiffies(ctl->mfd->idle_time));
+ }
pr_debug("Delayed idle time\n");
} else {
pr_debug("Nothing to done for this state (%d)\n",
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-23 14:12:06 +0000