total_size = 0 # in bytes
start_up_time_us = 0 # time to wait before communicating with the device after power up

# Three responses to JEDEC command 0x9f. Used to detect the device
manufacturer_id = 0
memory_type = 0
capacity = 0

# Max clock speed for all operations and the fastest read mode. May not be
# achievable on a particular board.
max_clock_speed_mhz = 0

# Bitmask for Quad Enable bit if present. 0x00 otherwise. This is for the first byte in the status
# register when single_status_byte = true, and the second status byte when false.
quad_enable_bit_mask = 0x0

has_sector_protection = false

# Supports the 0x0b fast read command with 8 dummy cycles.
supports_fast_read = false

# Designations like 1-1-4 dictate parallelism in the command, address and data
# phases. For example, 1-1-4 is 1 bit per clock for command and address but 4
# data bits per clock.

# Supports the fast read, quad output (1-1-4) command 0x6b with 8 dummy cycles.
6b_quad_read = false

# Supports the quad input page program command 0x32. This is known as 1-1-4 because it only
# uses all four lines for data.
32_qspi_write = false

# Supports a separate command 0x31 to write to the second byte of the status register.
# Status byte zero is written with 0x01 and the third byte with 0x11.
write_status_register_split = false

# Supports writing 16 bits to the status register's first two bytes via command
# 0x01.
01_continuous_status_write = false

# Status byte number that contains the quad enable bit. (1-based to match flash docs)
quad_enable_status_byte = 1

# Does not support using a ready bit within the status register
no_ready_bit = false

# Does not support the erase command (0x20)
no_erase_cmd = false

# Device does not have a reset command
no_reset_cmd = false

# True when the device supports command 0xe7 for 1-4-4 reads on 4 byte (aka word)
# boundaries with only two dummy cycles after the mode byte.
e7_quad_word_read = false