/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/*
 * As a general rule, only version-specific property overrides should be placed
 * inside this file. Common device definitions should be placed inside the
 * msm8996.dtsi file.
 */

#include "msm8996.dtsi"
#include "msm8996-coresight-v2.dtsi"
#include "msm-arm-smmu-impl-defs-8996-v2.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. MSM 8996 v2";
	qcom,msm-id = <246 0x20001>;
};

&clock_gcc {
	compatible = "qcom,gcc-8996-v2";
};

&clock_debug {
	compatible = "qcom,cc-debug-8996-v2";
};

&clock_mmss {
	compatible = "qcom,mmsscc-8996-v2";
};

&clock_gpu {
	compatible = "qcom,gpucc-8996-v2";
	qcom,gfx3d_clk_src_v2-opp-handle = <&msm_gpu>;
	qcom,gfxfreq-speedbin0 =
		<	   0  0  0 >,
		<  125000000  3  4 >,
		<  210000000  3  4 >,
		<  300000000  3  4 >,
		<  500000000  4  5 >,
		<  604800000  5  7 >;
	qcom,gfxfreq-mx-speedbin0 =
		<	   0  0 >,
		<  125000000  4 >,
		<  210000000  4 >,
		<  300000000  4 >,
		<  500000000  5 >,
		<  604800000  7 >;
};

&gdsc_gpu_gx {
	clock-names = "core_clk", "core_root_clk";
	clocks = <&clock_gpu clk_gpu_gx_gfx3d_clk>,
		 <&clock_gpu clk_gfx3d_clk_src_v2>;
};

&pm8994_s11 {
	regulator-max-microvolt = <1015000>;
	/delete-property/ qcom,recal-mask;
};

&pm8994_s11_limit {
	regulator-max-microvolt = <1015000>;
};

&apc_apm {
	 /delete-property/ qcom,clock-source-override;
};

&apcc_cpr {
	compatible = "qcom,cpr3-msm8996-v2-hmss-regulator";

	qcom,cpr-count-mode = <2>;		/* Staggered */
	/delete-property/ qcom,cpr-count-repeat;
	/delete-property/ mem-acc-thread0-supply;
	/delete-property/ mem-acc-thread1-supply;
	/delete-property/ mem-acc-supply;

	qcom,apm-ctrl = <&apc_apm>;
	qcom,apm-threshold-voltage = <850000>;
	qcom,apm-hysteresis-voltage = <5000>;

	qcom,cpr-enable;
	qcom,cpr-hw-closed-loop;

	/delete-property/ qcom,cpr-aging-ref-voltage;
	/delete-property/ proxy-supply;

	thread@0 {
		qcom,cpr-consecutive-down = <2>;
		qcom,cpr-up-threshold = <0>;
	};

	thread@1 {
		qcom,cpr-consecutive-down = <2>;
		qcom,cpr-up-threshold = <0>;
	};
};

&apc0_pwrcl_vreg {
	regulator-min-microvolt = <1>;
	regulator-max-microvolt = <19>;

	qcom,cpr-fuse-corners = <5>;
	qcom,cpr-fuse-combos = <4>;
	/delete-property/ qcom,cpr-speed-bins;
	/delete-property/ qcom,cpr-speed-bin-corners;
	/delete-property/ qcom,uses-mem-acc;
	qcom,cpr-corners = <19>;

	qcom,ldo-max-voltage = <805000>;

	qcom,cpr-corner-fmax-map = <1 2 6 11 19>;

	qcom,cpr-voltage-ceiling =
		<670000  670000  745000  745000  745000  745000  905000  905000
		 905000  905000  905000 1015000 1015000 1015000 1015000 1015000
		1015000 1015000 1015000>;
	qcom,cpr-voltage-floor =
		<470000  470000  470000  470000  470000  470000  470000  470000
		 470000  470000  470000  470000  470000  470000  470000  470000
		 470000  470000  470000>;
	qcom,cpr-floor-to-ceiling-max-range =
		 <80000   80000   80000   80000   80000   80000   80000   80000
		  80000   80000   80000   80000   80000   80000   80000   80000
		  80000   80000   80000>;

	qcom,corner-frequencies =
		<192000000  268800000  307200000  345600000  403200000
		 480000000  576000000  633600000  729600000  806400000
		 883200000  960000000 1017600000 1113600000 1190400000
		1267200000 1344000000 1420800000 1459200000>;

	qcom,cpr-ro-scaling-factor =
	      <   0    0    0    0 2222 2275 2506 2491 2649 2640 2886 2866    0
		  0    0    0>,
	      <   0    0    0    0 2222 2275 2506 2491 2649 2640 2886 2866    0
		  0    0    0>,
	      <   0    0    0    0 2222 2275 2506 2491 2649 2640 2886 2866    0
		  0    0    0>,
	      <   0    0    0    0 2147 2226 2310 2312 2450 2447 2603 2600    0
		  0    0    0>,
	      <   0    0    0    0 1989 2079 2066 2083 2193 2201 2283 2296    0
		  0    0    0>;

	qcom,cpr-open-loop-voltage-fuse-adjustment =
		<0 0 0 0 0>,
		<0 0 0 0 0>,
		<0 0 0 0 0>,
		<0 0 0 0 0>;
	qcom,cpr-closed-loop-voltage-fuse-adjustment =
		<0 0 0 0 0>,
		<0 0 0 0 0>,
		<0 0 0 0 0>,
		<0 0 0 0 0>;

	/delete-property/ qcom,cpr-open-loop-voltage-adjustment;
	/delete-property/ qcom,cpr-open-loop-voltage-min-diff;
	/delete-property/ qcom,cpr-closed-loop-voltage-adjustment;

	/delete-property/ qcom,cpr-aging-max-voltage-adjustment;
	/delete-property/ qcom,cpr-aging-ref-corner;
	/delete-property/ qcom,cpr-aging-ro-scaling-factor;
	/delete-property/ qcom,allow-aging-voltage-adjustment;
};

&apc0_cbf_vreg {
	regulator-min-microvolt = <1>;
	regulator-max-microvolt = <10>;

	qcom,cpr-fuse-corners = <5>;
	qcom,cpr-fuse-combos = <4>;
	/delete-property/ qcom,cpr-speed-bins;
	/delete-property/ qcom,cpr-speed-bin-corners;
	qcom,cpr-corners = <10>;

	qcom,cpr-corner-fmax-map = <1 2 5 9 10>;

	qcom,cpr-voltage-ceiling =
	       <605000  670000  745000  745000  745000  905000  905000  905000
		905000 1015000>;
	qcom,cpr-voltage-floor =
	       <470000  470000  470000  470000  470000  470000  470000  470000
		470000  470000>;
	qcom,cpr-floor-to-ceiling-max-range =
		<80000   80000   80000   80000   80000   80000   80000   80000
		 80000   80000>;

	qcom,corner-frequencies =
		<150000000  307200000  384000000  499200000  595200000
		 691200000  787200000  883200000  960000000 1036800000>;

	qcom,cpr-ro-scaling-factor =
	      <   0    0    0    0 2222 2275 2506 2491 2649 2640 2886 2866    0
		  0    0    0>,
	      <   0    0    0    0 2222 2275 2506 2491 2649 2640 2886 2866    0
		  0    0    0>,
	      <   0    0    0    0 2222 2275 2506 2491 2649 2640 2886 2866    0
		  0    0    0>,
	      <   0    0    0    0 2147 2226 2310 2312 2450 2447 2603 2600    0
		  0    0    0>,
	      <   0    0    0    0 1989 2079 2066 2083 2193 2201 2283 2296    0
		  0    0    0>;

	qcom,cpr-open-loop-voltage-fuse-adjustment =
		<0 0 0 0 0>,
		<0 0 0 0 0>,
		<0 0 0 0 (-130000)>,
		<0 0 0 0 (-130000)>;
	qcom,cpr-closed-loop-voltage-fuse-adjustment =
		<0 0 0 0 0>,
		<0 0 0 0 0>,
		<0 0 0 0 (-115000)>,
		<0 0 0 0 (-115000)>;

	/delete-property/ qcom,cpr-aging-max-voltage-adjustment;
	/delete-property/ qcom,cpr-aging-ref-corner;
	/delete-property/ qcom,cpr-aging-ro-scaling-factor;
	/delete-property/ qcom,allow-aging-voltage-adjustment;
	/delete-property/ qcom,proxy-consumer-enable;
	/delete-property/ qcom,proxy-consumer-voltage;
};

&apc1_vreg {
	regulator-min-microvolt = <1>;
	regulator-max-microvolt = <18>;

	qcom,cpr-fuse-corners = <5>;
	qcom,cpr-fuse-combos = <4>;
	/delete-property/ qcom,cpr-speed-bins;
	/delete-property/ qcom,cpr-speed-bin-corners;
	/delete-property/ qcom,uses-mem-acc;
	qcom,cpr-corners = <18>;

	qcom,ldo-max-voltage = <805000>;

	qcom,cpr-corner-fmax-map = <1 3 5 11 18>;

	qcom,cpr-voltage-ceiling =
		<670000  670000  670000  745000  745000  905000  905000  905000
		 905000  905000  905000 1015000 1015000 1015000 1015000 1015000
		 1015000 1015000>;
	qcom,cpr-voltage-floor =
		<470000  470000  470000  470000  470000  470000  470000  470000
		 470000  470000  470000  470000  470000  470000  470000  470000
		 470000  470000>;
	qcom,cpr-floor-to-ceiling-max-range =
		 <80000   80000   80000   80000   80000   80000   80000   80000
		  80000   80000   80000   80000   80000   80000   80000   80000
		  80000   80000>;

	qcom,corner-frequencies =
		<307200000  345600000  403200000  480000000  576000000
		 633600000  729600000  806400000  883200000  960000000
		1017600000 1113600000 1190400000 1267200000 1344000000
		1420800000 1497600000 1593600000>;

	qcom,cpr-ro-scaling-factor =
	      <   0    0    0    0 2212 2273 2517 2506 2663 2650 2908 2891    0
		  0    0    0>,
	      <   0    0    0    0 2212 2273 2517 2506 2663 2650 2908 2891    0
		  0    0    0>,
	      <   0    0    0    0 2212 2273 2517 2506 2663 2650 2908 2891    0
		  0    0    0>,
	      <   0    0    0    0 2152 2237 2321 2337 2475 2469 2636 2612    0
		  0    0    0>,
	      <   0    0    0    0 2001 2102 2092 2090 2203 2210 2297 2297    0
		  0    0    0>;

	qcom,cpr-open-loop-voltage-fuse-adjustment =
		<0 0 0 5000 0>,
		<0 0 0 5000 0>,
		<0 0 0 0 0>,
		<0 0 0 0 0>;
	qcom,cpr-closed-loop-voltage-fuse-adjustment =
		<0 0 0 20000 0>,
		<0 0 0 20000 0>,
		<0 0 0 0 0>,
		<0 0 0 0 0>;

	/delete-property/ qcom,cpr-open-loop-voltage-adjustment;
	/delete-property/ qcom,cpr-open-loop-voltage-min-diff;
	/delete-property/ qcom,cpr-closed-loop-voltage-adjustment;

	/delete-property/ qcom,cpr-aging-max-voltage-adjustment;
	/delete-property/ qcom,cpr-aging-ref-corner;
	/delete-property/ qcom,cpr-aging-ro-scaling-factor;
	/delete-property/ qcom,allow-aging-voltage-adjustment;

	/delete-property/ qcom,cpr-dynamic-floor-corner;
};

&gfx_cpr {
	system-supply = <&pm8994_s1_corner>;
	qcom,cpr-enable;

	/delete-property/ qcom,cpr-aging-ref-voltage;
};

&gfx_vreg {
	regulator-min-microvolt = <2>;
	regulator-max-microvolt = <5>;

	qcom,cpr-fuse-corners = <4>;
	qcom,cpr-fuse-combos = <8>;
	qcom,cpr-corners = <5>;

	qcom,cpr-corner-fmax-map = <2 3 4 5>;

	qcom,cpr-voltage-ceiling =
		<400000 670000  745000  905000 1015000>;
	qcom,cpr-voltage-floor =
		<400000 520000  520000  520000  520000>;

	qcom,system-voltage = <2 2 2 2 4>;
	qcom,mem-acc-voltage = <1 1 1 2 2>;

	qcom,corner-frequencies =
		<0 210000000 300000000 500000000 604800000>;

	qcom,cpr-target-quotients =
	      <   0    0    0    0  249  232    0  394    0  422    0    0    0
		  0    0    0>,
	      <   0    0    0    0  249  232    0  394    0  422    0    0    0
		  0    0    0>,
	      <   0    0    0    0  400  363    0  565    0  603    0    0    0
		  0    0    0>,
	      <   0    0    0    0  669  601    0  851    0  905    0    0    0
		  0    0    0>,
	      <   0    0    0    0  899  806    0 1084    0 1149    0    0    0
		  0    0    0>;

	qcom,cpr-ro-scaling-factor =
	      <   0    0    0    0 2268 2004    0 2408    0 2539    0    0    0
		  0    0    0>,
	      <   0    0    0    0 2268 2004    0 2408    0 2539    0    0    0
		  0    0    0>,
	      <   0    0    0    0 2268 2004    0 2408    0 2539    0    0    0
		  0    0    0>,
	      <   0    0    0    0 2268 2004    0 2408    0 2539    0    0    0
		  0    0    0>,
	      <   0    0    0    0 2268 2004    0 2408    0 2539    0    0    0
		  0    0    0>;

	qcom,cpr-open-loop-voltage-fuse-adjustment =
		<0 (-5000) (-30000) (-115000)>;
	qcom,cpr-closed-loop-voltage-adjustment =
		<0 0 0 (-10000) (-65000)>;
	qcom,cpr-floor-to-ceiling-max-range =
		<0 130000 40000 85000 85000>;

	/delete-property/ qcom,cpr-fused-closed-loop-voltage-adjustment-map;

	/delete-property/ qcom,cpr-aging-max-voltage-adjustment;
	/delete-property/ qcom,cpr-aging-ref-corner;
	/delete-property/ qcom,cpr-aging-ro-scaling-factor;
	/delete-property/ qcom,allow-aging-voltage-adjustment;
};

&kryo0_vreg {
	regulator-min-microvolt = <468864>;
	regulator-max-microvolt = <808896>;
	qcom,vref-functional-step-voltage = <4048>;
	qcom,vref-functional-min-voltage = <294800>;
	qcom,vref-retention-step-voltage = <4462>;
	qcom,vref-retention-min-voltage = <324950>;
	qcom,ldo-config-init = <0x31f0e471>;
};

&kryo0_retention_vreg {
	regulator-min-microvolt = <467734>;
	regulator-max-microvolt = <891624>;
};

&kryo1_vreg {
	regulator-min-microvolt = <468864>;
	regulator-max-microvolt = <808896>;
	qcom,vref-functional-step-voltage = <4048>;
	qcom,vref-functional-min-voltage = <294800>;
	qcom,vref-retention-step-voltage = <4462>;
	qcom,vref-retention-min-voltage = <324950>;
	qcom,ldo-config-init = <0x31f0e471>;
};

&kryo1_retention_vreg {
	regulator-min-microvolt = <467734>;
	regulator-max-microvolt = <891624>;
};

&apc0_pwrcl_mem_acc_vreg {
	status = "disabled";
};

&apc1_perfcl_mem_acc_vreg {
	status = "disabled";
};

&apcc_l3_mem_acc_vreg {
	status = "disabled";
};

/* GPU overrides */
&msm_gpu {
	/* Updated chip ID */
	qcom,chipid = <0x05030001>;

	qcom,initial-pwrlevel = <3>;
	qcom,bus-width = <32>;

	/* Quirks */
	qcom,gpu-quirk-two-pass-use-wfi;
	qcom,gpu-quirk-iommu-sync;
	qcom,gpu-quirk-fault-detect-mask;

	/* Power levels */
	qcom,gpu-pwrlevels {
		#address-cells = <1>;
		#size-cells = <0>;

		compatible = "qcom,gpu-pwrlevels";

		qcom,gpu-pwrlevel@0 {
			reg = <0>;
			qcom,gpu-freq = <604800000>;
			qcom,bus-freq = <11>;
			qcom,bus-min = <10>;
			qcom,bus-max = <11>;
		};

		qcom,gpu-pwrlevel@1 {
			reg = <1>;
			qcom,gpu-freq = <500000000>;
			qcom,bus-freq = <9>;
			qcom,bus-min = <8>;
			qcom,bus-max = <10>;
		};

		qcom,gpu-pwrlevel@2 {
			reg = <2>;
			qcom,gpu-freq = <300000000>;
			qcom,bus-freq = <6>;
			qcom,bus-min = <5>;
			qcom,bus-max = <7>;
		};

		qcom,gpu-pwrlevel@3 {
			reg = <3>;
			qcom,gpu-freq = <210000000>;
			qcom,bus-freq = <4>;
			qcom,bus-min = <3>;
			qcom,bus-max = <5>;
		};

		qcom,gpu-pwrlevel@4 {
			reg = <4>;
			qcom,gpu-freq = <125000000>;
			qcom,bus-freq = <2>;
			qcom,bus-min = <1>;
			qcom,bus-max = <3>;
		};
		qcom,gpu-pwrlevel@5 {
			reg = <5>;
			qcom,gpu-freq = <27000000>;
			qcom,bus-freq = <0>;
			qcom,bus-min = <0>;
			qcom,bus-max = <0>;
		};
	};
};

&mdss_mdp {
	gdsc-venus-supply = <&gdsc_venus>;
};

&mdss_dsi {
	gdsc-venus-supply = <&gdsc_venus>;
	qcom,core-supply-entries {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,core-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "gdsc-venus";
			qcom,supply-min-voltage = <0>;
			qcom,supply-max-voltage = <0>;
			qcom,supply-enable-load = <0>;
			qcom,supply-disable-load = <0>;
		};

		qcom,core-supply-entry@1 {
			reg = <1>;
			qcom,supply-name = "gdsc";
			qcom,supply-min-voltage = <0>;
			qcom,supply-max-voltage = <0>;
			qcom,supply-enable-load = <0>;
			qcom,supply-disable-load = <0>;
		};
	};
};

&mdss_hdmi_tx {
	hpd-gdsc-venus-supply = <&gdsc_venus>;
	qcom,supply-names = "hpd-gdsc-venus", "hpd-gdsc";
	qcom,min-voltage-level = <0 0>;
	qcom,max-voltage-level = <0 0>;
	qcom,enable-load = <0 0>;
	qcom,disable-load = <0 0>;
};

&mdss_dsi0_pll {
	gdsc-venus-supply = <&gdsc_venus>;
	qcom,platform-supply-entries {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,platform-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "gdsc-venus";
			qcom,supply-min-voltage = <0>;
			qcom,supply-max-voltage = <0>;
			qcom,supply-enable-load = <0>;
			qcom,supply-disable-load = <0>;
		};

		qcom,platform-supply-entry@1 {
			reg = <1>;
			qcom,supply-name = "gdsc";
			qcom,supply-min-voltage = <0>;
			qcom,supply-max-voltage = <0>;
			qcom,supply-enable-load = <0>;
			qcom,supply-disable-load = <0>;
		};
	};
};

&mdss_dsi1_pll {
	gdsc-venus-supply = <&gdsc_venus>;
	qcom,platform-supply-entries {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,platform-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "gdsc-venus";
			qcom,supply-min-voltage = <0>;
			qcom,supply-max-voltage = <0>;
			qcom,supply-enable-load = <0>;
			qcom,supply-disable-load = <0>;
		};

		qcom,platform-supply-entry@1 {
			reg = <1>;
			qcom,supply-name = "gdsc";
			qcom,supply-min-voltage = <0>;
			qcom,supply-max-voltage = <0>;
			qcom,supply-enable-load = <0>;
			qcom,supply-disable-load = <0>;
		};
	};
};

&mdss_hdmi_pll {
	gdsc-venus-supply = <&gdsc_venus>;
	qcom,platform-supply-entries {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,platform-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "gdsc-venus";
			qcom,supply-min-voltage = <0>;
			qcom,supply-max-voltage = <0>;
			qcom,supply-enable-load = <0>;
			qcom,supply-disable-load = <0>;
		};

		qcom,platform-supply-entry@1 {
			reg = <1>;
			qcom,supply-name = "gdsc";
			qcom,supply-min-voltage = <0>;
			qcom,supply-max-voltage = <0>;
			qcom,supply-enable-load = <0>;
			qcom,supply-disable-load = <0>;
		};

		qcom,platform-supply-entry@2 {
			reg = <2>;
			qcom,supply-name = "vddio";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <1800000>;
			qcom,supply-enable-load = <100000>;
			qcom,supply-disable-load = <100>;
		};

		qcom,platform-supply-entry@3 {
			reg = <3>;
			qcom,supply-name = "vcca";
			qcom,supply-min-voltage = <925000>;
			qcom,supply-max-voltage = <925000>;
			qcom,supply-enable-load = <10000>;
			qcom,supply-disable-load = <100>;
		};
	};
};

&gdsc_venus {
	proxy-supply = <&gdsc_venus>;
	qcom,proxy-consumer-enable;
};

&soc {
	tsens1: tsens@4ad000 {
		compatible = "qcom,msm8996-tsens";
		reg = <0x4ac000 0x2000>,
			<0x75230 0x1000>;
		reg-names = "tsens_physical", "tsens_eeprom_physical";
		interrupts = <0 184 0>, <0 430 0>;
		interrupt-names = "tsens-upper-lower", "tsens-critical";
		qcom,client-id = <13 14 15 16 17 18 19 20>;
		qcom,sensor-id = <1 6 7 0 2 3 4 5>;
		qcom,sensors = <8>;
		qcom,slope = <2901 2846 3200 3200 3200 3200 3200 3200>;
	};

	ipa_hw: qcom,ipa@680000 {
		compatible = "qcom,ipa";
		reg = <0x680000 0x4effc>,
			<0x684000 0x26934>;
		reg-names = "ipa-base", "bam-base";
		interrupts = <0 333 0>,
					<0 432 0>;
		interrupt-names = "ipa-irq", "bam-irq";
		qcom,ipa-hw-ver = <5>; /* IPA core version = IPAv2.5 */
		qcom,ipa-hw-mode = <0>;
		qcom,ee = <0>;
		qcom,use-ipa-tethering-bridge;
		qcom,ipa-bam-remote-mode;
		qcom,modem-cfg-emb-pipe-flt;
		clocks = <&clock_gcc clk_ipa_clk>;
		clock-names = "core_clk";
		qcom,use-dma-zone;
	};

	qcom,msm-thermal{
		qcom,vdd-gfx-rstr{
			qcom,levels = <4 5 5>; /* Nominal, Turbo, Turbo */
		};
	};

	jtag_mm0: jtagmm@3840000 {
		compatible = "qcom,jtagv8-mm";
		reg = <0x3840000 0x1000>;
		reg-names = "etm-base";

		clocks = <&clock_gcc clk_qdss_clk>,
			 <&clock_gcc clk_qdss_a_clk>;
		clock-names = "core_clk", "core_a_clk";

		qcom,coresight-jtagmm-cpu = <&CPU0>;
		qcom,si-enable;
		qcom,save-restore-disable;
	};

	jtag_mm1: jtagmm@3940000 {
		compatible = "qcom,jtagv8-mm";
		reg = <0x3940000 0x1000>;
		reg-names = "etm-base";

		clocks = <&clock_gcc clk_qdss_clk>,
			 <&clock_gcc clk_qdss_a_clk>;
		clock-names = "core_clk", "core_a_clk";

		qcom,coresight-jtagmm-cpu = <&CPU1>;
		qcom,si-enable;
		qcom,save-restore-disable;
	};

	jtag_mm2: jtagmm@3a40000 {
		compatible = "qcom,jtagv8-mm";
		reg = <0x3a40000 0x1000>;
		reg-names = "etm-base";

		clocks = <&clock_gcc clk_qdss_clk>,
			 <&clock_gcc clk_qdss_a_clk>;
		clock-names = "core_clk", "core_a_clk";

		qcom,coresight-jtagmm-cpu = <&CPU2>;
		qcom,si-enable;
		qcom,save-restore-disable;
	};

	jtag_mm3: jtagmm@3b40000 {
		compatible = "qcom,jtagv8-mm";
		reg = <0x3b40000 0x1000>;
		reg-names = "etm-base";

		clocks = <&clock_gcc clk_qdss_clk>,
			 <&clock_gcc clk_qdss_a_clk>;
		clock-names = "core_clk", "core_a_clk";

		qcom,coresight-jtagmm-cpu = <&CPU3>;
		qcom,si-enable;
		qcom,save-restore-disable;
	};
};

&tsens0 {
	interrupts = <0 458 0>, <0 445 0>;
	qcom,sensors = <13>;
	qcom,slope = <2901 2846 3200 3200 3200 3200 3200 3200 3200 3200 3200 3200 3200>;
};

&mdss_hdmi_pll {
	compatible = "qcom,mdss_hdmi_pll_8996_v2";
};

&mdss_hdmi_tx {
	status = "ok";
};

&ssphy {
	qcom,qmp-phy-init-seq =
		/* <reg_offset, value, delay> */
			<0xac  0x14 0x00 /* common block settings */
			 0x34  0x08 0x00
			 0x174 0x30 0x00
			 0x194 0x06 0x00
			 0x19c 0x01 0x00
			 0x178 0x01 0x00 /* change */
			 0x70  0x0f 0x00
			 0x48  0x0f 0x00
			 0x3c  0x04 0x00
			 0xd0  0x82 0x00 /* pll and loop filter settings*/
			 0xdc  0x55 0x00
			 0xe0  0x55 0x00
			 0xe4  0x03 0x00
			 0x78  0x0b 0x00
			 0x84  0x16 0x00
			 0x90  0x28 0x00
			 0x108 0x80 0x00
			 0x124 0x00 0x00
			 0x4c  0x15 0x00
			 0x50  0x34 0x00
			 0x18c 0x00 0x00
			 0xcc  0x00 0x00
			 0x128 0x00 0x00
			 0x0c  0x0a 0x00
			 0x10  0x01 0x00 /* ssc settings */
			 0x1c  0x31 0x00
			 0x20  0x01 0x00
			 0x14  0x00 0x00
			 0x18  0x00 0x00
			 0x24  0xde 0x00
			 0x28  0x07 0x00
			 0x440 0x0b 0x00 /* Rx settings */
			 0x41c 0x04 0x00
			 0x4d8 0x02 0x00
			 0x4dc 0x4c 0x00
			 0x4e0 0xbb 0x00
			 0x508 0x77 0x00
			 0x50c 0x80 0x00
			 0x514 0x03 0x00
			 0x518 0x1b 0x00 /* change */
			 0x51c 0x16 0x00
			 0x268 0x45 0x00 /* Tx settings */
			 0x2ac 0x12 0x00
			 0x294 0x06 0x00
			 0x6c4 0x03 0x00 /* FLL settings */
			 0x6c0 0x02 0x00
			 0x6c8 0x09 0x00
			 0x6cc 0x42 0x00
			 0x6d0 0x85 0x00
			 0x680 0xd1 0x00 /* Lock Det settings */
			 0x684 0x1f 0x00
			 0x688 0x47 0x00
			 0x664 0x08 0x00
			 0xc4  0x15 0x00 /* res_code settings */
			 0x1b8 0x1f 0x00
			 0xffffffff 0xffffffff 0x00>;
};