From 3c4344e1f9310dece79a7e788551e1c921806f84 Mon Sep 17 00:00:00 2001 From: Shrey Vijay Date: Mon, 8 May 2017 19:39:59 +0530 Subject: i2c-msm-v2: Replace HW recovery mechanism with SW bit-banging HW recovery mechanism may not function as expected when HW samples data line and finds it low during particular clocking period of the recovery. Use SW bit-banging instead where SW generates clocks and sniffs data line until data line is released by the slave. Change-Id: I1a8b7930f256e0ff89f70b5267ee9d277c37bc42 Signed-off-by: Sagar Dharia Signed-off-by: Shrey Vijay --- include/linux/i2c/i2c-msm-v2.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include/linux') diff --git a/include/linux/i2c/i2c-msm-v2.h b/include/linux/i2c/i2c-msm-v2.h index 3ba9289549a2..26cd52644f8d 100644 --- a/include/linux/i2c/i2c-msm-v2.h +++ b/include/linux/i2c/i2c-msm-v2.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2014-2015,2017, The Linux Foundation. All rights reserved. +/* Copyright (c) 2014-2015,2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -201,7 +201,6 @@ enum i2c_msm_power_state { #define I2C_MSM_MAX_POLL_MSEC (100) #define I2C_MSM_TIMEOUT_SAFTY_COEF (10) #define I2C_MSM_TIMEOUT_MIN_USEC (500000) -#define I2C_QUP_MAX_BUS_RECOVERY_RETRY (10) /* QUP v2 tags */ #define QUP_TAG2_DATA_WRITE (0x82ULL) -- cgit v1.2.3