From 56242a1fc595d158eddefbb4d6d76e82c2535f55 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 21 Nov 2011 21:33:18 -0800 Subject: sh: clkfwk: setup clock parent from current register value Some clocks can select its parent clock by CPG register. But it might have been modified by boot-loader or something. This patch removed fixed initial parent clock, and setup it from their current register settings. It works on div6 reparent clocks for now. Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt --- include/linux/sh_clk.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'include/linux') diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h index a20831cf336a..e834304c0b6a 100644 --- a/include/linux/sh_clk.h +++ b/include/linux/sh_clk.h @@ -131,10 +131,9 @@ int sh_clk_div4_enable_register(struct clk *clks, int nr, int sh_clk_div4_reparent_register(struct clk *clks, int nr, struct clk_div4_table *table); -#define SH_CLK_DIV6_EXT(_parent, _reg, _flags, _parents, \ +#define SH_CLK_DIV6_EXT(_reg, _flags, _parents, \ _num_parents, _src_shift, _src_width) \ { \ - .parent = _parent, \ .enable_reg = (void __iomem *)_reg, \ .flags = _flags, \ .parent_table = _parents, \ @@ -144,7 +143,11 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr, } #define SH_CLK_DIV6(_parent, _reg, _flags) \ - SH_CLK_DIV6_EXT(_parent, _reg, _flags, NULL, 0, 0, 0) +{ \ + .parent = _parent, \ + .enable_reg = (void __iomem *)_reg, \ + .flags = _flags, \ +} int sh_clk_div6_register(struct clk *clks, int nr); int sh_clk_div6_reparent_register(struct clk *clks, int nr); -- cgit v1.2.3 From faf02f8fee5563ea7f950b3f5f08c654aa6c4525 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 2 Dec 2011 17:44:50 +0900 Subject: serial: sh-sci: per-port modem control. The bulk of the ports do not support any sort of modem control, so blindly twiddling the MCE bit doesn't accomplish much. We now require ports to manually specify which line supports modem control signals. While at it, tidy up the RTS/CTSIO handling in SCSPTR parts so it's a bit more obvious what's going on (and without clobbering other configurations in the process). Signed-off-by: Paul Mundt --- include/linux/serial_sci.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include/linux') diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h index 369273a52679..15b1bdcaa9f5 100644 --- a/include/linux/serial_sci.h +++ b/include/linux/serial_sci.h @@ -49,6 +49,10 @@ enum { #define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) +/* SCSPTR, optional */ +#define SCSPTR_RTSIO (1 << 7) +#define SCSPTR_CTSIO (1 << 5) + /* Offsets into the sci_port->irqs array */ enum { SCIx_ERI_IRQ, @@ -108,6 +112,11 @@ struct plat_sci_port_ops { void (*init_pins)(struct uart_port *, unsigned int cflag); }; +/* + * Port-specific capabilities + */ +#define SCIx_HAVE_RTSCTS (1 << 0) + /* * Platform device specific platform_data struct */ @@ -116,6 +125,7 @@ struct plat_sci_port { unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */ unsigned int type; /* SCI / SCIF / IRDA */ upf_t flags; /* UPF_* flags */ + unsigned long capabilities; /* Port features/capabilities */ unsigned int scbrr_algo_id; /* SCBRR calculation algo */ unsigned int scscr; /* SCSCR initialization */ -- cgit v1.2.3 From 50f0959ad4f9ac1c5ee208bb820de299a1b3730b Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 2 Dec 2011 20:09:48 +0900 Subject: serial: sh-sci: Handle GPIO function requests. This adds initial support for requesting the various GPIO functions necessary for certain ports. This just plugs in dumb request/free logic, but serves as a building block for migrating off of the ->init_pins mess to a wholly gpiolib backed solution (primarily parts with external RTS/CTS pins, but will also allow us to clean up RXD pin testing). Signed-off-by: Paul Mundt --- include/linux/serial_sci.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include/linux') diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h index 15b1bdcaa9f5..78779074f6e8 100644 --- a/include/linux/serial_sci.h +++ b/include/linux/serial_sci.h @@ -64,6 +64,17 @@ enum { SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */ }; +/* Offsets into the sci_port->gpios array */ +enum { + SCIx_SCK, + SCIx_RXD, + SCIx_TXD, + SCIx_CTS, + SCIx_RTS, + + SCIx_NR_FNS, +}; + enum { SCIx_PROBE_REGTYPE, @@ -123,6 +134,7 @@ struct plat_sci_port_ops { struct plat_sci_port { unsigned long mapbase; /* resource base */ unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */ + unsigned int gpios[SCIx_NR_FNS]; /* SCK, RXD, TXD, CTS, RTS */ unsigned int type; /* SCI / SCIF / IRDA */ upf_t flags; /* UPF_* flags */ unsigned long capabilities; /* Port features/capabilities */ -- cgit v1.2.3 From eda2030a5b60bb818f062adacbcfb6fd2d366fb9 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 8 Dec 2011 22:58:54 +0900 Subject: sh: extend clock struct with mapped_reg member Add a "mapped_reg" member to struct clk and use that to keep the ioremapped register based on enable_reg. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/linux/sh_clk.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux') diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h index e834304c0b6a..54341d811685 100644 --- a/include/linux/sh_clk.h +++ b/include/linux/sh_clk.h @@ -49,6 +49,7 @@ struct clk { void __iomem *enable_reg; unsigned int enable_bit; + void __iomem *mapped_reg; unsigned long arch_flags; void *priv; -- cgit v1.2.3 From b0e10211cba1629e2e534ca9cb3d87cfc7e389ea Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 9 Dec 2011 12:14:27 +0900 Subject: sh: pfc: ioremap() support Add support for non-entity mapped PFC registers through the use of struct resource and ioremap()/iounmap(). The PFC main data structure gets updated with a pointer to a struct resources array that point out all register windows used by the PFC instance. The register definitions are kept as physical addresses but the PFC code will do transparent conversion into virtual addresses whenever register windows are specified using with struct resource. To introduce as little performance penalty as possible the virtual address of each data register is cached in memory. The virtual address of each configuration register is however calculated during run time. This because the configuration is considered slow path so focus is instead put on keeping memory foot print as small as possible. The PFC register access code is in this patch updated from __raw_readN() / __raw_writeN() into ioreadN() / iowriteN(). This patch is needed to support the PFC block in r8a7779. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/linux/sh_pfc.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include/linux') diff --git a/include/linux/sh_pfc.h b/include/linux/sh_pfc.h index 8446789216e5..91666a58529d 100644 --- a/include/linux/sh_pfc.h +++ b/include/linux/sh_pfc.h @@ -55,6 +55,7 @@ struct pinmux_cfg_reg { struct pinmux_data_reg { unsigned long reg, reg_width, reg_shadow; pinmux_enum_t *enum_ids; + void __iomem *mapped_reg; }; #define PINMUX_DATA_REG(name, r, r_width) \ @@ -75,6 +76,12 @@ struct pinmux_range { pinmux_enum_t force; }; +struct pfc_window { + phys_addr_t phys; + void __iomem *virt; + unsigned long size; +}; + struct pinmux_info { char *name; pinmux_enum_t reserved_id; @@ -98,6 +105,10 @@ struct pinmux_info { struct pinmux_irq *gpio_irq; unsigned int gpio_irq_size; + struct resource *resource; + unsigned int num_resources; + struct pfc_window *window; + struct gpio_chip chip; }; -- cgit v1.2.3