From 2c341d62eb4b697793c29da51fda64328df5ff59 Mon Sep 17 00:00:00 2001 From: Grygorii Strashko Date: Wed, 3 Sep 2014 20:05:32 +0300 Subject: gpio: syscon: add soc specific callback to assign output value Some SoCs (like Keystone) may require to perform special sequence of operations to assign output GPIO value, so default implementation of .set() callback from gpio-syscon driver can't be used. Hence, add optional, SoC specific callback to assign output gpio value. Signed-off-by: Grygorii Strashko Signed-off-by: Linus Walleij --- drivers/gpio/gpio-syscon.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'drivers/gpio/gpio-syscon.c') diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c index 30884fbc750d..d50ff9363c81 100644 --- a/drivers/gpio/gpio-syscon.c +++ b/drivers/gpio/gpio-syscon.c @@ -37,6 +37,8 @@ * dat_bit_offset: Offset (in bits) to the first GPIO bit. * dir_bit_offset: Optional offset (in bits) to the first bit to switch * GPIO direction (Used with GPIO_SYSCON_FEAT_DIR flag). + * set: HW specific callback to assigns output value + * for signal "offset" */ struct syscon_gpio_data { @@ -45,6 +47,8 @@ struct syscon_gpio_data { unsigned int bit_count; unsigned int dat_bit_offset; unsigned int dir_bit_offset; + void (*set)(struct gpio_chip *chip, + unsigned offset, int value); }; struct syscon_gpio_priv { @@ -111,7 +115,7 @@ static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val) BIT(offs % SYSCON_REG_BITS)); } - syscon_gpio_set(chip, offset, val); + priv->data->set(chip, offset, val); return 0; } @@ -159,7 +163,7 @@ static int syscon_gpio_probe(struct platform_device *pdev) if (priv->data->flags & GPIO_SYSCON_FEAT_IN) priv->chip.direction_input = syscon_gpio_dir_in; if (priv->data->flags & GPIO_SYSCON_FEAT_OUT) { - priv->chip.set = syscon_gpio_set; + priv->chip.set = priv->data->set ? : syscon_gpio_set; priv->chip.direction_output = syscon_gpio_dir_out; } -- cgit v1.2.3 From 5a3e3f88b0a10f8b5baf224ebda5916195fb8745 Mon Sep 17 00:00:00 2001 From: Grygorii Strashko Date: Wed, 3 Sep 2014 20:05:33 +0300 Subject: gpio: syscon: retrive syscon node and regs offsets from dt This patch adds handling of new "gpio,syscon-dev" DT property, which allows to specify syscon node and data/direction registers offsets in DT. "gpio,syscon-dev" has following format: gpio,syscon-dev = <&syscon_dev data_reg_offset [direction_reg_offset]>; where - syscon_dev - phandle on syscon node - data_reg_offset - offset of data register (in bytes) - direction_reg_offset - offset of dirrection register (optional, in bytes) for example: gpio,syscon-dev = <&devctrl 0x254>; In such way, the support of multiple Syscon GPIO devices is added. Signed-off-by: Grygorii Strashko Signed-off-by: Linus Walleij --- drivers/gpio/gpio-syscon.c | 51 ++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 43 insertions(+), 8 deletions(-) (limited to 'drivers/gpio/gpio-syscon.c') diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c index d50ff9363c81..049391bf80ee 100644 --- a/drivers/gpio/gpio-syscon.c +++ b/drivers/gpio/gpio-syscon.c @@ -55,6 +55,8 @@ struct syscon_gpio_priv { struct gpio_chip chip; struct regmap *syscon; const struct syscon_gpio_data *data; + u32 dreg_offset; + u32 dir_reg_offset; }; static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip) @@ -65,9 +67,11 @@ static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip) static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset) { struct syscon_gpio_priv *priv = to_syscon_gpio(chip); - unsigned int val, offs = priv->data->dat_bit_offset + offset; + unsigned int val, offs; int ret; + offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; + ret = regmap_read(priv->syscon, (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, &val); if (ret) @@ -79,7 +83,9 @@ static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset) static void syscon_gpio_set(struct gpio_chip *chip, unsigned offset, int val) { struct syscon_gpio_priv *priv = to_syscon_gpio(chip); - unsigned int offs = priv->data->dat_bit_offset + offset; + unsigned int offs; + + offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; regmap_update_bits(priv->syscon, (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, @@ -92,7 +98,10 @@ static int syscon_gpio_dir_in(struct gpio_chip *chip, unsigned offset) struct syscon_gpio_priv *priv = to_syscon_gpio(chip); if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) { - unsigned int offs = priv->data->dir_bit_offset + offset; + unsigned int offs; + + offs = priv->dir_reg_offset + + priv->data->dir_bit_offset + offset; regmap_update_bits(priv->syscon, (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, @@ -107,7 +116,10 @@ static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val) struct syscon_gpio_priv *priv = to_syscon_gpio(chip); if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) { - unsigned int offs = priv->data->dir_bit_offset + offset; + unsigned int offs; + + offs = priv->dir_reg_offset + + priv->data->dir_bit_offset + offset; regmap_update_bits(priv->syscon, (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, @@ -142,6 +154,8 @@ static int syscon_gpio_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; const struct of_device_id *of_id = of_match_device(syscon_gpio_ids, dev); struct syscon_gpio_priv *priv; + struct device_node *np = dev->of_node; + int ret; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -149,10 +163,31 @@ static int syscon_gpio_probe(struct platform_device *pdev) priv->data = of_id->data; - priv->syscon = - syscon_regmap_lookup_by_compatible(priv->data->compatible); - if (IS_ERR(priv->syscon)) - return PTR_ERR(priv->syscon); + if (priv->data->compatible) { + priv->syscon = syscon_regmap_lookup_by_compatible( + priv->data->compatible); + if (IS_ERR(priv->syscon)) + return PTR_ERR(priv->syscon); + } else { + priv->syscon = + syscon_regmap_lookup_by_phandle(np, "gpio,syscon-dev"); + if (IS_ERR(priv->syscon)) + return PTR_ERR(priv->syscon); + + ret = of_property_read_u32_index(np, "gpio,syscon-dev", 1, + &priv->dreg_offset); + if (ret) + dev_err(dev, "can't read the data register offset!\n"); + + priv->dreg_offset <<= 3; + + ret = of_property_read_u32_index(np, "gpio,syscon-dev", 2, + &priv->dir_reg_offset); + if (ret) + dev_err(dev, "can't read the dir register offset!\n"); + + priv->dir_reg_offset <<= 3; + } priv->chip.dev = dev; priv->chip.owner = THIS_MODULE; -- cgit v1.2.3 From 2134cb997f2f1b2d960ad8705d67dc8d690ba59c Mon Sep 17 00:00:00 2001 From: Grygorii Strashko Date: Wed, 3 Sep 2014 20:05:34 +0300 Subject: gpio: syscon: reuse for keystone 2 socs On Keystone SOCs, ARM host can send interrupts to DSP cores using the DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for each DSP core. This is one of the component used by the IPC mechanism used on Keystone SOCs. Keystone 2 DSP GPIO controller has specific features: - each GPIO can be configured only as output pin; - setting GPIO value to 1 causes IRQ generation on target DSP core; - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still pending. This patch updates gpio-syscon driver to be reused by Keystone 2 SoCs, because the Keystone 2 DSP GPIO controller is controlled through Syscon devices and, as requested by Linus Walleij, such kind of GPIO controllers should be integrated with drivers/gpio/gpio-syscon.c driver. Signed-off-by: Grygorii Strashko Signed-off-by: Linus Walleij --- drivers/gpio/gpio-syscon.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) (limited to 'drivers/gpio/gpio-syscon.c') diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c index 049391bf80ee..e82fde4b6898 100644 --- a/drivers/gpio/gpio-syscon.c +++ b/drivers/gpio/gpio-syscon.c @@ -140,11 +140,46 @@ static const struct syscon_gpio_data clps711x_mctrl_gpio = { .dat_bit_offset = 0x40 * 8 + 8, }; +#define KEYSTONE_LOCK_BIT BIT(0) + +static void keystone_gpio_set(struct gpio_chip *chip, unsigned offset, int val) +{ + struct syscon_gpio_priv *priv = to_syscon_gpio(chip); + unsigned int offs; + int ret; + + offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; + + if (!val) + return; + + ret = regmap_update_bits( + priv->syscon, + (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, + BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT, + BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT); + if (ret < 0) + dev_err(chip->dev, "gpio write failed ret(%d)\n", ret); +} + +static const struct syscon_gpio_data keystone_dsp_gpio = { + /* ARM Keystone 2 */ + .compatible = NULL, + .flags = GPIO_SYSCON_FEAT_OUT, + .bit_count = 28, + .dat_bit_offset = 4, + .set = keystone_gpio_set, +}; + static const struct of_device_id syscon_gpio_ids[] = { { .compatible = "cirrus,clps711x-mctrl-gpio", .data = &clps711x_mctrl_gpio, }, + { + .compatible = "ti,keystone-dsp-gpio", + .data = &keystone_dsp_gpio, + }, { } }; MODULE_DEVICE_TABLE(of, syscon_gpio_ids); -- cgit v1.2.3