From ff2167526c5fe1623bfe331ec99c2bafe64fe75d Mon Sep 17 00:00:00 2001 From: Manoj Rao Date: Mon, 28 Apr 2014 17:59:05 -0700 Subject: mdss: pp: fix incorrect base addr len in csc setup As a part of VG pipe setup the post-proc driver constructs the color space conversion table. This involves programming the hardware using values from a static CSC conversion table in the driver. Since MMSS blocks remain 32-bit addressable the iterator for hardware registers used in post-proc driver should move ahead in increments of 32-bit to program these values into mdss-pp registers and not the width of a pointer in memory. Use 32-bit to fix incorrect CSC programming of the hardware. CRs-Fixed: 642481 Change-Id: I49b4b008c1ebb1a8032603fe2f16b1fe893d91ff Signed-off-by: Manoj Rao --- drivers/video/fbdev/msm/mdss_mdp_pp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/video/fbdev/msm/mdss_mdp_pp.c b/drivers/video/fbdev/msm/mdss_mdp_pp.c index 9870e9c14475..2cc779afaa84 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_pp.c +++ b/drivers/video/fbdev/msm/mdss_mdp_pp.c @@ -497,7 +497,7 @@ int mdss_mdp_csc_setup_data(u32 block, u32 blk_idx, u32 tbl_idx, if (i & 0x1) { val |= data->csc_mv[i] << 16; writel_relaxed(val, addr); - addr += sizeof(u32 *); + addr += sizeof(u32); } else { val = data->csc_mv[i]; } @@ -508,7 +508,7 @@ int mdss_mdp_csc_setup_data(u32 block, u32 blk_idx, u32 tbl_idx, for (i = 0; i < 3; i++) { writel_relaxed(data->csc_pre_bv[i], addr); writel_relaxed(data->csc_post_bv[i], addr + CSC_POST_OFF); - addr += sizeof(u32 *); + addr += sizeof(u32); } addr = base + CSC_LV_OFF; @@ -518,7 +518,7 @@ int mdss_mdp_csc_setup_data(u32 block, u32 blk_idx, u32 tbl_idx, val = (data->csc_post_lv[i] << 8) | data->csc_post_lv[i+1]; writel_relaxed(val, addr + CSC_POST_OFF); - addr += sizeof(u32 *); + addr += sizeof(u32); } return ret; -- cgit v1.2.3