From d878d43e16f0b6fa643267ec533ff4653e181281 Mon Sep 17 00:00:00 2001 From: Siddartha Mohanadoss Date: Wed, 20 Jul 2016 11:37:15 -0700 Subject: ARM: dts: msm: Remove RRADC channel nodes on pmicobalt Currently there are no channel specific properties associated with the RRADC channels. The existing channel nodes specify a logical channel number that is used by the client when requesting the RRADC channel read. This can instead be obtained from the channel list specified within the driver. Therefore remove the channel nodes. Change-Id: I4da81a576b88285cedb0a1c7fd49ccd526d25012 Signed-off-by: Siddartha Mohanadoss --- arch/arm/boot/dts/qcom/msm-pmicobalt.dtsi | 41 ------------------------------- 1 file changed, 41 deletions(-) diff --git a/arch/arm/boot/dts/qcom/msm-pmicobalt.dtsi b/arch/arm/boot/dts/qcom/msm-pmicobalt.dtsi index 47ba50ab8270..abdc1f147710 100644 --- a/arch/arm/boot/dts/qcom/msm-pmicobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msm-pmicobalt.dtsi @@ -297,47 +297,6 @@ #address-cells = <1>; #size-cells = <0>; #io-channel-cells = <1>; - - /* Channel node */ - batt_id { - channel = <3>; - }; - - batt_therm { - channel = <4>; - }; - - skin_temp { - channel = <5>; - }; - - usbin_v { - channel = <6>; - }; - - usbin_i { - channel = <7>; - }; - - dcin_v { - channel = <8>; - }; - - dcin_i { - channel = <9>; - }; - - die_temp { - channel = <0xa>; - }; - - chg_temp { - channel = <0xb>; - }; - - gpio { - channel = <0xc>; - }; }; pmicobalt_fg: qpnp,fg { -- cgit v1.2.3 From 05da00db9e5e3f83da3e9e1f984cd8a17eb11dd2 Mon Sep 17 00:00:00 2001 From: Siddartha Mohanadoss Date: Tue, 26 Jul 2016 17:04:56 -0700 Subject: iio: adc: rradc: Update die_temp and chg_temp scaling The final temperature values for PMI die temperature and charger temperature are in units of millidegC. Update the slope factor value to avoid losing resolution accuracy while values are reported in units of millidegC. Change-Id: Iec4aa730fa97133af0c0fb9d47557738ef6f45a0 Signed-off-by: Siddartha Mohanadoss --- drivers/iio/adc/qcom-rradc.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/qcom-rradc.c b/drivers/iio/adc/qcom-rradc.c index 17c7d630a2cb..d8c55e1f6bed 100644 --- a/drivers/iio/adc/qcom-rradc.c +++ b/drivers/iio/adc/qcom-rradc.c @@ -149,12 +149,12 @@ #define FG_ADC_RR_TEMP_FS_VOLTAGE_NUM 5000000 #define FG_ADC_RR_TEMP_FS_VOLTAGE_DEN 3 #define FG_ADC_RR_DIE_TEMP_OFFSET 600000 -#define FG_ADC_RR_DIE_TEMP_SLOPE 2000 -#define FG_ADC_RR_DIE_TEMP_OFFSET_DEGC 25 +#define FG_ADC_RR_DIE_TEMP_SLOPE 2 +#define FG_ADC_RR_DIE_TEMP_OFFSET_MILLI_DEGC 25000 #define FG_ADC_RR_CHG_TEMP_OFFSET 1288000 -#define FG_ADC_RR_CHG_TEMP_SLOPE 4000 -#define FG_ADC_RR_CHG_TEMP_OFFSET_DEGC 27 +#define FG_ADC_RR_CHG_TEMP_SLOPE 4 +#define FG_ADC_RR_CHG_TEMP_OFFSET_MILLI_DEGC 27000 #define FG_ADC_RR_VOLT_INPUT_FACTOR 8 #define FG_ADC_RR_CURR_INPUT_FACTOR 2 @@ -331,8 +331,8 @@ static int rradc_post_process_die_temp(struct rradc_chip *chip, FG_MAX_ADC_READINGS)); temp -= FG_ADC_RR_DIE_TEMP_OFFSET; temp = div64_s64(temp, FG_ADC_RR_DIE_TEMP_SLOPE); - temp += FG_ADC_RR_DIE_TEMP_OFFSET_DEGC; - *result_millidegc = (temp * FG_ADC_SCALE_MILLI_FACTOR); + temp += FG_ADC_RR_DIE_TEMP_OFFSET_MILLI_DEGC; + *result_millidegc = temp; return 0; } @@ -348,8 +348,8 @@ static int rradc_post_process_chg_temp(struct rradc_chip *chip, FG_MAX_ADC_READINGS)); temp = FG_ADC_RR_CHG_TEMP_OFFSET - temp; temp = div64_s64(temp, FG_ADC_RR_CHG_TEMP_SLOPE); - temp = temp + FG_ADC_RR_CHG_TEMP_OFFSET_DEGC; - *result_millidegc = (temp * FG_ADC_SCALE_MILLI_FACTOR); + temp = temp + FG_ADC_RR_CHG_TEMP_OFFSET_MILLI_DEGC; + *result_millidegc = temp; return 0; } -- cgit v1.2.3 From a139f26af6758b7683781642ba70779c4eea4fc2 Mon Sep 17 00:00:00 2001 From: Siddartha Mohanadoss Date: Thu, 28 Jul 2016 15:05:09 -0700 Subject: iio: adc: rradc: Add RRADC channels Add support to read charger and skin temp hot and too hot temperature threshold values programmed during initialization. Change-Id: I46dca1f606b5414bf7a032c18c9684ba2e53cf28 Signed-off-by: Siddartha Mohanadoss Signed-off-by: Nicholas Troast --- drivers/iio/adc/qcom-rradc.c | 65 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 64 insertions(+), 1 deletion(-) diff --git a/drivers/iio/adc/qcom-rradc.c b/drivers/iio/adc/qcom-rradc.c index d8c55e1f6bed..ae2df4f7ff0d 100644 --- a/drivers/iio/adc/qcom-rradc.c +++ b/drivers/iio/adc/qcom-rradc.c @@ -184,6 +184,10 @@ enum rradc_channel_id { RR_ADC_DIE_TEMP, RR_ADC_CHG_TEMP, RR_ADC_GPIO, + RR_ADC_CHG_HOT_TEMP, + RR_ADC_CHG_TOO_HOT_TEMP, + RR_ADC_SKIN_HOT_TEMP, + RR_ADC_SKIN_TOO_HOT_TEMP, RR_ADC_MAX }; @@ -337,6 +341,39 @@ static int rradc_post_process_die_temp(struct rradc_chip *chip, return 0; } +static int rradc_post_process_chg_temp_hot(struct rradc_chip *chip, + struct rradc_chan_prop *prop, u16 adc_code, + int *result_millidegc) +{ + int64_t temp = 0; + + temp = (int64_t) adc_code * 4; + temp = temp * FG_ADC_RR_TEMP_FS_VOLTAGE_NUM; + temp = div64_s64(temp, (FG_ADC_RR_TEMP_FS_VOLTAGE_DEN * + FG_MAX_ADC_READINGS)); + temp = FG_ADC_RR_CHG_TEMP_OFFSET - temp; + temp = div64_s64(temp, FG_ADC_RR_CHG_TEMP_SLOPE); + temp = temp + FG_ADC_RR_CHG_TEMP_OFFSET_MILLI_DEGC; + *result_millidegc = temp; + + return 0; +} + +static int rradc_post_process_skin_temp_hot(struct rradc_chip *chip, + struct rradc_chan_prop *prop, u16 adc_code, + int *result_millidegc) +{ + int64_t temp = 0; + + temp = (int64_t) adc_code; + temp = div64_s64(temp, 2); + temp = temp - 30; + temp *= FG_ADC_SCALE_MILLI_FACTOR; + *result_millidegc = temp; + + return 0; +} + static int rradc_post_process_chg_temp(struct rradc_chip *chip, struct rradc_chan_prop *prop, u16 adc_code, int *result_millidegc) @@ -430,6 +467,18 @@ static const struct rradc_channels rradc_chans[] = { RR_ADC_CHAN_VOLT("gpio", &rradc_post_process_gpio, FG_ADC_RR_GPIO_LSB, FG_ADC_RR_GPIO_MSB, FG_ADC_RR_GPIO_STS) + RR_ADC_CHAN_TEMP("chg_temp_hot", &rradc_post_process_chg_temp_hot, + FG_ADC_RR_CHARGER_HOT, FG_ADC_RR_CHARGER_HOT, + FG_ADC_RR_CHARGER_TEMP_STS) + RR_ADC_CHAN_TEMP("chg_temp_too_hot", &rradc_post_process_chg_temp_hot, + FG_ADC_RR_CHARGER_TOO_HOT, FG_ADC_RR_CHARGER_TOO_HOT, + FG_ADC_RR_CHARGER_TEMP_STS) + RR_ADC_CHAN_TEMP("skin_temp_hot", &rradc_post_process_skin_temp_hot, + FG_ADC_RR_SKIN_HOT, FG_ADC_RR_SKIN_HOT, + FG_ADC_RR_AUX_THERM_STS) + RR_ADC_CHAN_TEMP("skin_temp_too_hot", &rradc_post_process_skin_temp_hot, + FG_ADC_RR_SKIN_TOO_HOT, FG_ADC_RR_SKIN_TOO_HOT, + FG_ADC_RR_AUX_THERM_STS) }; static int rradc_do_conversion(struct rradc_chip *chip, @@ -442,7 +491,11 @@ static int rradc_do_conversion(struct rradc_chip *chip, mutex_lock(&chip->lock); - if (prop->channel != RR_ADC_BATT_ID) { + if ((prop->channel != RR_ADC_BATT_ID) && + (prop->channel != RR_ADC_CHG_HOT_TEMP) && + (prop->channel != RR_ADC_CHG_TOO_HOT_TEMP) && + (prop->channel != RR_ADC_SKIN_HOT_TEMP) && + (prop->channel != RR_ADC_SKIN_TOO_HOT_TEMP)) { /* BATT_ID STS bit does not get set initially */ status = rradc_chans[prop->channel].sts; rc = rradc_read(chip, status, buf, 1); @@ -463,6 +516,11 @@ static int rradc_do_conversion(struct rradc_chip *chip, offset = rradc_chans[prop->channel].lsb; if (prop->channel == RR_ADC_BATT_ID) bytes_to_read = 6; + else if ((prop->channel == RR_ADC_CHG_HOT_TEMP) || + (prop->channel == RR_ADC_CHG_TOO_HOT_TEMP) || + (prop->channel == RR_ADC_SKIN_HOT_TEMP) || + (prop->channel == RR_ADC_SKIN_TOO_HOT_TEMP)) + bytes_to_read = 1; else bytes_to_read = 2; @@ -496,6 +554,11 @@ static int rradc_do_conversion(struct rradc_chip *chip, *data = batt_id_5; prop->channel_data = FG_ADC_RR_BATT_ID_5_MA; } + } else if ((prop->channel == RR_ADC_CHG_HOT_TEMP) || + (prop->channel == RR_ADC_CHG_TOO_HOT_TEMP) || + (prop->channel == RR_ADC_SKIN_HOT_TEMP) || + (prop->channel == RR_ADC_SKIN_TOO_HOT_TEMP)) { + *data = buf[0]; } else { *data = (buf[1] << 8) | buf[0]; } -- cgit v1.2.3