From 9012dd61a349d1924a8b7e7e77cf3057aa688f1d Mon Sep 17 00:00:00 2001 From: Viraja Kommaraju Date: Fri, 29 Jul 2016 13:40:25 +0530 Subject: ARM: dts: msm: Fix quality issue in automotive platform GPIO 61 is enabled twice on automotive platform as it is added as part of quat_mi2s device tree entry which is shared between QUAT MI2S and QUAT TDM. To avoid this, update gpio61 SD1 line as new device tree entry. CRs-fixed: 1046464 Change-Id: I216ab6a3cf6890a66bd2450b77bf120a2e7b66b9 Signed-off-by: Viraja Kommaraju Signed-off-by: Davide Garberi --- .../qcom/apq8096-v3-pmi8996-mdm9x55-i2s-mtp.dts | 6 ++-- arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi | 35 +++++++++++++++++++--- 2 files changed, 35 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/qcom/apq8096-v3-pmi8996-mdm9x55-i2s-mtp.dts b/arch/arm/boot/dts/qcom/apq8096-v3-pmi8996-mdm9x55-i2s-mtp.dts index ff45428854b7..f15b81619b20 100644 --- a/arch/arm/boot/dts/qcom/apq8096-v3-pmi8996-mdm9x55-i2s-mtp.dts +++ b/arch/arm/boot/dts/qcom/apq8096-v3-pmi8996-mdm9x55-i2s-mtp.dts @@ -270,8 +270,10 @@ qcom,msm-mi2s-rx-lines = <2>; qcom,msm-mi2s-tx-lines = <1>; pinctrl-names = "default", "sleep"; - pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active>; - pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep>; + pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active + &quat_mi2s_sd1_active>; + pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep + &quat_mi2s_sd1_sleep>; }; }; }; diff --git a/arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi b/arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi index eb1f9f45e9b8..3c34bfc47c6a 100644 --- a/arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi @@ -1695,24 +1695,24 @@ quat_mi2s { quat_mi2s_sleep: quat_mi2s_sleep { mux { - pins = "gpio58", "gpio59", "gpio61"; + pins = "gpio58", "gpio59"; function = "qua_mi2s"; }; config { - pins = "gpio58", "gpio59", "gpio61"; + pins = "gpio58", "gpio59"; drive-strength = <2>; /* 2 mA */ bias-pull-down; /* PULL DOWN */ }; }; quat_mi2s_active: quat_mi2s_active { mux { - pins = "gpio58", "gpio59", "gpio61"; + pins = "gpio58", "gpio59"; function = "qua_mi2s"; }; config { - pins = "gpio58", "gpio59", "gpio61"; + pins = "gpio58", "gpio59"; drive-strength = <8>; /* 8 mA */ bias-disable; /* NO PULL */ output-high; @@ -1720,6 +1720,33 @@ }; }; + quat_mi2s_sd1 { + quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { + mux { + pins = "gpio61"; + function = "qua_mi2s"; + }; + + config { + pins = "gpio61"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + }; + }; + quat_mi2s_sd1_active: quat_mi2s_sd1_active { + mux { + pins = "gpio61"; + function = "qua_mi2s"; + }; + + config { + pins = "gpio61"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + quat_mi2s_sd0 { quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { mux { -- cgit v1.2.3