From 81dd76ac077bdbc120ddb05ea9a27bc2ae8d7796 Mon Sep 17 00:00:00 2001 From: Venkat Gopalakrishnan Date: Wed, 9 Apr 2014 10:54:29 -0700 Subject: mmc: sdhci: Poll for register status much tightly On fast path, waiting for 1ms interval to poll registers cause performance degradation. Also having 1ms delays for polling with interrupts disabled cause considerable system latencies, hence poll at 1us interval. Change-Id: I40113ccf56050b3c46604112846e9b37b254d2be Signed-off-by: Venkat Gopalakrishnan --- drivers/mmc/host/sdhci.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 560264335f1b..379135a14f38 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -244,7 +244,7 @@ void sdhci_reset(struct sdhci_host *host, u8 mask) } /* Wait max 100 ms */ - timeout = 100; + timeout = 100000; if (host->ops->check_power_status && host->pwr && (mask & SDHCI_RESET_ALL)) @@ -1096,7 +1096,7 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) WARN_ON(host->cmd); /* Wait max 10 ms */ - timeout = 10; + timeout = 10000; mask = SDHCI_CMD_INHIBIT; if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY)) @@ -1117,7 +1117,7 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) return; } timeout--; - mdelay(1); + udelay(1); } timeout = jiffies; @@ -1349,7 +1349,7 @@ clock_set: sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); /* Wait max 20 ms */ - timeout = 20; + timeout = 20000; while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) & SDHCI_CLOCK_INT_STABLE)) { if (timeout == 0) { @@ -1359,7 +1359,7 @@ clock_set: return; } timeout--; - mdelay(1); + udelay(1); } clk |= SDHCI_CLOCK_CARD_EN; -- cgit v1.2.3