From 36e1ed5c26104734eabcab9fcce40ae40975c384 Mon Sep 17 00:00:00 2001 From: Benet Clark Date: Mon, 3 Mar 2014 14:20:37 -0800 Subject: msm: mdss: Add special case for DSPP3 histogram intr shift bit In order to enable/disable histogram interrupts, the interrupt bit mask is programmed to the same histogram interrupt register for all DSPPs. However, DSPP3's bit mask does not follow the typical offset. We must add a special case for that interrupt bit shift. Change-Id: Ia76a7eb0e56e30b657968ea776579c53ff43e390 Signed-off-by: Benet Clark --- drivers/video/fbdev/msm/mdss_mdp_pp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/video/fbdev/msm/mdss_mdp_pp.c b/drivers/video/fbdev/msm/mdss_mdp_pp.c index 110d2b2f3319..4bf49b6a620d 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_pp.c +++ b/drivers/video/fbdev/msm/mdss_mdp_pp.c @@ -1906,6 +1906,9 @@ int mdss_mdp_pp_init(struct device *dev) MDSS_MDP_REG_DSPP_HIST_CTL_BASE; init_completion(&hist[i].comp); } + if (mdata->nmixers_intf == 4) + hist[3].intr_shift = 22; + mdss_pp_res->dspp_hist = hist; } } -- cgit v1.2.3