From 3139253e9f1fdd85f8d2d6275681dd32e8ddb235 Mon Sep 17 00:00:00 2001 From: Veera Sundaram Sankaran Date: Thu, 25 Jun 2015 13:49:28 -0700 Subject: msm: mdss: fix cursor pipe idle checking mechanism The clk status register and vbif status based on xin-id is used to check if pipes are idle. VBIF checks cannot be done for cursor pipes as the same xin-id is shared between dsi, cursor0 and cursor1. Avoid vbif status check and fix clk status check for cursor pipes. Change-Id: I9e0a185beffd4e732c1b5dc61822cc94b3735a27 Signed-off-by: Veera Sundaram Sankaran --- Documentation/devicetree/bindings/fb/mdss-mdp.txt | 8 ++++++++ drivers/video/fbdev/msm/mdss_mdp.c | 9 ++++++++- drivers/video/fbdev/msm/mdss_mdp_layer.c | 6 +++--- drivers/video/fbdev/msm/mdss_mdp_pipe.c | 17 ++++++++++++++--- 4 files changed, 33 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/fb/mdss-mdp.txt b/Documentation/devicetree/bindings/fb/mdss-mdp.txt index 042511cc14d5..25c2a0b48c5a 100644 --- a/Documentation/devicetree/bindings/fb/mdss-mdp.txt +++ b/Documentation/devicetree/bindings/fb/mdss-mdp.txt @@ -93,6 +93,14 @@ Required properties to the respective cursor pipes. Number of xin ids defined should match the number of offsets defined in property: qcom,mdss-pipe-cursor-off +- qcom,mdss-pipe-cursor-clk-ctrl-off: Array of offsets describing clk control + offsets for dynamic clock gating. 1st value + in the array represents offset of the control + register. 2nd value represents bit offset within + control register and 3rd value represents bit + offset within status register. Number of tuples + defined should match the number of offsets + defined in property: qcom,mdss-pipe-cursor-off - qcom,mdss-ctl-off: Array of offset addresses for the available ctl hw blocks within MDP, these offsets are calculated from register "mdp_phys" defined in diff --git a/drivers/video/fbdev/msm/mdss_mdp.c b/drivers/video/fbdev/msm/mdss_mdp.c index 4796c37b343b..e5ab0ed696d4 100644 --- a/drivers/video/fbdev/msm/mdss_mdp.c +++ b/drivers/video/fbdev/msm/mdss_mdp.c @@ -2247,10 +2247,17 @@ static int mdss_mdp_parse_dt_pipe(struct platform_device *pdev) goto parse_fail; rc = mdss_mdp_parse_dt_handler(pdev, - "qcom,mdss-pipe-dma-xin-id", xin_id, + "qcom,mdss-pipe-cursor-xin-id", xin_id, mdata->ncursor_pipes); if (rc) goto parse_fail; + + rc = mdss_mdp_parse_dt_pipe_clk_ctrl(pdev, + "qcom,mdss-pipe-cursor-clk-ctrl-offsets", + mdata->cursor_pipes, mdata->ncursor_pipes); + if (rc) + goto parse_fail; + /* set the fetch id to an invalid value */ for (i = 0; i < mdata->ncursor_pipes; i++) ftch_id[i] = -1; diff --git a/drivers/video/fbdev/msm/mdss_mdp_layer.c b/drivers/video/fbdev/msm/mdss_mdp_layer.c index a610cb92f8b5..b1cc708f0c31 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_layer.c +++ b/drivers/video/fbdev/msm/mdss_mdp_layer.c @@ -36,9 +36,9 @@ #define CHECK_LAYER_BOUNDS(offset, size, max_size) \ (((size) > (max_size)) || ((offset) > ((max_size) - (size)))) -#define IS_PIPE_TYPE_CURSOR(pipe_id) \ - ((pipe_id >= MDSS_MDP_SSPP_CURSOR0) &&\ - (pipe_id <= MDSS_MDP_SSPP_CURSOR1)) +#define IS_PIPE_TYPE_CURSOR(pipe_ndx) \ + ((pipe_ndx >= (1 << MDSS_MDP_SSPP_CURSOR0)) &&\ + (pipe_ndx <= (1 << MDSS_MDP_SSPP_CURSOR1))) enum { MDSS_MDP_RELEASE_FENCE = 0, diff --git a/drivers/video/fbdev/msm/mdss_mdp_pipe.c b/drivers/video/fbdev/msm/mdss_mdp_pipe.c index cc1eabee1c64..339a85475261 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_pipe.c +++ b/drivers/video/fbdev/msm/mdss_mdp_pipe.c @@ -1297,8 +1297,8 @@ static int mdss_mdp_is_pipe_idle(struct mdss_mdp_pipe *pipe, reg_val = readl_relaxed(mdata->mdp_base + pipe->clk_status.reg_off); - if (reg_val & clk_status_idle_mask) - is_idle = false; + if ((reg_val & clk_status_idle_mask) == 0) + is_idle = true; pr_debug("pipe#:%d clk_status:0x%x clk_status_idle_mask:0x%x\n", pipe->num, reg_val, clk_status_idle_mask); @@ -1307,13 +1307,24 @@ static int mdss_mdp_is_pipe_idle(struct mdss_mdp_pipe *pipe, if (!ignore_force_on && (is_forced_on || !is_idle)) goto exit; + /* + * skip vbif check for cursor pipes as the same xin-id is shared + * between cursor0, cursor1 and dsi + */ + if (pipe->type == MDSS_MDP_PIPE_TYPE_CURSOR) { + if (ignore_force_on && is_forced_on) + is_idle = true; + goto exit; + } + vbif_idle_mask = BIT(pipe->xin_id + 16); reg_val = MDSS_VBIF_READ(mdata, MMSS_VBIF_XIN_HALT_CTRL1, is_nrt_vbif); if (reg_val & vbif_idle_mask) is_idle = true; - pr_debug("pipe#:%d XIN_HALT_CTRL1: 0x%x\n", pipe->num, reg_val); + pr_debug("pipe#:%d XIN_HALT_CTRL1: 0x%x, vbif_idle_mask: 0x%x\n", + pipe->num, reg_val, vbif_idle_mask); exit: mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF); -- cgit v1.2.3