From 1d6bb9392adfed2b7bca5d4e8f13cbdf6e061833 Mon Sep 17 00:00:00 2001 From: Deepak Katragadda Date: Wed, 14 Sep 2016 13:32:58 -0700 Subject: ARM: dts: msm: Remove clocks listed under GPU, PCIE, USB & MDSS GDSC nodes The core and peripheral memory retention bits no longer need to be set and cleared by the GDSC driver on MSMCOBALT. Instead, the individual client drivers will use the clk_set_flags API as needed to toggle these bits. CRs-Fixed: 1069091 Change-Id: I898f627ce90251166a5f4314daca61e5ba958e6b Signed-off-by: Deepak Katragadda --- arch/arm/boot/dts/qcom/msmcobalt.dtsi | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index d3f50aa267c5..315180848ac2 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -2933,16 +2933,10 @@ }; &gdsc_usb30 { - clock-names = "core_clk"; - clocks = <&clock_gcc clk_gcc_usb30_master_clk>; status = "ok"; }; &gdsc_pcie_0 { - clock-names = "master_bus_clk", "slave_bus_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_pcie_0_mstr_axi_clk>, - <&clock_gcc clk_gcc_pcie_0_slv_axi_clk>, - <&clock_gcc clk_gcc_pcie_0_pipe_clk>; status = "ok"; }; @@ -3000,19 +2994,14 @@ }; &gdsc_mdss { - clock-names = "bus_clk", "rot_clk"; - clocks = <&clock_mmss clk_mmss_mdss_axi_clk>, - <&clock_mmss clk_mmss_mdss_rot_clk>; proxy-supply = <&gdsc_mdss>; qcom,proxy-consumer-enable; status = "ok"; }; &gdsc_gpu_gx { - clock-names = "bimc_core_clk", "core_clk", "core_root_clk"; - clocks = <&clock_gcc clk_gcc_gpu_bimc_gfx_clk>, - <&clock_gfx clk_gpucc_gfx3d_clk>, - <&clock_gfx clk_gfx3d_clk_src>; + clock-names = "core_root_clk"; + clocks = <&clock_gfx clk_gfx3d_clk_src>; qcom,force-enable-root-clk; parent-supply = <&gfx_vreg>; status = "ok"; -- cgit v1.2.3