From abad0fdbe2dc3974df5b48de21689d115521ec2c Mon Sep 17 00:00:00 2001 From: Benjamin Chan Date: Wed, 17 Aug 2016 10:16:50 -0400 Subject: msm: mdss: Correct command mode MISR CRC reg offset and blockid msmcobalt has a different command mode MISR CRC register offset. Correct the offset for the MISR control and signature registers, and correct the block_id by lookup the INTF number from CTL. CRs-Fixed: 1049910 Change-Id: If4fb44d217ed84067a0732334523ddb1e435e4e7 Signed-off-by: Benjamin Chan --- drivers/video/fbdev/msm/mdss_debug.c | 40 ++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/drivers/video/fbdev/msm/mdss_debug.c b/drivers/video/fbdev/msm/mdss_debug.c index 39848366a55b..18f7d46a4cc7 100644 --- a/drivers/video/fbdev/msm/mdss_debug.c +++ b/drivers/video/fbdev/msm/mdss_debug.c @@ -1298,6 +1298,38 @@ static inline struct mdss_mdp_misr_map *mdss_misr_get_map(u32 block_id, } } else { if (block_id <= DISPLAY_MISR_HDMI) { + /* + * In Dual LM single display configuration, + * the interface number (i.e. block_id) + * might not be the one given from ISR. + * We should always check with the actual + * intf_num from ctl. + */ + struct msm_fb_data_type *mfd = NULL; + + /* + * ISR pass in NULL ctl, so we need to get it + * from the mdata. + */ + if (!ctl && mdata->mixer_intf) + ctl = mdata->mixer_intf->ctl; + if (ctl) + mfd = ctl->mfd; + if (mfd && is_dual_lm_single_display(mfd)) { + switch (ctl->intf_num) { + case MDSS_MDP_INTF1: + block_id = DISPLAY_MISR_DSI0; + break; + case MDSS_MDP_INTF2: + block_id = DISPLAY_MISR_DSI1; + break; + default: + pr_err("Unmatch INTF for Dual LM single display configuration, INTF:%d\n", + ctl->intf_num); + return NULL; + } + } + intf_base = (char *)mdss_mdp_get_intf_base_addr( mdata, block_id); @@ -1311,11 +1343,15 @@ static inline struct mdss_mdp_misr_map *mdss_misr_get_map(u32 block_id, /* * extra offset required for - * cmd misr in 8996 + * cmd misr in 8996 and mdss3.x */ if (IS_MDSS_MAJOR_MINOR_SAME( mdata->mdp_rev, - MDSS_MDP_HW_REV_107)) { + MDSS_MDP_HW_REV_107) || + (mdata->mdp_rev == + MDSS_MDP_HW_REV_300) || + (mdata->mdp_rev == + MDSS_MDP_HW_REV_301)) { ctrl_reg += 0x8; value_reg += 0x8; } -- cgit v1.2.3