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* | soc: qcom: add snapshot of PIL, SSR and SYSMON drivers/librariesDavid Keitel2016-03-22
| | | | | | | | | | | | | | | | | | | | This is a snapshot of PIL, SSR and SYSMON drivers and libraries as of msm-3.18 commit 5cef33a285e91869cebe40a25e6294ae1e5fc9cc (Merge "ASoC: msm: Update the AFE clock API support") Change-Id: Ibebddee32b15fbcb5b18cceac43769d3309e609c Signed-off-by: David Keitel <dkeitel@codeaurora.org>
* | soc: qcom: idle: Snapshot of idle/sleep driver as of msm-3.18Mahesh Sivasubramanian2016-03-22
| | | | | | | | | | | | | | This is a snapshot of the Sleep driver and realted functionality as of e70ad0cd5efdd9dc91a77dcdac31d6132e1315c1 on msm-3.18 branch Change-Id: I98fec26849898c5c66abbb1b094439780c23964d
* | msm: Add secure vmid for msaNeeti Desai2016-03-22
| | | | | | | | | | | | | | | | | | For sharing the memory between hlos and modem, a new secure vmid is needed to be used in the assign api. Define that. Change-Id: Ibcddbafeb1fc430aae3fcda7c609bca4d81e57a9 Signed-off-by: Neeti Desai <neetid@codeaurora.org>
* | msm: secure_buffer: Add helper function to convert VMIDs into stringsMitchel Humpherys2016-03-22
| | | | | | | | | | | | | | | | It can be useful to convert secure VMID values into strings. Provide a helper function to do so. Change-Id: If907a0bac92c5d164154c0e5dfe67933115163c8 Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
* | msm: secure_buffer: Update the hyp_assign_phys() apiNeeti Desai2016-03-22
| | | | | | | | | | | | | | | | | | | | | | | | The hyp_assign_phys() api can be called by different usecases where it is not guaranteed that the source vm is always VMID_HLOS. Pass the responsibility of setting the source_vm to caller of the function. Change-Id: I3851a6681f49d4bb6fa5b7a889a16a158497e9e6 Signed-off-by: Neeti Desai <neetid@codeaurora.org>
* | msm: kgsl: Add EXEC permission to the unassign callShrenuj Bansal2016-03-22
| | | | | | | | | | | | | | | | | | | | When calling hyp_assign to free a secure buffer we need to pass in RWX permissions so that when the Hypervisor unmaps the buffer and maps it back to HLOS, the HLOS is able to use the same memory for data and instructions. Change-Id: I71e06a81df85891fecb11c5f197acd54979d2887 Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>
* | msm: ion: Add secure cma heapNeeti Desai2016-03-22
| | | | | | | | | | | | | | | | | | | | | | Add the infrastructure to support a secure cma heap needed for secure usecases. The new heap uses the existing cma heap infrastructure, along with adding the assign call to assign the correct VM to the buffers during allocation and free. Change-Id: I0c959f46ffa6eb67128b6794e9e60c470a3d292e Signed-off-by: Neeti Desai <neetid@codeaurora.org>
* | msm: Update the assign api to secure buffersNeeti Desai2016-03-22
| | | | | | | | | | | | | | | | | | | | | | The assign call apis have been updated by TZ to include more usecases. Update the secure_buffer api files with the same. The system secure heap needs to be updated to reflect the change in the api calls. Change-Id: Idc784ddac222e6ad9f5defafc422e6e3fb88aa0c Signed-off-by: Neeti Desai <neetid@codeaurora.org>
* | msm: move types and declarations to header fileNeeti Desai2016-03-22
| | | | | | | | | | | | | | | | | | | | | | Move all function declarations and types to the header file to make the macros and definitions available even when the CONFIG_MSM_SECURE_BUFFER is not enabled. Rename rid of the msm_ion_secure_table and msm_ion_unsecure_table to something more generic. Change-Id: Ia5ca0c52f971a67c7936c64b42cd2522aa1773fa Signed-off-by: Neeti Desai <neetid@codeaurora.org>
* | soc: qcom: socinfo: Add MSMCOBALT chip IDRunmin Wang2016-03-22
| | | | | | | | | | | | | | | | | | | | | | Add MSMCOBALT chip ID and relevant macros. Change-Id: I0f97ed3eafdc54636849a58e5dfc34750d5dcea3 Signed-off-by: Trilok Soni <tsoni@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Conflicts: include/soc/qcom/socinfo.h
* | soc: qcom: socinfo: remove APIs without any clientsMatt Wagantall2016-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | socinfo exports a number of APIs left over from the days before device tree, for targets which are no longer supported in the current kernel. Remove these unused APIs: get_core_count() read_msm_cpu_type() cpu_is_*() soc_class_is_*() Change-Id: I2fb23c44649f0582fb0e2523a0235470f76a3da9 Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
* | soc: qcom: socinfo: separate major and minor format versionsMatt Wagantall2016-03-22
| | | | | | | | | | | | | | | | | | | | | | The socinfo format version includes a 16-bit major field number field that has always been zero, but may be changed in the future to indicate a non-backwards-compatible format change. Update current prints and checks to properly interpret both the major and minor components. Change-Id: I87a6d2e3f9379662857e03bb5b7e918f699c61ab Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
* | Update target name references for 8976Ian Maund2016-03-22
| | | | | | | | | | | | | | | | With the official announcement of 8976, remove all references to its internal code name, and replace them with 8976. Change-Id: Iadedabf16a7bef92c582524ae6ea38b31ba26ac4 Signed-off-by: Ian Maund <imaund@codeaurora.org>
* | soc: qcom: Add socinfo driver snapshotAbhimanyu Kapur2016-03-22
| | | | | | | | | | | | | | | | | | | | | | This is a snapshot of the socinfo driver as of msm-3.14 commit: 3bc54cf86bdc7affa7cd4bf7faa3c57fe8f8819d (Merge "msm: camera: Add dummy sub module in sensor pipeline") Change-Id: I6b5b866ede0e84432fad460e9d95babfdbc556fc Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
* | soc: qcom: watchdog_v2: Add support to trigger watchdog bite on panicSubbaraman Narayanamurthy2016-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | In certain cases during a kernel panic,the interrupts on non-panicking CPUs are disabled. Since CPU context cannot be collected by sending IPI to those CPUs, we're limited to debug the problem. Forcing a watchdog bite during kernel panic will ensure us getting the proper CPU context. Hence adding support for the same. Change-Id: Id06030d9bc46d94209da7f0ef8c47bfd3477baf6 Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org> [abhimany: resolve trivial merge conflicts] Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
* | power: reset: replace upstream msm-poweroff driverJosh Cartwright2016-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a snapshot of the msm-poweroff driver as of msm-3.10 commit acdce027751d5a7488b283f0ce3111f873a5816d (Merge "defconfig: arm64: Enable ONESHOT_SYNC for msm8994") In addition, make this driver selectable when ARCH_MSM || ARCH_QCOM. Signed-off-by: Josh Cartwright <joshc@codeaurora.org> [abhimany: resolve trivial merge conflicts] Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org> Change-Id: Ifca5e017ad67cd78cbd507864fd3a0ee37d8713e
* | soc: qcom: Include the kryo-l2-accessors driver in buildDevesh Jhunjhunwala2016-03-22
| | | | | | | | | | | | Add the kryo-l2-accessors driver to the build. Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
* | soc: qcom: Add kryo l2 accessors driver snapshotDevesh Jhunjhunwala2016-03-01
| | | | | | | | | | | | | | | | | | | | This is a snapshot of kryo l2 accessors driver as of msm-3.18 commit: e70ad0cd5efdd9dc91a77dcdac31d6132e1315c1 (Promotion of kernel.lnx.3.18-151201.) Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
* | clk: msm: Add support for MSM clocksTaniya Das2016-03-01
| | | | | | | | | | | | | | | | Support added for MSM clock and modifications in the clk framework to use the MSM clock framework. Change-Id: Ibbcf0ffbf9d30dde2dcb0e943225ad95dd4e857d Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | soc: spm: Snapshot of the SPM driver from 3.18 kernelAbhijeet Dharmapurikar2016-03-01
| | | | | | | | | | | | | | | | | | This is a snapshot of the SPM driver from 3.18 kernel. The upstream spm.c file is used as a idle driver. So updated spm driver from 3.18 kernel to msm-spm.c on 4.4 kernel. Change-Id: I73b020214fdcc7eb695cf8f5b52cf7885a0a10cd Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
* | qpnp: Add snapshot of some qpnp, regulator and charger driversAbhijeet Dharmapurikar2016-03-01
| | | | | | | | | | | | | | | | | | This snapshot is taken as of msm-3.18 commit 9da4ddc (Merge "clk: msm: clock-gcc: Associate gfx rail voting with gfx3d branch") Change-Id: Idd2f467f1f1863a156d1757589dfe78158f0e43f Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
* | soc: qcom: Add snapshot of RPM SMD DriverKarthikeyan Ramasubramanian2016-03-01
| | | | | | | | | | | | | | This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of kernel.lnx.3.18-151201.) Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
* | soc: qcom: Add snapshot of G-Link driverKarthikeyan Ramasubramanian2016-03-01
| | | | | | | | | | | | | | This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of kernel.lnx.3.18-151201.) Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
* | soc: qcom: Add snapshot of SMD driverKarthikeyan Ramasubramanian2016-03-01
| | | | | | | | | | | | | | This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of kernel.lnx.3.18-151201.) Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
* | soc: qcom: Add snapshot of SMEM driverKarthikeyan Ramasubramanian2016-03-01
| | | | | | | | | | | | | | This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of kernel.lnx.3.18-151201) Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
* | include: Introduce required header files for SMEM driverKarthikeyan Ramasubramanian2016-03-01
| | | | | | | | | | | | | | This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of kernel.lnx.3.18-151201.) Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
* | soc: qcom: Add snapshot of MEMORY DUMPAndy Gross2016-03-01
| | | | | | | | | | | | | | | | | | | | | | | | | | This is a snapshot of the memory_dump driver as of msm-3.10 commit: acdce027751d5a7488b283f0ce3111f873a5816d (Merge "defconfig: arm64: Enable ONESHOT_SYNC for msm8994") Change-Id: I296a57ab1c491b29911413fdb4abb82fa15137c3 Signed-off-by: Andy Gross <agross@codeaurora.org> [abhimany: resolve trivial merge conflicts] Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
* | soc: qcom: Add snapshot of Qualcomm watchdog_v2 driverAndy Gross2016-03-01
| | | | | | | | | | | | | | | | | | | | | | | | This is a snapshot of the watchdog_v2 driver as of msm-3.10 commit acdce027751d5a7488b283f0ce3111f873a5816d (Merge "defconfig: arm64: Enable ONESHOT_SYNC for msm8994") Change-Id: I8cd7a84e0cbb45c3ac20d4c84f5603ab5df1edae Signed-off-by: Andy Gross <agross@codeaurora.org> [abhimany: resolve trivial merge conflicts] Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
* | soc: qcom: scm: Add LMH specific mutex lockVikram Mulukutla2016-03-01
| | | | | | | | | | | | | | | | | | | | It is required on some hardware that the Limits Management secure API be executed in mutual exclusion with certain other hardware-accessing drivers. Provide a mutex to achieve this. Change-Id: Ie0db516e335c29b79e959a0a6e6fb76231af6bf4 Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
* | soc: qcom: Add SCM driver snapshotAbhimanyu Kapur2016-03-01
|/ | | | | | | | | | | This is a snapshot of the scm driver as of msm-3.14 commit: 3bc54cf86bdc7affa7cd4bf7faa3c57fe8f8819d (Merge "msm: camera: Add dummy sub module in sensor pipeline") Change-Id: Ida15e7da1a8c92e96b4f59feecb4d9dbaf667273 Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2015-11-10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "As we've enabled multiplatform kernels on ARM, and greatly done away with the contents under arch/arm/mach-*, there's still need for SoC-related drivers to go somewhere. Many of them go in through other driver trees, but we still have drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code that might be shared between ARM and ARM64 (or just in general makes sense to not have under the architecture directory). This branch contains mostly such code: - Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to communicate with power management blocks on these SoCs for use by clock, regulator and bus frequency drivers. - Allwinner Reduced Serial Bus driver, again used to communicate with PMICs. - Drivers for ARM's SCPI (System Control Processor). Not to be confused with PSCI (Power State Coordination Interface). SCPI is used to communicate with the assistant embedded cores doing power management, and we have yet to see how many of them will implement this for their hardware vs abstracting in other ways (or not at all like in the past). - To make confusion between SCPI and PSCI more likely, this release also includes an update of PSCI to interface version 1.0. - Rockchip support for power domains. - A driver to talk to the firmware on Raspberry Pi" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (57 commits) soc: qcom: smd-rpm: Correct size of outgoing message bus: sunxi-rsb: Add driver for Allwinner Reduced Serial Bus bus: sunxi-rsb: Add Allwinner Reduced Serial Bus (RSB) controller bindings ARM: bcm2835: add mutual inclusion protection drivers: psci: make PSCI 1.0 functions initialization version dependent dt-bindings: Correct paths in Rockchip power domains binding document soc: rockchip: power-domain: don't try to print the clock name in error case soc: qcom/smem: add HWSPINLOCK dependency clk: berlin: add cpuclk ARM: berlin: dts: add CLKID_CPU for BG2Q ARM: bcm2835: Add the Raspberry Pi firmware driver soc: qcom: smem: Move RPM message ram out of smem DT node soc: qcom: smd-rpm: Correct the active vs sleep state flagging soc: qcom: smd: delete unneeded of_node_put firmware: qcom-scm: build for correct architecture level soc: qcom: smd: Correct SMEM items for upper channels qcom-scm: add missing prototype for qcom_scm_is_available() qcom-scm: fix endianess issue in __qcom_scm_is_call_available soc: qcom: smd: Reject send of too big packets soc: qcom: smd: Handle big endian CPUs ...
| * ARM: bcm2835: add mutual inclusion protectionAlexander Aring2015-10-24
| | | | | | | | | | | | | | | | | | This patch adds mutual inclusion protection for the rpi firmware header. Cc: Eric Anholt <eric@anholt.net> Cc: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * ARM: bcm2835: Add the Raspberry Pi firmware driverEric Anholt2015-10-14
| | | | | | | | | | | | | | | | | | This gives us a function for making mailbox property channel requests of the firmware, which is most notable in that it will let us get and set clock rates. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* | soc: add stubs for brcmstb SoC'sBrian Norris2015-09-14
|/ | | | | | | Used on BCM7xxx Set-Top Box chips (e.g., BCM7445). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* Merge tag 'iommu-updates-v4.3' of ↵Linus Torvalds2015-09-08
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates for from Joerg Roedel: "This time the IOMMU updates are mostly cleanups or fixes. No big new features or drivers this time. In particular the changes include: - Bigger cleanup of the Domain<->IOMMU data structures and the code that manages them in the Intel VT-d driver. This makes the code easier to understand and maintain, and also easier to keep the data structures in sync. It is also a preparation step to make use of default domains from the IOMMU core in the Intel VT-d driver. - Fixes for a couple of DMA-API misuses in ARM IOMMU drivers, namely in the ARM and Tegra SMMU drivers. - Fix for a potential buffer overflow in the OMAP iommu driver's debug code - A couple of smaller fixes and cleanups in various drivers - One small new feature: Report domain-id usage in the Intel VT-d driver to easier detect bugs where these are leaked" * tag 'iommu-updates-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (83 commits) iommu/vt-d: Really use upper context table when necessary x86/vt-d: Fix documentation of DRHD iommu/fsl: Really fix init section(s) content iommu/io-pgtable-arm: Unmap and free table when overwriting with block iommu/io-pgtable-arm: Move init-fn declarations to io-pgtable.h iommu/msm: Use BUG_ON instead of if () BUG() iommu/vt-d: Access iomem correctly iommu/vt-d: Make two functions static iommu/vt-d: Use BUG_ON instead of if () BUG() iommu/vt-d: Return false instead of 0 in irq_remapping_cap() iommu/amd: Use BUG_ON instead of if () BUG() iommu/amd: Make a symbol static iommu/amd: Simplify allocation in irq_remapping_alloc() iommu/tegra-smmu: Parameterize number of TLB lines iommu/tegra-smmu: Factor out tegra_smmu_set_pde() iommu/tegra-smmu: Extract tegra_smmu_pte_get_use() iommu/tegra-smmu: Use __GFP_ZERO to allocate zeroed pages iommu/tegra-smmu: Remove PageReserved manipulation iommu/tegra-smmu: Convert to use DMA API iommu/tegra-smmu: smmu_flush_ptc() wants device addresses ...
| * iommu/tegra-smmu: Parameterize number of TLB linesThierry Reding2015-08-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of TLB lines was increased from 16 on Tegra30 to 32 on Tegra114 and later. Parameterize the value so that the initial default can be set accordingly. On Tegra30, initializing the value to 32 would effectively disable the TLB and hence cause massive latencies for memory accesses translated through the SMMU. This is especially noticeable for isochronuous clients such as display, whose FIFOs would continuously underrun. Fixes: 891846516317 ("memory: Add NVIDIA Tegra memory controller support") Signed-off-by: Thierry Reding <treding@nvidia.com>
| * iommu/tegra-smmu: Move flush_dcache to tegra-smmu.cRussell King2015-08-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drivers should not be using __cpuc_* functions nor outer_cache_flush() directly. This change partly cleans up tegra-smmu.c. The only difference between cache handling of the tegra variants is Denver, which omits the call to outer_cache_flush(). This is due to Denver being an ARM64 CPU, and the ARM64 architecture does not provide this function. (This, in itself, is a good reason why these should not be used.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [treding@nvidia.com: fix build failure on 64-bit ARM] Signed-off-by: Thierry Reding <treding@nvidia.com>
* | Merge tag 'tegra-for-4.3-memory' of ↵Olof Johansson2015-08-20
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers ARM: tegra: Memory controller updates for v4.3-rc1 Adds support for Tegra210, which allows the SMMU to be used on this new SoC generation. * tag 'tegra-for-4.3-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: memory: tegra: Add Tegra210 support memory: tegra: Add support for a variable-size client ID bitfield memory: tegra: Expose supported rates via debugfs Signed-off-by: Olof Johansson <olof@lixom.net>
| * | memory: tegra: Add support for a variable-size client ID bitfieldPaul Walmsley2015-08-13
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent versions of the Tegra MC hardware extend the size of the client ID bitfield in the MC_ERR_STATUS register by one bit. While one could simply extend the bitfield for older hardware, that would allow data from reserved bits into the driver code, which is generally a bad idea on principle. So this patch instead passes in the client ID mask from from the per-SoC MC data. There's no MC support for T210 (yet), but when that support winds up in the kernel, the appropriate soc->client_id_mask value for that chip will be 0xff. Based on an original patch by David Ung <davidu@nvidia.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: David Ung <davidu@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* | soc/tegra: fuse: Rename core_* to soc_*Thierry Reding2015-07-16
| | | | | | | | | | | | | | | | There's a mixture of core_* and soc_* prefixes for variables storing information related to the VDD_CORE rail. Choose one (soc_*) and use it more consistently. Signed-off-by: Thierry Reding <treding@nvidia.com>
* | soc/tegra: fuse: Add Tegra210 supportThierry Reding2015-07-16
| | | | | | | | | | | | | | Add Tegra210 support to the fuses driver and add Tegra210-specific speedo definitions. Signed-off-by: Thierry Reding <treding@nvidia.com>
* | soc/tegra: pmc: Add Tegra210 supportThierry Reding2015-07-16
|/ | | | | | | | | Tegra210 uses a power management controller that is compatible with earlier SoC generations but adds a couple of power partitions for new hardware blocks. Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds2015-06-26
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM updates from Russell King: "Bigger items included in this update are: - A series of updates from Arnd for ARM randconfig build failures - Updates from Dmitry for StrongARM SA-1100 to move IRQ handling to drivers/irqchip/ - Move ARMs SP804 timer to drivers/clocksource/ - Perf updates from Mark Rutland in preparation to move the ARM perf code into drivers/ so it can be shared with ARM64. - MCPM updates from Nicolas - Add support for taking platform serial number from DT - Re-implement Keystone2 physical address space switch to conform to architecture requirements - Clean up ARMv7 LPAE code, which goes in hand with the Keystone2 changes. - L2C cleanups to avoid unlocking caches if we're prevented by the secure support to unlock. - Avoid cleaning a potentially dirty cache containing stale data on CPU initialisation - Add ARM-only entry point for secondary startup (for machines that can only call into a Thumb kernel in ARM mode). Same thing is also done for the resume entry point. - Provide arch_irqs_disabled via asm-generic - Enlarge ARMv7M vector table - Always use BFD linker for VDSO, as gold doesn't accept some of the options we need. - Fix an incorrect BSYM (for Thumb symbols) usage, and convert all BSYM compiler macros to a "badr" (for branch address). - Shut up compiler warnings provoked by our cmpxchg() implementation. - Ensure bad xchg sizes fail to link" * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (75 commits) ARM: Fix build if CLKDEV_LOOKUP is not configured ARM: fix new BSYM() usage introduced via for-arm-soc branch ARM: 8383/1: nommu: avoid deprecated source register on mov ARM: 8391/1: l2c: add options to overwrite prefetching behavior ARM: 8390/1: irqflags: Get arch_irqs_disabled from asm-generic ARM: 8387/1: arm/mm/dma-mapping.c: Add arm_coherent_dma_mmap ARM: 8388/1: tcm: Don't crash when TCM banks are protected by TrustZone ARM: 8384/1: VDSO: force use of BFD linker ARM: 8385/1: VDSO: group link options ARM: cmpxchg: avoid warnings from macro-ized cmpxchg() implementations ARM: remove __bad_xchg definition ARM: 8369/1: ARMv7M: define size of vector table for Vybrid ARM: 8382/1: clocksource: make ARM_TIMER_SP804 depend on GENERIC_SCHED_CLOCK ARM: 8366/1: move Dual-Timer SP804 driver to drivers/clocksource ARM: 8365/1: introduce sp804_timer_disable and remove arm_timer.h inclusion ARM: 8364/1: fix BE32 module loading ARM: 8360/1: add secondary_startup_arm prototype in header file ARM: 8359/1: correct secondary_startup_arm mode ARM: proc-v7: sanitise and document registers around errata ARM: proc-v7: clean up MIDR access ...
| * ARM: 8361/1: sa1100: add platform functions to handle PWER settingsDmitry Eremin-Solenikov2015-05-18
| | | | | | | | | | | | | | | | | | PWER settings logically belongs neither to GPIO nor to system IRQ code. Add special functions to handle PWER (for GPIO and for system IRQs) from platform code. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge tag 'armsoc-drivers' of ↵Linus Torvalds2015-06-26
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Kevin Hilman: "Some of these are for drivers/soc, where we're now putting SoC-specific drivers these days. Some are for other driver subsystems where we have received acks from the appropriate maintainers. Some highlights: - simple-mfd: document DT bindings and misc updates - migrate mach-berlin to simple-mfd for clock, pinctrl and reset - memory: support for Tegra132 SoC - memory: introduce tegra EMC driver for scaling memory frequency - misc. updates for ARM CCI and CCN busses" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) drivers: soc: sunxi: Introduce SoC driver to map SRAMs arm-cci: Add aliases for PMU events arm-cci: Add CCI-500 PMU support arm-cci: Sanitise CCI400 PMU driver specific code arm-cci: Abstract handling for CCI events arm-cci: Abstract out the PMU counter details arm-cci: Cleanup PMU driver code arm-cci: Do not enable CCI-400 PMU by default firmware: qcom: scm: Add HDCP Support ARM: berlin: add an ADC node for the BG2Q ARM: berlin: remove useless chip and system ctrl compatibles clk: berlin: drop direct of_iomap of nodes reg property ARM: berlin: move BG2Q clock node ARM: berlin: move BG2CD clock node ARM: berlin: move BG2 clock node clk: berlin: prepare simple-mfd conversion pinctrl: berlin: drop SoC stub provided regmap ARM: berlin: move pinctrl to simple-mfd nodes pinctrl: berlin: prepare to use regmap provided by syscon reset: berlin: drop arch_initcall initialization ...
| * \ Merge tag 'tegra-for-4.2-emc' of ↵Arnd Bergmann2015-05-13
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers Merge "ARM: tegra: Add EMC driver for v4.2-rc1" from Thierry Reding: This introduces the EMC driver that's required to scale the external memory frequency. * tag 'tegra-for-4.2-emc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: memory: tegra: Add EMC frequency debugfs entry memory: tegra: Add EMC (external memory controller) driver memory: tegra: Add API needed by the EMC driver of: Add Tegra124 EMC bindings of: Document timings subnode of nvidia,tegra-mc
| | * | memory: tegra: Add EMC (external memory controller) driverMikko Perttunen2015-05-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implements functionality needed to change the rate of the memory bus clock. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | memory: tegra: Add API needed by the EMC driverMikko Perttunen2015-05-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The EMC driver needs to know the number of external memory devices and also needs to update the EMEM configuration based on the new rate of the memory bus. To know how to update the EMEM config, looks up the values of the burst regs in the DT, for a given timing. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | Merge tag 'tegra-for-4.2-ramcode' of ↵Arnd Bergmann2015-05-13
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers Merge "ARM: tegra: RAM code access for v4.2-rc1" from Thierry Reding: The RAM code is used by the memory and external memory controllers to determine which set of timings to use for memory frequency scaling. * tag 'tegra-for-4.2-ramcode' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: fuse: Add RAM code reader helper of: Document long-ram-code property in nvidia,tegra20-apbmisc
| | * | soc/tegra: fuse: Add RAM code reader helperMikko Perttunen2015-05-04
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | Needed for the EMC and MC drivers to know what timings from the DT to use. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit v1.2.3 (git 2.25.1) at 2026-01-20 00:51:23 +0000