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[ Upstream commit 6549c46af8551b346bcc0b9043f93848319acd5c ]
For linear regulators, the n_voltages should be (max - min) / step + 1.
Buck voltage from 1v to 3V, per step 100mV, and vout mask is 0x1f.
If value is from 20 to 31, the voltage will all be fixed to 3V.
And LDO also, just vout range is different from 1.2v to 3v, step is the
same. If value is from 18 to 31, the voltage will also be fixed to 3v.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: ChiYuan Huang <cy_huang@richtek.com>
Link: https://lore.kernel.org/r/20210627080418.1718127-1-axel.lin@ingics.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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commit f1c74a6c07e76fcb31a4bcc1f437c4361a2674ce upstream.
Trying to get the AB8500 charging driver working I ran into a bit
of bitrot: we haven't used the driver for a while so errors in
refactorings won't be noticed.
This one is pretty self evident: use argument to the macro or we
end up with a random pointer to something else.
Cc: stable@vger.kernel.org
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Marcus Cooper <codekipper@gmail.com>
Fixes: 297d716f6260 ("power_supply: Change ownership from driver to core")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit 5d749d0bbe811c10d9048cde6dfebc761713abfd upstream.
Prevent memory scribble by checking that ioctl buffer size parameters
are sane.
Without this check, on 32 bits system, if .insize = 0xffffffff - 20 and
.outsize the amount to scribble, we would overflow, allocate a small
amounts and be able to write outside of the malloc'ed area.
Adding a hard limit allows argument checking of the ioctl. With the
current EC, it is expected .insize and .outsize to be at around 512 bytes
or less.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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[ Upstream commit efddff27c886e729a7f84a7205bd84d7d4af7336 ]
IRQ wake up support for MAX8997 driver was initially configured by
respective property in pdata. However, after the driver conversion to
device-tree, setting it was left as 'todo'. Nowadays most of other PMIC MFD
drivers initialized from device-tree assume that they can be an irq wakeup
source, so enable it also for MAX8997. This fixes support for wakeup from
MAX8997 RTC alarm.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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[ Upstream commit 55143439b7b501882bea9d95a54adfe00ffc79a3 ]
When trying to read any MC13892 ADC channel on a imx51-babbage board:
The MC13892 PMIC shutdowns completely.
After debugging this issue and comparing the MC13892 and MC13783
initializations done in the vendor kernel, it was noticed that the
CHRGRAWDIV bit of the ADC0 register was not being set.
This bit is set by default after power on, but the driver was
clearing it.
After setting this bit it is possible to read the ADC values correctly.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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commit 6b4814a9451add06d457e198be418bf6a3e6a990 upstream.
Mismatch between what is found in the Datasheets for DA9063 and DA9063L
provided by Dialog Semiconductor, and the register names provided in the
MFD registers file. The changes are for the OTP (one-time-programming)
control registers. The two naming errors are OPT instead of OTP, and
COUNT instead of CONT (i.e. control).
Cc: Stable <stable@vger.kernel.org>
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Native audio playback is muted after adsp subsystem restart,
because codec device_reset() API is called even before device_down()
API finishes execution. This causes audio to mute, as codec is not
in proper reset state. Add new lock to synchronize codec subsystem
restart APIs.
Change-Id: I2366f8b04fc6cb7d874661b948c3e9af10470107
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
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commit 9a6dc644512fd083400a96ac4a035ac154fe6b8d upstream.
set_bit() and clear_bit() take the bit number so this code is really
doing "1 << (1 << irq)" which is a double shift bug. It's done
consistently so it won't cause a problem unless "irq" is more than 4.
Fixes: 70c6cce04066 ('mfd: Support 88pm80x in 80x driver')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Add support to check for wcd934x 1.1 version and update
register values accordingly.
Change-Id: Id9fb06fa25dfdd56250a76248f71758af39bade6
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
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commit 7175cce1c3f1d8c8840d2004f78f96a3904249b5 upstream.
Now that open delay and sample delay for each channel is configurable
via DT, the default IDLE_TIMEOUT value is not enough as this is
calculated based on hardcoded macros. This results in driver returning
EBUSY sometimes. Fix this by increasing the timeout
value based on maximum value possible to open delay and sample delays
for each channel.
Fixes: 5dc11e810676e ("iio: adc: ti_am335x_adc: make sample delay, open delay, averaging DT parameters")
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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TASHA_IS_1_1 macro checks only for version number.
This macro returns true for tavil codec. So modify
tasha macros to check for codec and version.
CRs-Fixed: 1066331
Change-Id: I5240e0ee888187a8185974ea288ce2cad62bd776
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
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As there are many hardware version of wcd934x codec. Add version
check in the code so that userspace can get the version info.
CRs-Fixed: 1063367
Change-Id: Ia320380d568426c2d7a414a832980a556ff27f0f
Signed-off-by: Walter Yang <yandongy@codeaurora.org>
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commit 9798ac6d32c1a32d6d92d853ff507d2d39c4300c upstream.
So that callers of cros_ec_cmd_xfer() don't have to repeat boilerplate
code when checking for errors from the EC side.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This reverts commit 9d6fd2c3e9fcfb ("Merge remote-tracking branch
'msm-4.4/tmp-510d0a3f' into msm-4.4"), because it breaks the
dump parsing tools due to kernel can be loaded anywhere in the memory
now and not fixed at linear mapping.
Change-Id: Id416f0a249d803442847d09ac47781147b0d0ee6
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
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WCD9XXX irq driver uses device tree APIs in the
IRQ handler. Device tree APIs disable interrupts
for the duration of their execution. Do not use
these APIs in the wcd9xxx irq handler to reduce
the interrupt off (irqsoff) latency.
CRs-fixed: 1055867
Change-Id: I3ec0b8dce2b2bb1ccbcb5bdd7cd6621a5f9513f8
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
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Depending on the impedance across HPHL and HPHR, set classh
configurations so as to avoid false OCP events.
Move wcd9xxx_registers.h to uapi folder, as this header
file is used by userspace for wdc9330 codec.
CRs-Fixed: 963843
Change-Id: Ie2fb4b75b7f74013580bd3912372c64ddefc734e
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
Signed-off-by: Neema Shetty <nshetty@codeaurora.org>
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DMIC clock on ECPP(Echo Cancellation Ping-Pong) path can be set to
lower clock rate to avoid power consumption. Change configures the
DMIC clock rate on ECPP path based on device tree settings.
CRs-fixed: 1022917
Change-Id: I03e1a7f5ef3cf1b1907c03a3d38965ce3a611bc4
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
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Registers for page 0x50 in the wcd934x audio codec are currently
not defined. These registers control WCD DSP register configuration
and setup. Add these register definitions so that codec driver can
read/write these registers.
CRs-Fixed: 1049012
Change-Id: If1162c09de8d4d7c330a97a1f133f6d46ce2fd74
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
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Add wcd934x as a mfd child and configure regmap.
Configure MCLK as per the HW sequence.
CRs-Fixed: 1041199
Change-Id: I9e2dbb0f0acaa1442c1624556bc52abf98158c92
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
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Add changes to support wcd934x audio codec.
This driver registers to ALSA framework, supports
basic codec operations like playback and record.
CRs-Fixed: 1041199
Change-Id: I62c53d98b6cd8e750a040f692b164b9bfcf44799
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
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If target can support multiple codecs, only one of the
codecs will be enumerated. Do not clean up common resources
when other codec fails to enumerate.
CRs-Fixed: 1041199
Change-Id: I74a298739925b5763458c2e637372aa8f2c2aa55
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
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Refactor wcd9xxx audio codec driver for better handling
of codec specific functionalities.
CRs-fixed: 1028800
Change-Id: I229ee4a741c5a606e2eb045940f5ee3c4eabf512
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
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Switch to swap ground and mic headset poles is controlled by a
GPIO on the Apps processor instead of the PMIC, and therefore
software logic must change to use pinctrl APIs
CRs-fixed: 1019254
Change-Id: Ibccddc82b18614ddbe6ef9c9720b3de1ce00163e
Signed-off-by: Stephen Oglesby <soglesby@codeaurora.org>
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commit 3b672623079bb3e5685b8549e514f2dfaa564406 upstream.
The buck9 regulator of S2MPS11 PMIC had incorrect vsel_mask (0xff
instead of 0x1f) thus reading entire register as buck9's voltage. This
effectively caused regulator core to interpret values as higher voltages
than they were and then to set real voltage much lower than intended.
The buck9 provides power to other regulators, including LDO13
and LDO19 which supply the MMC2 (SD card). On Odroid XU3/XU4 the lower
voltage caused SD card detection errors on Odroid XU3/XU4:
mmc1: card never left busy state
mmc1: error -110 whilst initialising SD card
During driver probe the regulator core was checking whether initial
voltage matches the constraints. With incorrect vsel_mask of 0xff and
default value of 0x50, the core interpreted this as 5 V which is outside
of constraints (3-3.775 V). Then the regulator core was adjusting the
voltage to match the constraints. With incorrect vsel_mask this new
voltage mapped to a vere low voltage in the driver.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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WCD and WSA codecs uses MSM gpios that are accessed through pinctrl
mechanism. Codec reset gpios need to be configured before master
controller is initialized otherwise codec cannot be enumerated
on the bus. Add a new platform device driver to update reset gpio
configuration to valid state before bus initialization.
Change-Id: I1e36f4a85334704652c6b50950f50b90224a472e
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
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During codec interrupt controller probe, allocate and register
irq domain for codec interrupts for mapping between hwirq and
irq numbers.
Change-Id: I3e32043499f2b1e2616cf74864969815e626a23b
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
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Codec reset gpio configuration needs to be updated
before slimbus master component is initialized otherwise
codec cannot be enumerated on the bus. Add a new platform
device driver to update the codec reset gpio configuration
to valid state (output, drive-strength) before slimbus
is initialized.
CRs-Fixed: 968161
Change-Id: I7227212e6b846d58196718255aa4b0923352d120
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
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During ADSP subsystem restart, all slimbus read/write would fail
as the bus is not available. Avoid codec read/write, until the
slimbus master in ADSP is up.
Change-Id: Iec1933d2625c1cd3dd700b2b3e2ffc7eae64880b
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
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Digital microphone clock drive strength setting in the codec could
be platform dependent based on the type of microphone, etc. Add support
to make the DMIC clock drive strength configurable through device tree.
CRs-fixed: 938006
Change-Id: I8b17d985052098b56d012081a77b6dfc94553eca
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
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Use efuse register values, to differentiate between
wcd9326 and wcd9335 codecs.
Change-Id: I68e7ae5eb1717dccd0af975670ac3644304996b9
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
Signed-off-by: Simmi Pateriya <simmip@codeaurora.org>
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Update register sequence for low hifi and low power modes
for headphones on wcd9335 codec to achieve better performance.
Change-Id: Icf543df7c4e8ab4cc9222a39bf1df4e6af4ab8ec
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
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Add snapshot of audio codec drivers for MSM targets. The
code is migrated from msm-3.18 kernel at the below commit/AU level-
AU_LINUX_ANDROID_LA.HB.1.3.1.06.00.00.187.056
(e70ad0cd5efdd9dc91a77dcdac31d6132e1315c1)
(Promotion of kernel.lnx.3.18-151201.)
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
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The WRSTBI bit (disabled by default but enabled by bootloader), when
set, is responsible for resetting voltages to default values of
certain bucks on falling edge of Warm Reset Input pin from AP.
However on some boards (with S2MPS13) the pin is pulled down so any
suspend will effectively trigger the reset of bucks supplying the power
to the little and big cores. In the same time when resuming, these bucks
must provide voltage greater or equal to voltage before suspend to match
the frequency chosen by cpufreq. If voltage (default value of voltage
after reset) is lower than one set by cpufreq before suspend, then
system will hang during resuming.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reported-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Tested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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rts522a(rts5227s) is derived from rts5227, and mainly same with rts5227.
Add it to file mfd/rts5227.c to support this chip.
Signed-off-by: Micky Ching <micky_ching@realsil.com.cn>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Definitions for GPIO registers 8, 9, 10, 11, 12 and 13 are added into
the register header file.
- DA9052_GPIO_8_9_REG 25
- DA9052_GPIO_10_11_REG 26
- DA9052_GPIO_12_13_REG 27
A modification is also made to the MFD core code to define these registers
as readable and writable. The functions for da9052_reg_readable() and
da9052_reg_writeable() have had their case statements altered to include
these new registers.
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Add MFD core driver for Intel Broxton Whiskey Cove PMIC,
which is specially accessed by hardware IPC, not a generic
I2C device
Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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IRQ control registers of Intel Broxton Whisky Cove PMIC are
separated in two parts, so add secondary IRQ chip.
And the new member of device will be used in PMC IPC regmap APIs.
Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Some Arizona devices have a hardware ANC block present. This patch adds
the registers necessary to configure this hardware block.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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On Odroid XU3 board (with S2MPS11 PMIC) the PWRHOLD bit in CTRL1
register must be manually set to 0 before initiating power off sequence.
One of usual power down methods for Exynos based devices looks like:
1. PWRHOLD pin of PMIC is connected to PSHOLD of Exynos SoC.
2. Exynos holds up this pin during system operation.
3. ACOKB pin of PMIC is pulled up to VBATT and optionally to pin in
other device.
4. When PWRHOLD/PSHOLD goes low, the PMIC will turn off the power if
ACOKB goes high.
On Odroid XU3 family the difference is in (3) - the ACOKB is grounded.
This means that PMIC must manually set PWRHOLD field to low and then
wait for signal from Application Processor (the usual change in
PWRHOLD/PSHOLD pin will actually cut off the power).
The patch adds respective binding allowing Odroid XU3 device to be
powered off.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Reported-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Add chip identification support for 88PM860 device
to the pm80x_chip_mapping table.
Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@linaro.org>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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There is at least one board on the market, i.e. Intel Galileo Gen2, that uses
_ADR to distinguish the devices under one actual device. Due to this we have to
improve the quirk in the MFD core to handle that board.
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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There is at least one board on the market, i.e. Intel Galileo Gen2, that uses
_ADR to distinguish the devices under one actual device. Due to this we have to
improve the quirk in the MFD core to handle that board.
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Some EC implementations include a small nvram space used to store
verified boot context data. This patch offers a way to expose this
data to userspace.
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Emilio López <emilio.lopez@collabora.co.uk>
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch modifies tps6105x and associated function driver to use regmap
instead of operating directly on i2c.
Signed-off-by: Denis Grigoryev <grigoryev@fastwel.ru>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Add imx7d iomux-gpr field define.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This adds a driver for the usb power_supply bits of the axp20x PMICs.
I initially started writing my own driver, before coming aware of
Bruno Prémont's excellent earlier RFC with a driver for this.
My driver was lacking CURRENT_MAX and VOLTAGE_MIN support Bruno's
drvier has, so I've copied the code for those from his driver.
Note that the AC-power-supply and battery charger bits will need separate
drivers. Each one needs its own devictree child-node so that other
devicetree nodes can reference the right power-supply, and thus each one
will get its own mfd-cell / platform_device and platform-driver.
Cc: Bruno Prémont <bonbons@linux-vserver.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Bruno Prémont <bonbons@linux-vserver.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
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On wm5110/8280 some additional settings are required to get accurate
measurements at the top end of the headphone detection range. This patch
adds the bits required for this.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
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The switch is typically used in conjunction with the MICDET clamp in
order to suppress pops and clicks associated with jack insertion.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
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The newer devices support using a software comparison to determine
whether a 3/4 pole jack is present. Add the registers necessary for
this.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
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