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* clk: msm: Fix dsi clock divider configurationRajkumar Subbiah2017-05-15
| | | | | | | | | | | | | | The MND values and the PLL output divider configuration does not match the recommended values. When setting DSI pixel clock rate the MND array is ordered in a way that the requested rate goes from highest to lowest. Since the recommendation is to divide the clocks as close to VCO as possible, the request should be from lowest to highest. So reversing the fraction array to match the recommendation. The VCO min max rates are currently forced after pll output divider which is also fixed. Change-Id: I3cb5163f9c8dd3723cdc58bd7e7980719e683f1b Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
* clk: msm: gcc-8996: Add pinctrl clk for ln_bb_clkDevesh Jhunjhunwala2017-03-22
| | | | | | | | | Add the pinctrl clock for ln_bb_clk to the GCC driver for MSM8996. CRs-Fixed: 1063062 Change-Id: If85a0dbb26e350588cbd6614c032bf208a205be2 Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
* clk: qcom: Add separate aggre2_noc clock voters for SDM660/630Taniya Das2017-03-07
| | | | | | | | | Separate out the aggre2_noc voters so that individual voters could vote on these clocks and voter clock would aggregate the clock rates before sending a request to RPM. Change-Id: I8ef30af257d2f37ec5af6aa5e3d1b69e5ba8ec8c Signed-off-by: Taniya Das <tdas@codeaurora.org>
* Merge "clk: msm: clock-gcc-8998: Remove control of the hmss_ahb_clk from Linux"Linux Build Service Account2017-02-25
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| * clk: msm: clock-gcc-8998: Remove control of the hmss_ahb_clk from LinuxDeepak Katragadda2017-02-09
| | | | | | | | | | | | | | | | The gcc_hmss_ahb_clk will be controlled by RPM. Remove all control of it from the Linux clock driver. Change-Id: I0a6885e286841eb3f2d31223da3d430dde21d975 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | clk: qcom: Remove gcc_hmss_ahb_clk for sdm660Amit Nischal2017-02-21
| | | | | | | | | | | | | | | | The gcc_hmss_ahb_clk will be controlled by RPM. Remove all control of it from the HLOS clock driver. Change-Id: I26525787352cb0b85937cc005afba7c37a7989ff Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | clk: qcom: Clean up the MSM8996 multimedia clock controller (MMCC) driverOdelu Kukatla2017-02-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Following list of changes have been made 1. Add the missing clocks in multimedia clock controller driver. Also clean up clock flags and parent info for few clocks. 2. Removing clocks which are not controlled by HLOS. 3. MMCC needs to vote for volatge level on rail for the clock frequencies, so add voltage voting in MMCC. 4. Initial rate configuration for MMPLLs. Change-Id: If3d84e52783651b611b624dbc60b18993c0f0b1a Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org> Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | clk: qcom: Remove gcc_rx2_qlink_clkref_clk for sdm660Amit Nischal2017-02-07
|/ | | | | | | | | The gcc_rx2_qlink_clkref_clk is not required by any client, so remove controlling the clock from HLOS clock driver. Change-Id: I20dbb38f3f0fcbcdb3974923f4a0b540153d3fde Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* Merge "clk: qcom: mdss: add support for MDSS DP PLL for SDM660"Linux Build Service Account2017-01-28
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| * clk: qcom: mdss: add support for MDSS DP PLL for SDM660Padmanabhan Komanduru2017-01-25
| | | | | | | | | | | | | | | | | | Model and configure MDSS Display Port PLL for SDM660 target. Add changes to define and register DP VCO, divider and mux clocks as per common clock infrastructure. Change-Id: Ice83e21323087e81e2f30998260be85120e41fa8 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* | Merge "ASoC: audio-ext-clk: add parent to div and lnbb clks"Linux Build Service Account2017-01-18
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| * | ASoC: audio-ext-clk: add parent to div and lnbb clksYeleswarapu Nagaradhesh2017-01-19
| |/ | | | | | | | | | | | | | | Add parents to div_clk1 and ln_bbclk. And register both the clocks independently. Change-Id: Ic0435ebad533879e3e0648775956c91cc680644d Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
* | Merge "clk: qcom: Remove few graphics clock for sdm660"Linux Build Service Account2017-01-18
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| * | clk: qcom: Remove few graphics clock for sdm660Taniya Das2017-01-18
| |/ | | | | | | | | | | | | | | | | | | The gcc_gpu_bimc_gfx_src_clk and gcc_gpu_snoc_dvm_gfx_clk need to left at their default state of ON. Remove controlling them from the linux clock driver to avoid disabling them during late_init. Change-Id: Iefc033998bf87fcc98dfaa1b7321d9cc33dedd5e Signed-off-by: Taniya Das <tdas@codeaurora.org>
* / clk: qcom: Add support for GPLL0 active clock for CPUTaniya Das2017-01-17
|/ | | | | | | | CPU clocks would require to vote on active only instance of GPLL0, so add the clock and also update the parent names for the CPU clocks. Change-Id: Id8c7f76170a1cc94fe045b8ba975aaa42c4b3819 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* Merge "clk: qcom: Add support to register GPU rbcpr clocks"Linux Build Service Account2017-01-10
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| * clk: qcom: Add support to register GPU rbcpr clocksTaniya Das2017-01-10
| | | | | | | | | | | | | | | | | | GPU RBCPR clocks needs to registered separately, as GFX CPR would require the rbcpr clocks to register the regulator handle. Change-Id: I59def76e7dd69600be8faf47eb867a97ab04739e Signed-off-by: Amit Nischal <anischal@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | clk: qcom: Fix clocks which are required to be always onTaniya Das2017-01-10
|/ | | | | | | | | | | | Following are the changes made: 1. Add CLK_IGNORE_UNUSED flag for some clocks which are not supposed to be disabled at late_init_level. 2. Fix clock measure debug mux value for mmcc clocks. 3. Add mmss_mdss_byte1_intf_div_clk for mdp. 4. Fix usb ref clocks to branch voted. Change-Id: I06396c73f7855acfac283abe576e0b4cc1a92bd5 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* msm: Rename msmfalcon/apqfalcon to sdm660/sda660Neeraj Upadhyay2016-12-28
| | | | | | | | | Update the code name from msmfalcon/apqfalcon to sdm660/sda660. As part of this, update the filename containing "falcon" and files content containing "falcon". Change-Id: Iec85862251b9e1b4dcc8bdce8b214ce87c0049bc Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
* Merge "clk: qcom: Add voltage voting for MSM8996 GCC driver"Linux Build Service Account2016-12-26
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| * clk: qcom: Add voltage voting for MSM8996 GCC driverOdelu Kukatla2016-12-25
| | | | | | | | | | | | | | | | | | Global Clock Controller(GCC) needs to vote for volatge level on rail for the clock frequencies, so add voltage voting in GCC. Also clean up clock flags and parent info for few clocks. Change-Id: Ib4cc69afb32a7654bbdd98f2efff901729c4d3da Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
* | clk: qcom: Add smd-rpm voter & voter branch clocks for MSM8996Amit Nischal2016-12-26
|/ | | | | | | | | | | MSM8996 requires the voter & voter branch clocks to be available for clients to be able to enable/disable and set rate on these clocks. Also add support for keeping active set vote on mmssnoc and pnoc voter clocks. Change-Id: Ie596ddee60aac3e6fc996f9a3e8dc988b0f4aa88 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* clk: qcom: Support CPU clock for OSM for common clock frameworkTaniya Das2016-12-22
| | | | | | | | | | | | Following list of changes have been made - Update the clock osm to register to common clock framework - Update clock ops as per common clock framework - cleanup unused function (clk_osm_setup_osm_was) - Fix tabs for macro definitions - Add clocks ids for power and perf clock for clients Change-Id: I389cc9e93a26a434be752cf74444d6c0985ff36d Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add new voter clocks for camss clocksTaniya Das2016-12-20
| | | | | | | | | Add new voter clocks of camss_jpeg0 clocks which are required by camera client. Update the clock indexes for multimedia clocks for the same. Also update the clock ops for hardware control branch clocks. Change-Id: I4bc6608789b8b900e0af007d2ca24ba19f675cb7 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* Merge "clk: msm: clock-gpu-8998: Program the Droop Detector gfx_pdn"Linux Build Service Account2016-12-19
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| * clk: msm: clock-gpu-8998: Program the Droop Detector gfx_pdnDeepak Katragadda2016-12-12
| | | | | | | | | | | | | | | | In order to avoid leakage between the graphics and the CX rails, set the GPU_DD_WRAP_CTRL__GFX_PDN bit. Change-Id: I7b2e59606e73c467c2b862f0162a176611d7ae3d Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | clk: qcom: add common clock framework support for MDSS PLLSandeep Panda2016-12-16
|/ | | | | | | | | Model and configure MDSS DSI PLL using upstream clock framework APIs. Add changes to define and register vco, divider, mux clcoks as per common clock infrastructure. Change-Id: Idc51070e2bb36d1a757d2714d2875a99901321a7 Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
* include: clock: remove ifdef from header fileMeng Wang2016-12-07
| | | | | | | | | | As audio-ext-clk.h is finally included in device tree and and using ifdef results in compilation failure. Delete ifdef from audio-ext-clk.h. CRs-Fixed: 1090500 Change-Id: Ib6f715c3f606770e7e0b1f0f84ab50e442398cd0 Signed-off-by: Meng Wang <mwang@codeaurora.org>
* Merge "include: clock: Add audio external clock of_index extries"Linux Build Service Account2016-11-25
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| * include: clock: Add audio external clock of_index extriesMeng Wang2016-11-16
| | | | | | | | | | | | | | | | Add clock of_idx entries for audio external clock registered to the qcom clock framework. Change-Id: Ie592d06d2e09c2e263a2e9485a42eafb368e49cc Signed-off-by: Meng Wang <mwang@codeaurora.org>
* | Merge "clk: qcom: Add support for MMCC clock for MSMFalcon"Linux Build Service Account2016-11-24
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| * | clk: qcom: Add support for MMCC clock for MSMFalconTaniya Das2016-11-21
| |/ | | | | | | | | | | | | | | | | Add support for the multimedia clock controller found on MSMFalcon based devices. This should allow most clocks for multimedia peripherals which includes display, video, camera etc. Change-Id: If8aa0b094af5ff82fe66c95e3ef2f13632950d2e Signed-off-by: Taniya Das <tdas@codeaurora.org>
* / msm: 8998: Replace cobalt with 8998Runmin Wang2016-11-22
|/ | | | | | | | | | | Update the code name from msmcobalt to msm8998. As a result, update the filename containing "cobalt" and files content containing "cobalt". CRs-Fixed: 1070840 Change-Id: I2c7b95e3e2a2fec7730724da9eeb86a39a77faf1 Signed-off-by: Runmin Wang <runminw@codeaurora.org> Signed-off-by: Kyle Yan <kyan@codeaurora.org> Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
* clk: msm: clock: Remove controlling some graphics clocks in LinuxDeepak Katragadda2016-10-20
| | | | | | | | | | The gcc_gpu_bimc_gfx_src_clk and gcc_gpu_snoc_dvm_gfx_clk need to left at their default state of ON. Remove controlling them from the linux clock driver to avoid disabling them during late_init. Change-Id: If3d964840362b6147ba7c9e26c4a3f5d20e5a557 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* Merge "clk: msm: mdss: fix DSI PLL post vco divider configuration"Linux Build Service Account2016-10-17
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| * clk: msm: mdss: fix DSI PLL post vco divider configurationAravind Venkateswaran2016-10-12
| | | | | | | | | | | | | | | | | | | | | | | | | | The post vco divider clock in the DSI PLL can only be configured to a fixed value of 1 or 4. Current implementation can result in the divider being set to any value between 1 and 4 which can result in failures while enabling the DSI pixel clock. Fix this by replacing the post vco divider with a fixed /1 and /4 dividers followed by a mux clock. CRs-Fixed: 1064277 Change-Id: I01bc7304e446c622849c678c64a3fd6881413e89 Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
* | clk: qcom: Add support for the turing vote clocksTaniya Das2016-10-13
|/ | | | | | | | The turing hlos1 and hlos2 vote clocks is required to be enabled before accessing the turing SMMUs, so add support for the same. Change-Id: I9e4b0d7cc5f164b207a1a0e2c1ae24bdfd8fa063 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* Merge "ARM: dts: msm: Add and update the dummy clocks for MSMfalcon/MSMtriton"Linux Build Service Account2016-10-07
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| * ARM: dts: msm: Add and update the dummy clocks for MSMfalcon/MSMtritonAmit Nischal2016-10-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For MSMfalcon and MSMtriton, clock consumers requires dummy rpmcc, gcc, mmss and gfx clocks for their operation so add the support for registering dummy clocks as follows: - Add clock-output-names property for the rpmcc, gcc, mmss and gfx clock controller nodes. - Add reset-cells property for clock controller nodes. - Add two fixed clock nodes named as xo_board and sleep_clk. - Remove RPM clock IDs from qcom,gcc-msmfalcon.h. - Modify RPM clock names as per qcom,rpmcc.h file. Change-Id: I06262fe271ab6ba81d4fa5f67315fd1b54edee8c Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | clk: qcom: Add support for GPU clocks for MSMFalconTaniya Das2016-10-07
|/ | | | | | | | | Add support for the graphics clock controller found on MSMFalcon based devices. This should allow graphics clocks for GFX clients to be able to do clock functionality. Change-Id: I753b40d574a4afc2104a5c2bfe64b4831fbce8a0 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* Merge "clk: qcom: Add support to register rpm-smd clocks"Linux Build Service Account2016-09-30
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| * clk: qcom: Add support to register rpm-smd clocksAmit Nischal2016-09-29
| | | | | | | | | | | | | | | | | | Update the rpm-smd communication API to send across votes for clock enable/disable to RPM. Use the clk_hw list for the RPM clocks and also update the clock ids and clock names for RPM clocks. Change-Id: I37ae97f22b1b39d040bb78c90b1ff231bc348fe6 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | clk: qcom: Add support for GCC clock for MSMFalconTaniya Das2016-09-29
|/ | | | | | | | | Add support for the global clock controller found on MSMFalcon based devices. This should allow most clocks for peripherals other than multimedia clocks. Change-Id: I1ec6309f32c658177580cc0601083d32bcdfad20 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* Merge "clk: qcom: Clean up the MSM8996 Global Clock Control (GCC) driver"Linux Build Service Account2016-09-13
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| * clk: qcom: Clean up the MSM8996 Global Clock Control (GCC) driverOdelu Kukatla2016-09-11
| | | | | | | | | | | | | | | | Remove the RPM controlled clocks and add missing clocks. Also clean up clock flags and parent info for few clocks. Change-Id: I7ae55f992be29a28617070ca7792f912592c3628 Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
* | Merge "clk: msm: gcc-cobalt: Add support for gcc_aggre1_ufs_axi_hw_ctl_clk"Linux Build Service Account2016-09-12
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| * clk: msm: gcc-cobalt: Add support for gcc_aggre1_ufs_axi_hw_ctl_clkDevesh Jhunjhunwala2016-08-31
| | | | | | | | | | | | | | | | Add support for controlling the hw_ctl bit of the gcc_aggre1_ufs_axi_clk CBCR. Change-Id: I856f2c76c3149f3704c47e6f8b0019805a1a0cd4 Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
* | Merge "clk: msm: clock-osm: Add measurement support for CPU clocks"Linux Build Service Account2016-09-09
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| * | clk: msm: clock-osm: Add measurement support for CPU clocksDeepak Katragadda2016-09-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to measure the perf and power cluster clocks via the debug mux on MSMCOBALT. CRs-Fixed: 1059153 Change-Id: I1682481dfe22deef300ea9bd1db558ae634c9129 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | Merge "clk: msm: Add support for block reset clocks for msmcobalt"Linux Build Service Account2016-09-02
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