| Commit message (Collapse) | Author | Age |
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This patch adds dsi dynamic clock control support which is
based on reference count. Both dsi clock and mdp clock are
controlled together during screen update except dsi dcs
command which needs to control dsi clock independent of screen
update.
Change-Id: Ibece46ce374c80f4d6d55230efbee8a72b6e0c9e
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
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Since dsi link is a shared resource between pixel stream and
dcs command, it needs a mechanism to protect dsi link to be accessed
exclusively. cmdlist is introduced for this purpose in this patch.
Change-Id: Ibfcab875c471c16e509cbf39c64c02f9423a6766
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
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current implemtation only supports 8 bits of dcs length.
This patch adds support of 16 bits dcs length as specified
at dcs standard. Therefore all dcs related tx/rx functions
are needed be updated. In addition, all dsi panel dtsi files
are need to be updated too since it contains dcs header.
Change-Id: Icc72a5076e1b181a9bdeb2479e877022c4dc9b22
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
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Add support to vote for regulators during probe if
continuous splash screen feature is enabled.
Change-Id: Ic2981b62b2c389b71a2bc2b938f609dcc80857ff
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
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Maintain state of DSI panel, and avoid performing some operations
depending on the current state.
Change-Id: Id8c2cc30e5058dea7585cc9d06b2ab11368bc337
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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clk_set_rate is called with the incorrect rates causing
clock warnings during bootup.
Change-Id: Ica2fb94c2ec9b006dedcec1a64920bda2f8719bc
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
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SMP allocations are not shadowed at vsync, this can mean that any
changes in SMP allocation may cause unexpected behavior such as tearing
in screen. In order to avoid this, reserve enough SMP blocks for the
worst possible configuration expected for UI layers.
Change-Id: I7d50b73e91391d3729907e7353d1d3c8167c5c5d
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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Notify the assertive display of new input data as soon as new backlight
data is available. Do not require ambient light or display update to
trigger backlight read.
Change-Id: I58b0495e0becf92e718561e56f6cbd4e8c0dc6a3
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
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Keep MDP pipes open when blanking the panel, this allows panel to be
blanked and hardware to be shutdown while keeping the state so same
image is displayed when MDP is turned on again.
Change-Id: I582e5df07d3f7e8fe7b7f740b6b2e4f70a3e9d9c
CRs-Fixed: 475598
Signed-off-by: Shalabh Jain <shalabhj@codeaurora.org>
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Add support for VESA formats at pixel frequencies
of 65MHz and 108MHz. These pixel frequencies are
required to support VESA(DVI) video formats, in
particular, add support for 1024x768p and 1280x1024p
video formats. These formats are supported on many
existing monitors.
CRs-Fixed: 438028
Change-Id: Ibe55648f32fface8ab310a431e9fb670085a86f7
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
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Some contents are secure and cannot be displayed on non
secure displays. For example, wireless display can be
non secure and should not display some specific data.
Add a check to ensure protected data does not go to
unsecure wireless display and remains only on primary panel.
Change-Id: If83e21ed66833e648d5d7fad812da56eb5b259c1
CRs-Fixed: 477822
Signed-off-by: Shalabh Jain <shalabhj@codeaurora.org>
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Adds overlay ioctl calls support to 8x10 MDP driver using
DMA pipeline.
Change-Id: I24e2a19cee3125ef4b1295138e03208b05037067
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
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Fix the race condition when user vsync control thread turns on/off
the vsync interrupt, while frame thread updates at the same time.
Change-Id: I4e9f6df2a58702a5b2db62a7fd989e51503825aa
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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Need to assign ctl that is consistent with the type of mixer
allocated. Specifically for writeback mixers so that it can be
separated from interface ctls.
Change-Id: I7ae7316685286eab6202b91d8347bfd128b0a0b3
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
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Support limited range DTV output by configuring IGC values to limit output
range to 16-235.
Change-Id: I6ce59b5aa6cd859f6c3a526549fc5b05021ec8be
Signed-off-by: Mukesh Jha <cmjha@codeaurora.org>
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
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Fix incorrect use of dspp number instead of display number for post
processing setting arrays. Fix resume method from overwriting existing
dirty flags for each display.
Change-Id: I00212a7309784a7886823f7b5ce6bcb5b94205c1
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
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MHL Tx chipset is set to low power during chip
initialization. In open-drain mode, mhl tx releases
the upstream HPD line. Set ID and data lines by
default in USB mode during initial power state.
Delay setting the chipset into low power mode until
MHL HPD STAT interrupt has occurred, this is the true
reflection of hpd state. This change also sets the hardware
to mirror cbus hpd state in driver.
Change-Id: I65e0b4c1a3e6a4eadd20cbc46c5209d748aacd13
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
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Inputs to the ioctl handler need to be validated and sanitized
to avoid null pointer dereferences
CRs-fixed: 482603
Change-Id: Id652da6ec943b660842141e66e228e14219a599d
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
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Since hpd off and hpd interrupt work are always in different contexts,
in a very strict timing window it is possible that hpd off is scheduled the
middle of hpd interrupt work. If this happens, when hpd interrupt work
resumes after hpd off is serviced, un-clocked register access may lead
to unknown outcome. Counter this situation by flushing the hpd interrupt
work, if any, before calling hpd off.
Change-Id: I669db5d4b8cbdd20fa24e03f0a8a0f3f2a029ee0
CRs-Fixed: 482357
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
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If pan_display is not used, the frame buffer memory is not reserved
and allocated. Adding checks to make sure no memory operations on
framebuffer.
Change-Id: Ia837d4ea0cad4e40e52ee5817c8d58e7db852a97
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
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Move fb memory allocation from mdp level up to mdss_fb based on the
device tree reserve size and then map the buffer depending on iommu,
so the code can be reused by multiple targets which have iommu mapping.
Change-Id: Ie57a097e047d26d69a92c05ddd0da22dfa6eca57
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
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MHL Tx chipset should be set to low power
when switching to D3 mode. Set the appropriate
register in PAGE1 of 8334 to put the chip in
low power mode. In open-drain mode, mhl tx
releases the upstream HPD line which can trigger
unnecessary interrupts in HDMI Tx. Disable HPD
in D3 mode and enable it back on RGND interrupt.
Change-Id: Ibe3e699a5f1ae0c0cfc2d196eb7fd5b8e2ef60b5
CRs-Fixed: 459094
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
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Any register access within MDP domain requires mdss ahb and mdp core
clocks to be enabled. In the use-case where HDMI is the only sub-module
enabled and its interrupt is triggered, lack of mdp core clock leads to
un-clocked access to MDSS interrupt register. Which in turn leads to
ahb bus timeout and device crash or reboot. Fix this by controlling mdp
core clock from HDMI driver.
Change-Id: I8479cf0905b41d085b912ddb6c4a9d83bc430ee8
CRs-Fixed: 482432
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
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Simplify multiple vsync handlers logic by removing ref counters on
handler structure and manage the same with the ref counter for irq
enable/disable. At the same time ensure that the vsync lock is not being
held while calling vsync enable/disable to avoid potential deadlock.
Change-Id: Id79c67f21a5b2d224b2e6b1d3e0b6aa553c44945
CRs-Fixed: 482320
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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PCMN filter should be use for downscaling of all components. Using
different filter leads to MDP hang on command mode panels.
Change-Id: I29908b64a285c67c7d9caa50be2de3e492c8da80
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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There are cases in which panel on can fail for any reason, such as
unable to properly get and lock on to hardware resources. For such cases
the error needs to be properly propagated so that the state of MDP can
be reset and user space application can invoke some recovery mechanism.
Change-Id: I0da17038e11e6b972740dd6362c1a75bd2bd2b28
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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The temporary framebuffer holding the splash screen is
freed before timing generator is turned off.
This fixes the white screen flash seen while transitioning
between the splash image and kernel frame update.
Change-Id: I23ab9ce5d8e4f22df2a39f447ce406da6ed248b8
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
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Add continuous splash screen support for each interface i.e.
command mode and video mode.
Command mode panel do not need to keep a copy of the splash screen
once the update has been sent to the panel.
Change-Id: I75c6268fde0fcbea225a3cebe0e6ce1085130c85
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
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The list size was limited to only 255 DSI commands. But for certain
panels, it requires more DSI commands for panel initialization sequence.
Change-Id: I281701d5243c4d37c64de234ff502fa681ee9071
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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Add information about events that can be handled by panel drivers.
Change-Id: I860523df896652a69f286a3a42fbbc66f0dabe11
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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FB blank notification is not needed because the event is already
being generated in core fb driver. This change avoids sending the
same notification twice.
Change-Id: I8c05424e6675d35958cfeedfb4428812728a8399
CRs-Fixed: 482340
Signed-off-by: Shalabh Jain <shalabhj@codeaurora.org>
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Currently bus bandwidth update is skipped if new bandwidth request is
within 64M boundary of current request. While enforcing this rule, new
request is changed to 64M aligned and then compared. This results in
higher bandwidth request then necessary which may lead system to higher
clock rate. Fix this by removing 64M alignment to new bandwidth request.
CRs-Fixed: 479711
Change-Id: Ib25afa00b6e9276146ca78a4ce9cbdf3a84288c4
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
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If a new pipe comes in with mixer stage that is already taken, the pipe
that is currently holding that mixer stage should first be unstaged.
This ensures that only the pipe taking its place can be placed at that
mixer stage, and avoid situations where error in programming may lead to
previous pipe still being staged with incorrect parameters.
CRs-Fixed: 481364
Change-Id: Ie6d3471c610833a9546e52bc5f3816ddb5cb4101
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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cropping on the pipe shouldn't happen for Bandwidth compression.
Also, interlaced formats should have w,h as multiple of 4 to
avoid odd sizes after division.
Change-Id: I688898e9917bcea0b193c78ed3ccd0f7e5b6acfd
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
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Need to avert deadlock issues in failure cases.
Change-Id: I373951acea7dc950bb560c64475866ebad245034
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
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Whenever the primary panel on the device is turned
off, we need to power down the DSI phy in addition to
voting off all the regulators used by the DSI controller.
This avoids the current leakage in low power mode.
Change-Id: Ic53a3a23c957290e66b43cac40aaaaa198719e9d
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
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There are cases in which if underrun happens continously it may print
many messages at once leading to watchdog bark. Change the message to
debug message to avoid this and still allow option be enabled with
dynamic debug messages. The underrun counter is also available through
debugfs.
Change-Id: I81f49363031b26c2b13f8c68ba82c45275d523b0
CRs-Fixed: 481077
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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When system becomes slow, there are cases where vsync interrupt
completions can be delayed. To keep display operational when these
situations occur, have a backup solution where display will poll the
status of vsync directly from MDP with some intervals to continue
display until interrupts are resumed.
Change-Id: I1ca6b68f2a7ba6aa1f137a24bd591e05b5d425dc
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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Reload assertive display (AD) initialization, configuration, and input
data, when the post processing feature is resumed. Currently only
maintaining state of AD.
Change-Id: I66741626c5540942058a49e1f6dea8e1a4d9daa9
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
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Assertive display calculations should be done every vsync to ensure
that the strength and backlight values are up to date. DSI command mode
panels are not supported currently.
Change-Id: If615ed1b48a496f39bf6780ea936d9bc31275415
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
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Allow for multiple vsync handlers to be registered dynamically. Allows for
per handler reference counts in case of multiple drivers being dependent on
a single handler.
Change-Id: I92b25f2974d6c9978cfa1abdd27d8c951c5ad52d
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
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Removes the possible case of delaying display_commit completion. AD_input
ioctl returns with last strength/backlight values calculated to aid in
management of AD feature from userspace.
Change-Id: I4c9a2941deece8f406b19b6b206c9fadf4f7250a
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
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Provides starting control logic and register access for initialization,
configuration, and input to assertive display (AD) feature. AD allows for
several modes of operation that can be used to increase display visibility
under various viewing conditions.
Change-Id: I5db510e36c6b9394626e8efe8160d792c8bdda01
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
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Fix typo while continuous splash dt parsing.
Change-Id: I7c4d4d874a1e2580fb05f42b0fcb1ba3d0b0d9be
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
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Error is reported even when mdss_register_irq is successful.
Fix check to report error case.
Change-Id: I09ce1d9d70016cc2bfdb237877112a053c6fa8c1
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
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Currently GPIOs required for DDC transaction are requested when hpd
circuitry is turned on. But these GPIOs are needed only for EDID fetch
and HDCP authentication which can happen only when cable presence has
been confirmed. Create new DDC power module in order request these
GPIOs only when cable presence is confirmed. This change enables
alternate use of these GPIOs in non-hdmi debug use-cases.
CRs-Fixed: 478955
Change-Id: I67229d88eb92e39bc82fca0397fa9e13ad51c87b
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
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To achieve 60 fps when TE enabled, dsi link needs to be able
to support around 70 fps so that there is some margin to
compensate for kickoff overhead. In addition to that, TE logic
need to avoid mdp throttling as much as possible. This patch
re-work TE logic base on the fact that write speed is faster
than read speed to avoid mdp throttling.
CRs-fixed: 476441
Change-Id: Ib56228f83c833cb0999c32be05c057370ed24ad0
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
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Interface number is not properly reset when control path is changed
between writeback and interface. This gives incorrect information in
debug statistics.
Change-Id: I7816548791a9ed6058cbf0b3fd5484ed025c74f6
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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Check if pipe was staged in the mixer it's being unstaged from, before
actually unstaging and updating mixer configuration. Also, if the pipe
is being unstaged due to problems in configuration it needs to remain
unstaged in subsequent calls by clearing params_changed flag.
Change-Id: I4144a9f9d148241b83535e07ca55cdc0c9fcc4e5
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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Dsi irq is enabled at beginning of transaction and disabled at
end of transaction. There is no need to enable dsi irq at
initialization time.
Change-Id: Ie4ffbbae6e3d8234714a51555ec95ce3678862cc
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
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