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* | msm: mdss: cleanup unused pipes during kickoffSree Sesha Aravind Vadrevu2016-03-23
| | | | | | | | | | | | | | | | | | | | If the pipe params haven't changed during kickoff it needs to be unstaged and cleanedup to avoid crashes due to lack of hardware resources. CRs-fixed: 491633 Change-Id: I0dfa8d6e2c5f204fc7b1a76b384ec95a59ed6182 Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
* | msm: mdss: Add absolute backlight control for assertive displayCarl Vanderlip2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Allow for assertive display to disable backlight updates (except for updates to turn off display) as an option for automatic backlight mode. If backlight updates are not prevented, flickering can occur when automatic backlight mode is enabled and system tries to update backlight value due to assertive display block controlling backlight values. Change-Id: I250167e3387e3fbc795f7dfe9fc5f20398d6ca8c Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
* | msm: mdss: Toggle notify state with power stateCarl Vanderlip2016-03-23
| | | | | | | | | | | | | | | | Ensure that update notify does not send "UPDATE" notification to userspace when device has entered suspend. Change-Id: I2cd3915e80c913f358b733c262aadeea2ca4325c Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
* | msm: mdss: Update notify returns notify stateCarl Vanderlip2016-03-23
| | | | | | | | | | | | | | | | Change update notify ioctl to return a value describing the state that caused the update. Change-Id: I407c73c7b5c24e36410545175cb8723b4c10971e Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
* | msm: mdss: Update notify on assertive display calculationCarl Vanderlip2016-03-23
| | | | | | | | | | | | | | | | | | When assertive display finishes a calculation it will cause an update to the values on the screen independent of display commits. This maintains the logic of the update notify ioctl. Change-Id: I6a633931db3220b33def17aa1ec1c97207c2c2fd Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
* | msm: mdss: Enable assertive display backlight calibrationCarl Vanderlip2016-03-23
| | | | | | | | | | | | | | Allow for assertive display to set the backlight level in calibration mode. Change-Id: I990c4a191410614bec2d615baaae1a2a34cc48e5 Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
* | msm: mdss: Initial calibration mode implementationCarl Vanderlip2016-03-23
| | | | | | | | | | | | | | Enable calibration mode to be set via framebuffer ioctl. Change-Id: I50e7f652b23180553e1706975e7cbffce68ddf55 Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
* | msm: mdss: remove YUV upscale limitationAdrian Salido-Moreno2016-03-23
| | | | | | | | | | | | | | | | | | Parameters check for YUV upscaling when doing chroma upsampling is not required, hardware is able to support up to 40x up scaling for chroma components so this check is not needed. Change-Id: I700282c4627df5a630def6072b8deba38bb58b41 Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
* | msm: mdss: modify watermark levels when horizontal flip is presentAdrian Salido-Moreno2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | When horizontal flip is present on a particular pipe, one line out of the shared memory pool is reserved for consuming the line in reverse direction. When this happens the consumed line does not account in the watermark threshold and hence the priority levels being programmed would be based on the remaining memory in which buffer contents are being fetched. In order to have proper priority mappings, update the watermark levels to account for this behavior Change-Id: I80cebccf0083b2e9edcf3bf73818fde160ef9c63 Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
* | msm: mdss: correctly retrieve panel framerate for command modeAdrian Salido-Moreno2016-03-23
| | | | | | | | | | | | | | | | Framerate is populated for DSI panels including video mode and command mode. Retrieve this framerate for command mode panel. Change-Id: If005dc9aa8383d2afe5beb1123797460ceba027a Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
* | msm: mdss: detach the SMMU when display goes offXiaoming Zhou2016-03-23
| | | | | | | | | | | | | | | | Detach SMMU when display goes off, and attach it when display goes on. This prevents clocks left on while display goes off. Change-Id: I50d96424bb030af55fa502241009ffc2dc1b1575 Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
* | msm: mdss: Separate fudge factors for bus requestsSree Sesha Aravind Vadrevu2016-03-23
| | | | | | | | | | | | | | | | | | Separately assign ib and qb quota to enable different factor assignments as needed so as to avoid underruns and maintain performance levels. Change-Id: I90fc1a55a536a2a29a377617b9eed8ffcf60fca4 Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
* | msm: mdss: fix the dead lock in the MDP3 irq handlingXiaoming Zhou2016-03-23
| | | | | | | | | | | | | | | | | | A deadlock can occur when an interrupt happens while a user thread holds a spin lock and tries to call irq_disable, which waits until the interrupt is serviced. Change-Id: I350547800c79a4cdb3feb281d9a872248c137d57 Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
* | msm: mdss: Different name for ppp bus on mdp3Terence Hampson2016-03-23
| | | | | | | | | | | | | | | | When looking at bus performance it is useful to differentiate between the different buses used by mdp3. Change-Id: Ibaea8dfd10d98ce559622300789bf8bfdcc4b2fc Signed-off-by: Terence Hampson <thampson@codeaurora.org>
* | msm_fb: mdss: mhl: implement suspend/resumeAbhishek Kharbanda2016-03-23
| | | | | | | | | | | | | | | | | | Implement suspend/resume and enable irq wake in suspend to detect unpowered dongle. CRs-Fixed: 482623 Change-Id: I992654240ff94273c3cbf6ed07d295754cc5380f Signed-off-by: Abhishek Kharbanda <akharban@codeaurora.org>
* | msm: mdss: Enforce interlaced format w,h alignmentSree Sesha Aravind Vadrevu2016-03-23
| | | | | | | | | | | | | | | | | | Interlaced formats need to be aligned to multiples of 4 to mainitain evenness as hardware expects an even source rectangle. Moreover interlace only works on half of the source rectangle. Change-Id: I0eb920be87a9b76c6da18fd19566eb5dd090d737 Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
* | msm: mdss: Increase base fence timeoutNaseer Ahmed2016-03-23
| | | | | | | | | | | | | | | | The earlier value of 1 second caused unnecessary warnings on heavy workloads by the GPU. Change-Id: Ib4a5b098267251d5c63c4d8d2a2f51b339acc1d2 Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
* | msm: mdss: Return src format changes during overlay setSree Sesha Aravind Vadrevu2016-03-23
| | | | | | | | | | | | | | | | Src format changes in overlay due to BWC need to be reflected in userspace to facilitate proper allocation of input buffer. Change-Id: I49a5aee97deb26f14b365a093095c47e6dd00fc5 Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
* | msm: mdss: Reduce assertive display log messagesCarl Vanderlip2016-03-23
| | | | | | | | | | | | | | | | Silence valid cases of assertive display being checked to run on secondary, dual pipe or command mode displays. Change-Id: I7a770ccc4cd69f1296c2d91e3abfb685fd093b5a Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
* | mdss: mdss_fb: remove mmio access through mmapManoj Rao2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Disable access to mm io and add appropriate range checks to ensure valid accesses through framebuffer mmap. This prevents illegal access into memory. Change-Id: Ic6e47ec726d330d48ce9a7a708418492a553543b CRs-Fixed: 474706 Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
* | msm: mdss: cleanup MDP interrupt handling logicXiaoming Zhou2016-03-23
| | | | | | | | | | | | | | Simplify MDP vsync and dma done interrupt handling logic. Change-Id: Ieac19ce4c6efc42c6005b2c0cab97be8a67ad263 Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
* | msm: mdss: cleanup dsi interrupt handling logicXiaoming Zhou2016-03-23
| | | | | | | | | | | | | | | | Use reference counting for DSI interrupt enable/disable, masking out DSI_MDP_DONE interrupt. Change-Id: I83a8136b8bfeeebd2cbb6a8f711b4dd818f49bd2 Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
* | msm: mdss: turn off the DSI PHY when powering down the panelXiaoming Zhou2016-03-23
| | | | | | | | | | | | | | The DSI PHY needs to be powered down to avoid power leakage. Change-Id: Ideb97293444e8ed4b99ddf2c30a1669bb9237c9c Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
* | mdss: ppp: add sync point to ppp, allowing for async ppp blitTerence Hampson2016-03-23
| | | | | | | | | | | | | | | | | | | | | | It is a requirement that PPP be async and should use sync points and fences to wait for buffers and communicate that it is done using release fence Change-Id: I35663737dd4bd4a52bb12b2a31ed06f3d5a69f31 Signed-off-by: Terence Hampson <thampson@codeaurora.org> [cip@codeaurora.org: Updated sync.h/sw_sync.h include] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | msm: mdss: free smp reservations when rotator session is idleAdrian Salido-Moreno2016-03-23
| | | | | | | | | | | | | | | | | | | | Once rotation is done, the SMP allocations are no longer being used and these blocks can be used by another client. This can also reduce the memory being reserved if same pipe is used by multiple rotator sessions. CRs-Fixed: 492113 Change-Id: I60e5c2111b2167395fc0d79ad40b2d0e7ec48086 Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
* | msm: mdss: fix SMP allocation size when using BWCAdrian Salido-Moreno2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | When using Bandwidth Compression, the size for Shared Memory Pool blocks allocation is calculated within helper function mdss_mdp_get_rau_strides and includes the lines to be fetched in RAU, there is no need to again account for these while reserving SMP blocks. Also this function should not include the meta data within RAU, this is only used to decompress the stream from memory but is dropped when storing stream in SMP. CRs-Fixed: 492113 Change-Id: I188736994b9038f74d13dc587d16a7b9445a7fbe Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
* | msm: mdss: Clear assertive display state when disablingCarl Vanderlip2016-03-23
| | | | | | | | | | | | | | | | | | Ensure that assertive display state is reset to known state when disabled. Prevents possible issues arising from previously set values from being applied when not intended. Change-Id: Ia035e2b2530725bde49aaf4dd561aa1d628240c2 Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
* | msm: mdss: Add assertive display backlight linearity LUTCarl Vanderlip2016-03-23
| | | | | | | | | | | | | | Provide assertive display a means of linearizing backlight luminosity. Change-Id: Ie39b087f9d5f5e7367fa786945f16af9738e98a6 Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
* | msm: mdss: Prevent VSYNC enable when assertive display stoppedCarl Vanderlip2016-03-23
| | | | | | | | | | | | | | | | | | Only enable vsync when vsync requested and assertive display is on. Prevent NULL pointer dereference if vsync is called after assertive display is disabled. Change-Id: Ibc3eae66c2dc5869f26c145cb310502507fbfe69 Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
* | msm: mdss: Fix potential race condition in assertive displayCarl Vanderlip2016-03-23
| | | | | | | | | | | | | | | | | | Assertive display can be turned off between releasing ad->lock and aquiring mfd->lock. Store the value of mfd, while under ad->lock to prevent null dereference. Change-Id: I261d112457a7a969e5b2c2f6a8b89b08b6235d3b Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
* | msm: mdss: Limit assertive display BL updates to certain modesCarl Vanderlip2016-03-23
| | | | | | | | | | | | | | | | | | | | Assertive display requires updates when backlight changes only in mode MDSS_AD_MODE_AUTO_STR. When in AUTO_BL mode, the backlight is modulated by the assertive display block and should not be notified when the backlight changes. Change-Id: I6f37b10836047df3ed9bcd801fd10fc549084595 Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
* | msm8974: mhl_sii8334: disable intrs in low-pwrManoj Rao2016-03-23
| | | | | | | | | | | | | | | | | | | | Set appropriate interrupt mask to disable interrupts in low power to prevent possible interrupt triggers in low power mode. Enable interrupts appropriately when chipset is brought out of low power state. Change-Id: I267c41fd953e8afde3f157ee58228f26ee1ac20d Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
* | msm: mdss: reset overlay state when display is offXiaoming Zhou2016-03-23
| | | | | | | | | | | | | | | | | | | | Client might turn off the display directly, without releasing the overlay resource. This is to reset overlay status when display is being turned off. CRs-Fixed: 492706 Change-Id: I428f6d1e2b53c7c1379ac8820ab23d8573ae7f1d Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
* | msm: mdss: enable misr blockSree Sesha Aravind Vadrevu2016-03-23
| | | | | | | | | | | | | | | | | | MISR allows a CRC to be generated from contents of a particular hw block which be used for validation. Enable setup of misr and APIs to obtain CRC from hw blocks. Change-Id: Ic755ab146d8f1223f015346bd0263d054dc0d832 Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
* | mdss: display: wait for ping pong done before update registersKuogee Hsieh2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Ping pong done interrupt indicates previous mdp kickoff has been completed and it is ready for next kickoff. Non-double buffered registers updated can only be executed after ping pong done to avoid unexpected side effects when updating hardware while mdp still active. CRs-fixed: 481408 Change-Id: Ia06ad8dc7663e31132fe066095a3911aecb5d3e4 Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
* | msm: mdss: Add support to calibrate MDP5.x registersMukesh Jha2016-03-23
| | | | | | | | | | | | | | | | | | Add support to read/write MDP registers through ioctl call and verify the data written to the register using fbtest. Change-Id: I6a2358627bb8d0fae7ecbd9251f6f7e78c6a79cc Signed-off-by: Mukesh Jha <cmjha@codeaurora.org>
* | MDSS: Fix resume/suspend issueTanya Finkel2016-03-23
| | | | | | | | | | | | | | | | | | When HDMI display configured to primary and it moves to suspend state cause to gpio_free() that is not allocated yet. Inserted checking of gpio allocation before gpio_free(). Change-Id: I0e01cfd2cc04d3dab1f1a513b30f56705c318201 Signed-off-by: Tanya Finkel <tfinkel@codeaurora.org>
* | msm: mdss: Bound check for the config length used in IGC testMukesh Jha2016-03-23
| | | | | | | | | | | | | | | | | | Include bound check for the config length used in mdss_mdp_igc_lut_config function. CRs-fixed: 489258 Change-Id: Id9fd2ac9e368ad32d44e3bcf48ebbdecfb2c13c4 Signed-off-by: Mukesh Jha <cmjha@codeaurora.org>
* | mdss: Display: Send panel OFF commands for first frame updateChandan Uddaraju2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | For continuous splash screen feature, the DSI panel is turned on in bootloader. Add changes to send panel "off" commands when we get the first frame update. Add PANEL_INIT state and MDP_ACTIVE state as part of the controller state machine. Change-Id: Ifadb21795b98672de94d6994087f5196fa85951a CRs-Fixed: 476922 Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
* | msm: mdss: probe failure error handling for 8x10 displayXiaoming Zhou2016-03-23
| | | | | | | | | | | | | | | | | | Add the proper error handling for the display probe failures. Some drivers will return -EPROBE_DEFER. Return the proper error code in this case. Change-Id: I293c31923069e9ff63619ba212938610f3343299 Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
* | msm: mdss: Do not time out for vsync readsNaseer Ahmed2016-03-23
| | | | | | | | | | | | | | | | | | | | The userspace does a blocking read on the vsync node. However, when the screen is idle the read returns after timeout waking up the userspace thread. Remove the timeout so that the read blocks until the vsync is updated. Change-Id: Ieaa1c180d473256da14302875dfc0558d23123aa Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
* | mdss: dsi: Control MDSS bus clocks from within DSI driverAravind Venkateswaran2016-03-23
| | | | | | | | | | | | | | | | | | | | DSI driver needs to ensure that the MDSS AHB and AXI bus clocks are enabled before accessing any registers or sending DSI commands, to avoid potential unclocked register accesses or DMA timeouts. Change-Id: I69cf48d7f8228e8a15a6335912f712555cb641eb Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
* | mdss: mhl: Fix MHL peer status register handling.Mukesh Jha2016-03-23
| | | | | | | | | | | | | | | | | | Fix handling of MHL peer device status registers for MHL Compliance case 3.1.1.13. Change-Id: I404f44d635ad9d3571d5b54bd9c161846c775838 Signed-off-by: Abhishek Kharbanda <akharban@codeaurora.org> Signed-off-by: Mukesh Jha <cmjha@codeaurora.org>
* | mdss: hdmi: Enable general control packet transmission to support AVMUTEAravind Venkateswaran2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the source and the sink are not in sync with respect to their HDCP cipher and frame counts, it could result in snowframes or similar artifacts being displayed on the HDMI sink. This can be avoided by setting AVMUTE before starting HDCP authentication and clearing AVMUTE after HDCP authentication succeeds. Whenever AVMUTE is set, and if the sink supports AVMUTE, then the HDCP cipher state and the frame count are not advanced until after the first encrypted frame is sent after clearing AVMUTE. This patch implements this functionality by enabling the transsmission of the general control packet which is used to set and clear AVMUTE. CRs-Fixed: 484366 Change-Id: Iaf437611e8b9f7d6cbe94184477f6d72f7af6ad8 Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
* | msm: mdss: Support updates from both the mixers on splitdisplayMukesh Jha2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Support updates in both mixers when running ARGC,PCC test (destination side) on split display.Allow the dualpipe case to update simultaneously on both right and left mixers by using "ctl" structures's pointers to left and right mixers instead of "split ctl" structures. Change-Id: Ic5fb291802af35f08870f2f121c5aff93d0b993e Signed-off-by: Mukesh Jha <cmjha@codeaurora.org>
* | msm: mdss: fix the MDP3 under-run issueXiaoming Zhou2016-03-23
| | | | | | | | | | | | | | | | Increase the MDP DMA burst size to 8 and increase MDP core clock to 100Mhz. Also, change the default under-run color to blue. Change-Id: I9da991910ad1eca940c999456aeb390f642b47cf Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
* | mdss: hdmi: correct timeout valueAjay Singh Parmar2016-03-23
| | | | | | | | | | | | | | | | This change corrects the timeout decrement logic to enter the error handling in case of timeout during HDCP authentication. Change-Id: I2dabed5285768e801af27686abc26e6df19949c8 Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
* | msm: mdss: hdmi: Turn off Q0 bit of the AVI InfoFrame.Abhishek Kharbanda2016-03-23
| | | | | | | | | | | | | | | | Set Q1Q0 bit present in Data Byte 3 of AVI InfoFrame, to default quantization based on transmitted input video format. Change-Id: I410f6806917d52d01db1360c2dc7ace6a05d05b9 Signed-off-by: Abhishek Kharbanda <akharban@codeaurora.org>
* | msmfb: mdss: add mdp3 ppp driverTerence Hampson2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Enable the PPP block in the MDP3.04 on 8x10. PPP stands for Pixel Processing Pipeline. PPP is used for blitting/composing a frame prior to it being displayed. Change-Id: Ifb33ae71c73a24358acc1bf4cf145fc155ac50ad Signed-off-by: Terence Hampson <thampson@codeaurora.org> [cip@codeaurora.org: Moved new file locations] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | mdss: display: replace byte string with struct dsi_panel_cmdKuogee Hsieh2016-03-23
| | | | | | | | | | | | | | | | | | Convert dcs byte string from dtsi file to dcs command list. Also group dcs command list and link state into dsi_panel_cmd struct to keep backward compartibllity. Change-Id: Iff35bd7b0c0e03c2b341e501290b15e1621501d1 Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
generated by cgit v1.2.3 (git 2.25.1) at 2026-02-15 15:47:30 +0000