| Commit message (Collapse) | Author | Age |
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Currently in the MDSS DSI driver, there is no error checking
and return for add, dma_tx and dma_rx functions in cmds_tx
and cmds_rx APIs in case read or write operations fails.
So, added error checks and return messages. Also, enable
irq after dma_add in cmds_rx in correspondence with cmdx_tx api.
Change-Id: I0fc2310ae8476510b3f903382988fec25cc2efdb
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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Dsi operation mode is not configured when DCS panel ON
commands are sent in "HS mode". Move dsi mode configuration
from unblank event to event handler.
Change-Id: I049c467061fdaecce5356de40841a0690b57257d
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
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This change enables pass-through of TMDS signals through
MHL Tx for sinks that have non-standard DCAP INT STAT SIZE
in the devcap bytes. This facilitates MHL display on certain
non-standard MHL sinks.
CRs-Fixed: 504730
Change-Id: Id847cd25642e9eac8d559cc5dd3e1ab1046ebcce
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
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When virtual ctl is allocated during simultaneous wb line and block mode
operation, the virtual ctl num should be the same as original ctl. This
is essential for color space conversion programing.
Change-Id: I1294a8f813e5b534cf10f9d4f721b42ce0bb6141
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
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Set HPD and TMDS pass-through only after receiving
PATH_EN from the sink and reading all device
capability bytes from the sink.
Making MHL wait until the PATH_EN bit has been set by the
sink/dongle is in conformance with the MHL spec.
This change prevents incorrect behavior in usecases
such as meeting timing requirements in test 1A-02 HDCP
compliance test suite, disabling hpd when TV is powered off
with MHL cable connected to the TX.
CRs-Fixed: 504737
CRs-Fixed: 481930
Change-Id: Id2c1fb9d2dbe10b1310958021cca3533790e7394
Signed-off-by: Abhishek Kharbanda <akharban@codeaurora.org>
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
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For DSI branch clocks, set rate should be called
before calling the prepare and enable ops. This is
the recommended order for clock operations and is
required before moving the DSI pll enable sequences
to the prepare op.
Change-Id: I5f53f424a6665e2ce41076734eb6379596fa1d00
CRs-Fixed: 513361
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
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Currently support to handle MDP_Y_CBCR_H2V2_VENUS format is
not present in driver. Adding the same.
Change-Id: I2e5f0f30662777ffb48f875f858d58b94577825e
Signed-off-by: Radhika Ranjan Soni <rrsoni@codeaurora.org>
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Put was called on fence twice, second time with a NULL pointer,
which was causing a crash.
Change-Id: I3f8f0f01a390ee6eeb66612e0b8448d9b9b79013
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
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For every request ppp was toggling on and off bw and clock.
This behavior was not for ideal bw driver and would also increase
the total time to process ppp request. Now ppp request for bw and
keeps it until there has been no additional requests for over
50ms.
Change-Id: I09e27d2ecba5ed7f9af4fef2f3722bfa90967944
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
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Re-read EDID buffer multiple times in case of
checksum error.
Change-Id: I30c9b2245ceb27a7768bf0d9cd9b66c81beff19e
CRs-Fixed: 492053
Signed-off-by: Abhishek Kharbanda <akharban@codeaurora.org>
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Edp aux channel is the communication channel between host and
client (panel). Host reads edid back from panel and issues dpcd
command to panel through aux channel. This patch adds aux channel
support so that edp link training can be done.
CRs-Fixed: 486135
Change-Id: If29dc8257ecc555296c043f2ebcc6dc5cb400d49
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
[cip@codeaurora.org: Moved mdss_edp_aux.c file location]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
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Disable software DDC request before moving to
part3 of HDCP authentication and re-enable it on
before reading EDID. This is done to avoid any
DDC bus arbitration issues while handing over from
software DDC control to hardware DDC control.
Change-Id: Iffde0147e497c1411d867c22c3674b73ceb95bac
CRs-Fixed: 484366
Signed-off-by: Abhishek Kharbanda <akharban@codeaurora.org>
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Poll for HW DDC status to ensure no pending H/W DDC transactions
before disabling HDCP engine. This is required to avoid corruption of
internal state machine of HDCP hardware, which if happens, will lead to
continous Ri's failures in Part 3 Authentication(when h/w DDC transaction
take control again).
Change-Id: Iab01599a40ff75d4021b426c723a759fb3230c81
CRs-Fixed: 484366
Signed-off-by: Abhishek Kharbanda <akharban@codeaurora.org>
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When performing decimation pixels will be skipped, thus there is no
need to allocate from limited shared memory pool to store these.
Change-Id: Icf1b6c0f8111e2e1347e15fd333980e208cce968
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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This adds the continuous splash screen support on
8x10. At the kernel bootup time, display driver
will copy the splash image from the LK to its own
allocated memory, and keep the display on with the
splash image until the first UI update.
Change-Id: I13b2c7fa92d1bbd03fa7bf641d9c54b9ac0a8223
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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This change supports the enter/exit DCM for calibration tool.
It blocks the unblank operation if target is in DCM (Display
Calibration Mode).
Change-Id: If65449b9863bb1f9ca0346d736b6939261d1394e
Signed-off-by: Arpita Banerjee <cabane@codeaurora.org>
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Do not call kick off on open for writeback panels, since at beginning of
writeback there are no output buffers queued
Change-Id: Iaf9b9abd03ff22b13e6e601af12549c5a15957f1
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Saurabh Shah <saurshah@codeaurora.org>
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For cont Splash feature for split display panels,
first controller has to be initialized in probe.
Move the first controller initialization from host init
to controller init function that is called during panel
probe.
Change-Id: Ib964877cd345adfc9f52e7ebe5dc59652a2de44e
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
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Add support to get and set BGRA_8888 and BGRX_8888
as writeback output format using metadata_ioctl.
Change-Id: I093824229d09b89433aaceffe585fb2d3e2b9e10
Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
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The clock work has to be finished in mdp cmd stop function during adb
shell stop or suspend, otherwise, system crashes due to the unreleased
mutex lock in work queue. First, the stop_comp completion is issued
from isr, not from work queue, so that rdptr ticks can be done without
dependency on work queue, then cancel_work_sync is called to guarantee
the clk work is either cancelled or finished, and finally clk off is
called again to make sure clks are shut down.
CRs-fixed: 511249
Change-Id: Iadca3ffce7999e31e2a720a5ad6330f939b4ea98
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
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Set writeback output format using metadata_ioctl before
queuing buffer for write back from mdp. Default output
format is VENUS. Writeback support RGB_565, RGB_888,
ARGB_8888, XRGB_888 and VENUS as output format.
Change-Id: I788b7f54d80a592ac8da07d10f6b292c4650e46c
Signed-off-by: Beeresh Gopal <gbeeresh@codeaurora.org>
Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
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Changes are to support autogenerated panel/mdss dtsi files
and their corresponding format
Signed-off-by: Arpita Banerjee <cabane@codeaurora.org>
Change-Id: Id7d33190f117f29ff5aca0021517020620a7afea
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Reset hardware cursor enable flag while going
to suspend as cursor address doesn't remain
valid after iommu detaching which create
iommu page fault after resume.
Change-Id: I2fd484de72b62f39cdeaee025995afc975b3ba6e
Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
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At boot time when RGB pipe is used as frame buffer base
layer, it is failing in kickoff as pipe's front buffer
has zero planes. Add check for front buffer's number
of plane in kickoff.
Change-Id: I67cefedac3ca272012eb41812caa0bce5cca637e
Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
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MDSS hardware supports BGRX format, add support
of this in software.
Change-Id: Idd474afa6e05c3bb4832fd20ed68925ebf024b9e
Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
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Shared memory pool calculations should be based on the width of the
surface when calculating the stride of second plane. This may lead to
unexpected SMP allocations leading to underflow or waste of SMP blocks.
Change-Id: I4eb998cff4f05273b7aa0111c917fa151b71b140
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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Return successful when the ioctl MSMFB_OVERLAY_PLAY_ENABLE
is successful.
CRs-Fixed: 492570
Change-Id: Id279be87ed2ccb519109b0dd491511af007c3841
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
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When device is restarted it is necessary to power down display panel
in order to avoid any residue gliches for the next session. And in order
to power down display devices, respective drivers need to support
shutdown sequence. Implement driver shutdown for fb and mdp devices.
CRs-Fixed: 504751
Change-Id: I80acbdbb8eb9bb4999617698f7314fd8482f4403
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
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The default split ratio is 50 percent if buffer resolution width is
greater than the max width that mixer can support. This even split may
not be desired for optimal smp allocation or other usecases.
CRs-fixed: 491728
Change-Id: I8ff3f7c1bd79daf1da9ebded0c561cf96db08b73
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
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When continuous splash screen is enabled, DSI branch clocks
are never turned off in the bootloader and are handed off
during kernel bootup. When the DSI controller is probed, it
needs to vote for keeping these clocks enabled. However,
calling set rate may result in a screen blink. Remove the
set rate call to fix this issue.
CRs-Fixed: 506037
Change-Id: I46074ff93456899de6b0e36a185d00d16f5f762e
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
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Due to the scaling factor not being accurate enough the pixel
repetition logic for yuv content did not match the scaling logic.
With a more accurate scaling factor we are avoiding problematic
cases with scaling yuv content.
Change-Id: I0b5cb67cff731d02a14c20f658d168f57b350d49
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
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This code should have never been there in the first place.
Change-Id: Ifde6a3d0c2aa15399a36b49d72e37981385aba4b
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
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Calculation for bg address offset when there is a rotation or flip
has been corrected.
Change-Id: I74ad7f7ffc882d1f35b28445d9e1aeb634c67154
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
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For the command mode panel, the look up table can be updated
when there is a pending DMA transaction. This can cause
both quality and dma hang. The look up table change is
delayed until the next frame update for the command mode
panel.
Change-Id: If50404275e86df0c1ec7700fcdbc8d350f618e42
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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Add the support for changing hue, saturation, intensity
and contrast values on 8x10.
Change-Id: I2c930009804d94476ab26ebc640d4d868454968a
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
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Remove usage of the global context variable in the MHL functions by
adding an additional parameter to the callback function signature.
This will allow the driver to eventually support multiple instances.
Change-Id: I9e01838f6c0d51b5cd210e46d151b2ed9179d087
Signed-off-by: Jack Pham <jackp@codeaurora.org>
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SMP allocation should be independent of changing pipe parameters.
Always allocate SMP's during pipe programming. This avoids fetch
failures when overlay set is not repeatedly called during a rotator
session.
Change-Id: I682585986f37477f1d88d8f3462eee81143b181e
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
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This change allows audio driver to change the audio configuration
dynamically without bother HDCP link and video configurations.
Change-Id: I34af3a9070d29a3ea3ebad7196ca24765fcf6152
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
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Changes are to add support for specifying the enable
and disable load for vregs
Change-Id: I0943237370af1cf6757a8b3617d2b192098f6b7d
Signed-off-by: Arpita Banerjee <cabane@codeaurora.org>
[cip@codeaurora.org: Replace regulator_set_optimum_mode
with regulator_set_load]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
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The recovery mode is using the frame buffer memory
and pan display to render. To support this, we
need to allocate frame buffer.
Change-Id: I3c2d9b849abfa5420860f9d6ba89df355efb4061
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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MDP DSI clock is coming from the DSI PLL. During the shut
down process, the DSI PLL was powered off first before turning
off the MDP DSI clock. This results in the mdp_dsi_clk stuck
on message. The shutdown sequence is changed to: turn off
the panel, turn off the MDP clocks, turn off the DMA engine,
and turn off the dsi controller, including the DSI clocks.
Change-Id: Ib9b47c693188784e7f59d209d868b665ff0beef8
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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Add code to support DCS read command during blanking when
pixel transmission is enabled. Check for broadcast mode
bit to enable DCS read for split display panels.
CRs-Fixed: 486501
Change-Id: I38d08060ce84fc0fb89777303ee9274a3a8a43e2
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
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DSI PHY supports two regulator modes: LDO and DCDC.
While DCDC offers power efficiency, it requires an
external inductor which adds to the BOM cost. On
8x10, it is required to use LDO mode to save the
extra cost.
Change-Id: I667ee00b78c916bcdd5096a1b72dce863ec0880c
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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With new targets, number of interface layer mixers have increased.
This increases existing macro values. Even though writeback mixers
have not changed, their programming needs to be adjusted.
Change-Id: I71bb6e6988d4e2bf2f66e0ecbb7ff9672d21b8dc
Signed-off-by: Shalabh Jain <shalabhj@codeaurora.org>
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During initial development a mistake was made thinking only one
thread could be in workqueue handler, which was incorrect,
so ppp would process request that had already been processed. This
would result in an IOMMU page fault in some corner case.
Change-Id: I2f2484cee5d069e171ff9edec7adc6aeb35ac2b6
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
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Given two line latency buffer requirement for performance, in
some cases, three or more SMP blocks get reserved. This happens
typically for the usecases involving higher resolution layers
(e.g. 1080P). For these usecases required number of SMP blocks
exceed total number of SMP blocks available, thus causing SMP
reservation failures. These failures are often encountered in
8x26 target as it has in total, only seven SMP blocks available.
Restrict SMP buffer reservation to two SMP blocks, based on an
optionable device tree property, to be able to support most of
the usecases. This restriction is not applicable to horizontal
flip cases where two line latency buffer reservation is
necessary.
Change-Id: I7d57568b4b2710df0142bbc16749e56a9b492dfe
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
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Expand current SMP bitmap implementation to allocate 44 MMBs of
APQ8084 MDSS.
Change-Id: Ib36331258646cedc1cca5285dc2c6490617f449f
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
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Add code to support cont_splash_screen feature for
higher versions of MDP.
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Change-Id: I2ab2ed3e917f27a8274635c3a58ea73ecb16b0d7
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Enable the irq when the display is on, and disable it
when the display is off.
Change-Id: Ib164537dd5175cdf5a1779a62c4861bda2647e35
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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This change allows to process read/write operation through
buffer instead of single IOCTL call. It is part of
optimization to save DIAG packet processing time.
Change-Id: Iffaab2dd160959f8c7950ebca043b1e0cf25877c
Signed-off-by: Arpita Banerjee <cabane@codeaurora.org>
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