| Commit message (Collapse) | Author | Age |
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Modify the check cases in mdss_fb_set_backlight to allow backlight
updates when device is in display calibration mode.
Change-Id: I9fb01f133cc91c2e5e1553e467d5f7ee31086b9d
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
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Earlier, display driver was allocating the memory for
splash screen feature. The splash image was copied
to the allocated memory during LK to kernel transition.
Now, instead of allocating and copying, display driver
reserves the splash screen memory until the first display
update.
Change-Id: Ie5f0aa17dceaa826eddab1e5b4b705a3ea287a1a
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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For split display, the clock disable calls for DSI clocks
for both the controllers should happen before
calling clock unprepare APIs. Implement this sequence
when broadcast mode is enabled.
Change-Id: Ifb7436bc88e9b5c71623775815052c15dcc42844
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
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Since dcs command is transmitted at BLLP by dsi controller for
video mode panel, dcs commands need to be queued to hardware
during video active period so that they can be transmitted at
next BLLP.
CRs-fixed: 525685
Change-Id: I90a28b7178bd21fd4c71903937809154380227e7
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
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Board platform configurations using apq8084 needs a separate back-light
enable gpio compared to msm8974 where same functionality is piggybacked on
LCD enable gpio. Add support for this back-light enable gpio.
Change-Id: I22f0ab747cb165bbac2055a75fc8ffcc84c79fd2
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
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This change cleans up the HDMI VCO/PLL implementation. It implements
the HDMI VCO clock and uses generic div and mux clocks to align to
the HDMI PLL architecture.
CRs-Fixed: 456315
Change-Id: I19ef344aafc954935cd6d236f3725bf168658ec9
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
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Remove the mapping to the original continuous splash frame buffer
once its contents have been copied. This avoids a virtual address
leak, and holding a mapping to memory that may be eventually
reclaimed for use by other subsystem.
Change-Id: I8d7b6d954809a74d5a1ae60491e295b95458a2b7
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
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Currently if buffers are provided to writeback driver through user space
ioctl, these are never unmapped and may cause leaks in memory. Also, we
can reuse the nodes which are already mapped until session is
terminated.
Change-Id: Ic786dfa735af529998bfc9467ac872b2badc0e31
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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MDSS driver throws warning in case requested blend operation does
not match with layer properties but it internally handles such
cases with proper blend configuration.
Silent the warning as it results in excessive logging.
Change-Id: Ia37a16d55dde4a4532972c0bb5dc6e7ecf35eb07
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
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The variable rotator_mode of mixer structure is used to
program writeback mixer in block mode. This structure
member must be cleared on finish.
Change-Id: I09b938def0cf1745f18e20d3bb04555209d1f269
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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Layer mixer configuration of RGB3 & ViG3 pipes of 8084 MDSS is different
than 0-2 pipes. Current implementation works only if layer passing through
these pipes is base layer. Fix this by implementing correct mixer config
for other blending stages.
Change-Id: I2410b3e601080a52706195a2507e78da457dc87a
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
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At command mode panel, mdp related clocks are turned on/off
frequently to save power. It will be turned off after 4
vsync time if no kickoff happen.
MDSS_EVENT_DSI_CMDLIST_KOFF event will try to acquire lock
of dsi controller and it may take some times to complete it.
Therefore mdp clocks have to be turned on after acquire lock
of dsi controller instead of before.
Change-Id: Ied3de9f96fabbc06b43cad23ac54659c785012d3
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
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These properties need to be optional and used only when having an embedded
DP monitor, i.e. eDP.
When using the eDP driver with external DP monitor there is no need to
configure the fields for the external backlight since it is done by the
monitor itself.
Change-Id: I914a8c75acb406a900e9abd896253606c32e3601
Signed-off-by: Asaf Penso <apenso@codeaurora.org>
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Enable te gpio only for command mode panel and for other panel types
don't enable it to avoid excess current draw.
Change-Id: I7bbdd5984c719fbed8b24494666543a66de5a4d4
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
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When decimation is used, the chroma components are not down sampled in
order to prevent quality loss. This means that we need to consider this
extra pixels that are being fetched from memory for buffer latency (SMPs)
and bus bandwidth.
Change-Id: I9f05e4ece9240b787a8e2b3b3f69eec86d68b2b3
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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Set mdss_res to NULL after mdss_mdp_pp_term function in err
case inside mdss_mdp_probe function. This change can avoid
null pointer dereference if err occurs during mdss_mdp_probe.
Change-Id: I90b289e03f2711d45dcb80d9fa6eeb78b447cfd4
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
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S/W deinterlaces interleaved videos by changing the original height to
the half. Y offset needs to be half as well and this half y should be
checked again to make sure it is not an odd value, which is required
by mdp h/w.
CRs-fixed: 524678
Change-Id: I429dd6e66a8c034815ab3751c31e7e60c25a8051
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
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Slower CNOC clock rates cause histogram and hist LUT access to take
longer time. Fix CNOC clock configuration at optimum rate in order
to avoid slow accesses to histogram and hist LUT.
Change-Id: I066bae9fd0b4261b71248cffea65d8949ff6aae2
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
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The condition check for dsi command mode and video mode
was not proper, which results mis-detection of command mode.
Change-Id: I77940397e61602fd34f2245ba8dc284886fd9192
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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The original dma stop poll time out was set to 16ms. The time
out value was on the boundary of per frame time for 60fps panel.
This will cause unintended time out for large panels: e.g. 720p.
Change-Id: I884aadbbfb0b8211ca408249f3dc33b50620cd86
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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Copy buffer data from userspace and access only the
pointer to buffer in kernel memory. Copy back this data
back to user space memory once the operation is completed.
This prevents accessing user space virtual address from
driver.
Change-Id: I319bf08055cdf914803c4a35c5a607f92017d9a0
CRs-Fixed: 520129
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
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Change post-processing code to use device tree offsets when reading from
and writing to post-processing registers. The device tree defines the bases
of hardware blocks, and previously these bases were hardcoded. Now they are
parsed dynamically from the DT so that the post-processing code is scalable
for different targets
Change-Id: Ic503889459f7793ea68af4128d2d0955e6f6bef2
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
Signed-off-by: Benet Clark <benetc@codeaurora.org>
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Frame buffer was used by the recovery mode. Now,
recovery mode has been updated to use the display
overlay API for display updating, thus making
frame buffer allocation redundant.
CRs-fixed: 515447
Change-Id: I4d624d2d83c6f4815efde97250d02c8b8b7d0666
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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Both edp main link clock and pixel clock are source from PLL.
This patch add edp clock nodes into system clock tree so that
both main link clock and pixel clock are configured properly
to support different panels with different resolution. Edp
related clocks handoff from bootloader are supported.
Change-Id: I6e4096beb9bff0d39f4f850bbc6d2157ac42e524
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
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First AD update is not updating with current backlight value. Initialize
last_bl variable so that first request updates backlight along with user
specified input.
Change-Id: I453e5448229dbddb6204c0a654c267e1540c59a3
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
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Debugfs allow user to read/write hardware registers.
This is to enable debugfs support for DSI driver on 8x10.
Change-Id: I266a5fcb6a2eb55c4de1bef6e78a727bf1101cb9
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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Add sysfs entry for dynamic FPS update mode. Add support to
change FPS in the following scenarios:
1. Store the FPS and change the clocks only when Suspend/resume
happens. This is the default configuration.
2. Change the FPS immediately by updating the clocks. Video
mode engine is disabled and then enabled when clock rate
is updated.
CRs-Fixed: 488453
Change-Id: I1722d54d9fbfdfbd7d22e02d8776a0f60dc86141
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
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Output edid raw data via sysfs. The size is fixed to
5 EDID blocks.
Change-Id: I46330db5e9507850ac9e82b766bcd4e4356c8755
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
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Changes ITC and CN0/1 bits in AVI hdmi infoFrame through
sysfs attributes.
Itc can be set either 1 or 0. CN0~1 bits can be set 0x00~0x11.
Change-Id: Ic6ae98ecd4c4b4a425e0219151c91eedab8d50e6
Signed-off-by: Lei Zhou <leizhou@codeaurora.org>
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
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Ensure that the frame size for the HDMI-CEC message
frame size doesn't exceed the maximum size when
reading message from userspace through sysfs interface.
This avoids potential overflow in cec send msg routine.
Change-Id: I891f23ed70ed5a6c0e3af1f47869effa079ffac8
CRs-Fixed: 520140
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
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Enable debugfs support for MDP3 core on 8x10.
Change-Id: I3ea94379d58b67533bfbaa9b64977ab3ca08ee67
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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Remove the core specific details in the debugfs implementation via
a defined debug interface.
Change-Id: I2bf9ac47e0121f1f269d8d82274143d760305526
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
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This change provides a mechanism to communicate with HDCP manager
to share the downstream KSVs to upstream HDMI devices.
Change-Id: Ib0d772d157af65b2f35c9b7e7cebe8d0e1670735
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
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When MDP underflows, hardware will automatically try to issue a reset to
recover from it. Potential issue has been identified when reset happens
on two video interfaces at the same time which may lead to a hw lockup.
To avoid such situations disable the hardware underflow recovery, MDP
will still automatically recover at the beginning of next frame.
Change-Id: I3473486e229e67f6213db83a0ecb34333a977d4f
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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There are cases where if commit happens very close to vsync or in other
uncommon conditions, where MDP will continue fetching from old buffer
address when unmap of the buffer happens. In order to avoid such
scenarios keep a reference of buffers for an additional commit before
unmapping to avoid potential iommu page fault.
Change-Id: Ied61b4851e2d410d71360ad0c119ef21009f91a1
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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Remove dsi panel's device probe since the
dsi controller initializes the panel through
the phandle from device tree. dsi panels are
moved under mdss mdp device and are no longer
treated as devices themselves. This enables the
implementation of dsi panel detection.
Change-Id: I3a9966027042fe4f05ba26115079d89ec5a765eb
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
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Add ability to read kernel's boot parameters to
check for primary panel interface and panel
configuration. The parameter passes three
fields of information which are parsed by the MDP
driver as a part of the device probe.
Format for cmdline param expected is:
"mdss_mdp.panel=<lk_cfg>:<pan_intf>:<dt_node_name_panel>"
where <lk_cfg> is "1" - lk/gcdb config or "0" non-lk/non-gcdb
config;
<pan_intf> is one of "dsi:<ctrl_id>", "hdmi", "edp";
and <dt_node_name_panel> is the string identical to panel's
device node name from the DT.
Change-Id: Ib9e7e4b69c62537f551aaf9ccaf0dd69eddd6889
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
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Devicetree contains properties that specify the preferred
primary panel interface for MDP. Parse this information from
MDP and provide it to the individual controller.
Each controller driver reads devicetree property
to initialize the preferred panel.
Add bindings for property, under MDSS-MDP, to indicate
the panel interface such as dsi, hdmi, edp etc.
Panel interfaces are configured independently based on
msm board type. Add property that informs MDSS about
the panel interface to be used.
This facilitates the ability to use different panel
interfaces irrespective of the board or SoC.
Add bindings for property under DSI controller node to
indicate the preferred primary panel.
This allows to implement the ability to use different panel
irrespective of the board or SoC.
Change-Id: Iaa95f0676ac427bd57bd29c9e12701b6f548b30a
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
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Add support to MDP_YCBYCR_H2V1 interleaved YUV format.
Change-Id: I3b4fccf8303db778af213feb03644e5600ee803f
Signed-off-by: Ramkumar Radhakrishnan <ramkumar@codeaurora.org>
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Currently rotation activities are blocking and hence hurt
the performance. So, make the calls asynchronous and use
sync point to realize this.
Change-Id: I677097fcaf133b0ed67ae94cfeacf3a0a10bc579
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
[cip@codeaurora.org: Updated sync.h/sw_sync.h include]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
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Currently mdp sync point supports buf sync ioctl for
normal mdp overlay operation. So making it more generic
such that it can be used for rotator also.
Change-Id: I04c5f29a5259238ef1de26f6e801269b89cf5fed
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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The lock protecting the vsync control ioctl is not needed since
the vsync control should take effect immediately and be
asynchronous to the display updates.
Change-Id: I5068246488b7fefec9e11e8422bacbe7489c827f
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
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The PWM controller in Qualcomm PMIC chipset needs to re-enabled
if the underlying PWM configuration is changed. With the
introduction of generic PWM framework in 3.10, the framework does not
pass through the PWM enable request if it finds that the PWM is
already enabled and silently discards the request. So add a check
to disable PWM before sending an enable request.
Change-Id: I497a980c6aac676c43f070e709a90cc1162d39b6
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
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When there are more virtual rotator sessions allocated than
DMA pipes available, rotator pipe allocations might fail and
corresponding error messages are printed which can lead to a
watchdog bark. This change silences those error messages and
also implements an extra check to avoid null pointer
dereference when a session is dequeued without a pipe.
CRs-fixed: 523701
Change-Id: I128ab85aac9e091b13a8772a43342d655c6f736f
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
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This patch will increase the cnoc clock rate whenever MDP is on, which
is not necessary. The desired implementation is to increase the cnoc
clock rate when hist LUT are updated.
This reverts commit 61223f37af38d14f56ee67f823cb3eda52a81f93.
Change-Id: I8394bf33175b050567f6c3ada586cb4f1d3c4d7e
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
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NUL-terminate SPD Vendor name and SPD
Product description data stored in the
control structure of hdmi driver. This
avoids overflows in print messages and info
frames.
Change-Id: I0a0adcfad06625e4d7368d3c5cd0ec38f0e047d8
CRs-Fixed: 520148
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
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Overfetch is disabled on the borders of videos to avoid picking up
padding which may result in greenish border on right and bottom. However
this has side effect for dual pipe cases where overfetch is required for
smooth scaling effect in the middle of image. Add a flag to catch these
cases and enable overfetching in the middle.
Change-Id: I2545dbdab2c0643986fefa85990e9e820e4c3611
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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MHL driver initializes the chip in probe and enables
irq. These operations are postponed until they're
required. This prevents any interrupts from
being triggered even when there is no real
communication from hardware. Do not enable
irq wake in suspend before the first discovery
has completed. This ensures wake irq occurs only on
an irq that has been previously allocated.
CRs-Fixed: 509337
Change-Id: Ifa5c66cfe2fb732d2f8e34b7473ab9ae07937dc7
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
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MDP now supports tile formats on APQ8084. Macro tile formats
are aligned with number of memory banks and access channels to
improve performance.
Change-Id: Ie566cc12b38f81d111f378f19883433bcc71fa48
Signed-off-by: Shalabh Jain <shalabhj@codeaurora.org>
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DSPP block being programmed should be the same as layer mixer attached.
Change-Id: If2b051682cc03563b13264b736ddfc2e1c9ed638
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
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