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* | msm: mdss: implement compat ioctl for mdss-fbManoj Rao2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement an entry point for compat ioctl in mdss framebuffer driver. Implement compat ioctls in a new file. All the fb ioctls that require compat layer translation have been added here. If the user process is from a 32-bit world, then the compat ioctl does an appropriate command conversion to keep the existing ioctl implementation unchanged. Signed-off-by: Manoj Rao <manojraj@codeaurora.org> Change-Id: I24c378116b2504db29ce0b17d690b0e4779426d6 [cip@codeaurora.org: Moved mdss_compat_utils.c file location] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | msm: mdss: mdp: fix incorrect pointer castsManoj Rao2016-03-23
| | | | | | | | | | | | | | | | Modify mdp drivers to ensure pointer casts are done in an appropriate manner Change-Id: I6b1dacf64e0c33bbdd02b0e9da7a7491c6970177 Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
* | msm: mdss: mdp: fix incorrect format specifiersManoj Rao2016-03-23
| | | | | | | | | | | | | | | | Modify format specifiers in prints to use appropriate type specifiers Change-Id: I390fc585e24f041de41460a0b49ef58a090bb8f2 Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
* | msm: mdss: Copy IGC LUT data correctly to userspaceKrishna Chaitanya Parimi2016-03-23
| | | | | | | | | | | | | | | | | | | | | | During IGC read operation, IGC LUT's data was copied to userspace incorrectly because of swapping color components. Fix component data swapping during IGC LUT data copy to user space to provide the correct IGC LUT data to user space. Change-Id: I301a3500f0e0c4bbf9f52affa66373585c72d987 Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
* | msm: mdss: add bus bandwidth request enable/disable during get/free bufferPawan Kumar2016-03-23
| | | | | | | | | | | | | | | | Enable bus bandwidth request during get/free buffer to ensure iommu is in proper state while mapping/un-mapping any buffers. Change-Id: I85cc74a666dbfd29abd26609cbdd3e968d1ecd01 Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
* | msm: sps: remove sps header fileDipen Parmar2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | Remove the sps header file from older location as sps driver and clients need to use new header file from new location include/linux. Resolve the warnings/errors from client drivers due to new sps header changes. Change-Id: I1cdb87756abf3425a9bb5d8bf89cd1aa03a01716 Signed-off-by: Dipen Parmar <dipenp@codeaurora.org>
* | msm: mdss: mdp: fix incorrect format specifiersManoj Rao2016-03-23
| | | | | | | | | | | | | | | | Modify format specifiers in prints and ensure pointer casts are done in an appropriate manner Signed-off-by: Manoj Rao <manojraj@codeaurora.org> Change-Id: I58a61eec971712a889210d9a008e4ab7e2aa090f
* | msm: mdss: pp: add support for 64-bit archManoj Rao2016-03-23
| | | | | | | | | | | | | | | | | | Porting mdss-pp driver to the 64-bit architecture. Modify qualifiers in prints and ensure pointer casts are done in an appropriate manner for 64-bit. Signed-off-by: Manoj Rao <manojraj@codeaurora.org> Change-Id: I1bee15d5c29c238696b69b39718c008cc33f70b0
* | msm: mdss: io-utils: add support for 64-bit archManoj Rao2016-03-23
| | | | | | | | | | | | | | | | | | Port msm display io utils drivers to the 64-bit architecture. Modify qualifiers in prints and ensure pointer casts are done in an appropriate manner for 64-bit. Signed-off-by: Manoj Rao <manojraj@codeaurora.org> Change-Id: Idf5bc61125d98890bee1331a9b6651f482ea3fd2
* | msm: mdss: dsi: add support for 64-bit archManoj Rao2016-03-23
| | | | | | | | | | | | | | | | | | Initial work for porting msm display drivers to the 64-bit arch. Modify qualifiers in prints and ensure pointer casts are done in an appropriate manner for 64-bit. Signed-off-by: Manoj Rao <manojraj@codeaurora.org> Change-Id: I0e545d6de0cade2b03599ef197e980d79506f83f
* | msm: mdss: fb: add support for 64-bit archManoj Rao2016-03-23
| | | | | | | | | | | | | | | | | | Port msm framebuffer driver to the 64-bit arch. Modify qualifiers in prints and ensure pointer casts are done in an appropriate manner for 64-bit. Signed-off-by: Manoj Rao <manojraj@codeaurora.org> Change-Id: I9379431d81f92da1e098ed09a7a3798bbaeee998
* | msm: mdss: Correct ARGC read write for all DSPPKrishna Chaitanya Parimi2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | Currently ARGC read write is done for DSPP0 irrespective of dspp_num, as the dspp_num corresponding to the block provided is not calculated. Added the calculation of the dspp_num to get correct address of ARGC registers. Change-Id: Id787e76debb26d23d75d3cdb859a697b6f0016f5 Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
* | msm: mdss: Add pr_debug functions to print postproc structuresBenet Clark2016-03-23
| | | | | | | | | | | | | | | | | | Added print functions for the postproc structures to aid in debugging. Change-Id: I14ebb4d00f99f376967dc418112611e31030d21b Signed-off-by: Benet Clark <benetc@codeaurora.org> [cip@codeaurora.org: Moved new file locations] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | msm: mdss: add support for RGB pipes without scalar blocksPadmanabhan Komanduru2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Some MDP revisions have RGB pipes which do not have scaling support. This change takes care of supporting those variants. Also export this property to the userspace using the MDP capabilities sysfs node. This will help in MDP composition related decision making. Change-Id: I9548bf720d5d80e0e75a71592d7394ee566dce3b Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* | msm: mdss: synchronize wfd driver iommu mmap/munmap with mdssPawan Kumar2016-03-23
| | | | | | | | | | | | | | | | | | Add clocks reference during wfd driver iommu mdp_mmap/mdp_munmap to ensure iommu is in proper state while wfd driver map/un-map any buffers. Change-Id: Id1a24285b81d5047e5e9f002ade9694ea49be59d Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
* | msm: mdss: Fix DTM state entry check in pp moduleDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | DTM state should be updated if framebuffer structure is accessible for the pipe. Wrong check fails the DTM state update and does not provide an exclusive access to PP blocks on SSPP. Change-Id: I170182c2d59c5f09d1cb911f61f3e0a1af91b067 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | msm: mdss: make dma pipe clk-ctrl-offsets parsing optionalZohaib Alam2016-03-23
| | | | | | | | | | | | | | | | | | | | Certain chip-sets like mpq8092 don't have DMA pipes. Current code of parsing clk-ctrl-offsets doesn't consider that and cause regression. Fix this by making clk-ctrl-offsets parsing optional for DMA pipes Change-Id: I07590245a02cca389df2d2bc8dc994182daf71e8 Signed-off-by: Zohaib Alam <zalam@codeaurora.org>
* | msm: mdss: Fix mdp clock rate assignment when apply fudge is falseJayant Shekhar2016-03-23
| | | | | | | | | | | | | | | | | | When apply fudge is false, currently mdp clock rate can take garbage values, hence assign the calculated clock rate without applying any fudge factors. Change-Id: I7c9d34024ab94b05160b50560ab136c0c8b7781d Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
* | msm: mdss: add support for dedicated rotator controlPadmanabhan Komanduru2016-03-23
| | | | | | | | | | | | | | | | | | | | | | In some MDP revisions, there is a control path that supports only rotator operations whereas in other MDSS variants, the same path can support both WFD and rotator. This change takes care of this. Also, makes changes to support dedicated WFD block. Change-Id: Ife6ebd39a3f6a42501baeb2a8d4c6c8e1a9db39a Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* | msm: mdss: Add support for multiple WFD writeback modesPadmanabhan Komanduru2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Different versions of MDSS hardware have different WFD blocks such as 1.) Writeback WFD block connected to interface mixer. 2.) Writeback block shared between WFD and rotator. 3.) Dedicated WFD block using the writeback mixer. We need separate handling for each of these wfd writeback modes. Add support to take care of this. Make the necessary changes in the MDSS DT files to support this for different MDP revisions. Change-Id: Ib95699bd1d8f720f4f044608850eeed60455d6ed Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* | msm: mdss: Allow writeback panel to start overlay during handoffBenet Clark2016-03-23
| | | | | | | | | | | | | | | | | | | | | | There is no longer a need to delay the hardware initialization for WB. Previously, iommu attach was done automatically in overlay_start, which caused page faults. However, now the iommu is attached at the same time as continuous splash handoff, which prevents any unwanted page faults. Change-Id: I79f021da1ada7e342b9db84167032df5ac840e4e Signed-off-by: Benet Clark <benetc@codeaurora.org>
* | mdss: mdp3: turn off panel before turning off dmaTerence Hampson2016-03-23
| | | | | | | | | | | | | | | | There was a flicker during bootloader to kernel transition. Problem was that we were turing off dma before turning off panel. Change-Id: I44a0fc9810891293b4b866558b88afaf65ab942d Signed-off-by: Terence Hampson <thampson@codeaurora.org>
* | msm: mdss: perform proper clock handoff during cont. splash screenAdrian Salido-Moreno2016-03-23
| | | | | | | | | | | | | | | | | | | | | | During continuous splash screen need to ensure clocks are properly ref counted once and released once handoff has happened. Doing it in different places can lead to inproper order and cause clocks to be disabled. Fix this by centralizing this into footswitch ctrl which is called when continous splash screen is enabled. Change-Id: I17f3d5517d9a0583221fdb5c354bf1992ddeddbd Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
* | msm: mdp3: implement overlay prepare ioctl for mdp3 driverAdrian Salido-Moreno2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Implement overlay prepare ioctl call for mdp3 display driver. This will allow a full frame with multiple overlays to be configured at once and perform frame level checks before being pushed to display. This function guarantees that if the call is successful, the frame can be displayed successfully on the screen when display commit is called. Change-Id: I761f48f81512fbe538565c4622d9299857350da1 Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
* | msm: mdss: implement overlay prepare ioctlAdrian Salido-Moreno2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Overlay prepare will allow a full frame with multiple overlays to be configured at once and perform frame level checks before being pushed to display. This function guarantees that if the call is successful, the frame can be displayed successfully on the screen when display commit is called. Change-Id: I276b6fe3e0a872a2e93170f3cea1002d3ce0dac9 Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
* | msm: mdss: Dynamically change writeback path OTJayant Shekhar2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Writeback path when used for WFD is processed at 1px/clk whereas when used for rotator, it is processed at 4px/clk. To ensure that writeback during WFD doesn't slow down, reduce the WB block rotator OT to different number depending on different target. Change-Id: I6f37557756d0c8c5037bbd251637ed872d872f74 Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
* | msm: mdss: fix pp setup on SSPP pipe in rotation scenarioDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | mfd is not updated on controller when pipe is setup for rotation scenario. However, post processing module check it for all use cases that leads to pp update failure SSPP pipe. This change avoids the extra checking and allows pp module to update SSPP pipe in all use case scenarios. Change-Id: I8718e67ca49067c9af7b492da7cdb1344e826389 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | msm: mdss: update layer mixer access for calibration toolDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | Calibration tool should have register access on all layer mixers connected to DSPP pipe and WB path. It should also have control layer register access to read the current layer mixer configuration. Change-Id: If2cc86c2e6f470e090746a400b16cb540948c3e9 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | msm: mdss: provide an exclusive access to QSEED2 blockDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | Calibration tool and pp module uses the QSEED2 block on VIG pipe to set the sharpness. This sharpness effect is overwritten when both modules tries to update it at the same time. Hence, it is required to provide an exclusive access to QSEED2 block when target is in display tuning mode. Change-Id: I41b85313e529a3cca70de7e652c3abb7d4defbca Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | msm: mdss: fix the panel color distortion issue for RGB565 formatXiaoming Zhou2016-03-23
| | | | | | | | | | | | | | | | For the color format RGB565, the pack pattern was set to BGR instead of RGB, causing the red and blue color swapping on the panel. Change-Id: Ib9233a93676e7d5d40f134f9a1657781c631ebdd Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
* | msm: mdss: MDP clock optimization for single layer video playbackJayant Shekhar2016-03-23
| | | | | | | | | | | | | | | | | | MDP core clock bumping is not required for single layer video playback in 8x26 targets. Hence add revision check to avoid fudge factor. Change-Id: I1b0ccb4ef50514f705845b0218fa6ca0d28c1779 Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
* | msm: mdss: Finetune ab votes for PPPShivaraj Shetty2016-03-23
| | | | | | | | | | | | | | | | | | Current ab calculation pushed the power numbers very high. Finentune the calculation and keep ib undisturbed. Change-Id: Iddfa39a735201a52daae7278f4006fa6f929b19c Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org> Signed-off-by: Sravan Kumar D.V.N <sravank1@codeaurora.org>
* | msm: mdss: add sw_reset support for source pipesUjwal Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | In certain use-cases when under-run happens and simultaneously pipe is un-staged from the mixer, pipe goes to bad state. In certain chip-sets, sw_reset sequence is available to bring back pipe in a good state. Add support for this sw_reset sequence. Change-Id: I819a0ed4073d72571f3f663164a41823e947b71f Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
* | msm: mdss: add dynamic clk status check to pipe idle verificationUjwal Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | Dynamic clk status of pipe can indicate if that pipe is active or not. This status in conjunction VBIF halt status of pipe describes the idle state of the pipe. Add support to parse necessary offsets from DT and use them to find idle state of the pipe. Change-Id: I83c6f323d48a85bfc08ff7bcee47f7c3038ea7e1 Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
* | msm: mdss: optimize MDP pipes cleanupAdrian Salido-Moreno2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | There are cases where pipe cleanup can happen without display commit. This means that the pipe was never programmed to hardware, in these cases the pipe can be cleaned up without the need of display commit cycle to happen. Also there is no need to access hardware to release resources such as SMPs since they have not been programmed yet. Change-Id: I57a46471dc1fba4e45e55c3543940ba4fba0540a Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org> Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
* | msm: mdss: Fix for bus bandwidth issueRadhika Ranjan Soni2016-03-23
| | | | | | | | | | | | | | Fixing possible large values handling. Change-Id: Id9e4aafa2a922c2c90def037b110826344487fcd Signed-off-by: Radhika Ranjan Soni <rrsoni@codeaurora.org>
* | msm: mdss: fix display time out when taking ESD testShuo Yan2016-03-23
| | | | | | | | | | | | | | | | | | | | Currently, Command engine will be blocked when sending display off command in ESD test. Root cause is panel BTA will affect DSI status. Reset dsi driver when command engine is blocked. Change-Id: I729b079d2becfad60630fc941d36199f95618eab Signed-off-by: Shuo Yan <shuoy@codeaurora.org>
* | msm: mdss: mdp revision initializationZohaib Alam2016-03-23
| | | | | | | | | | | | | | | | | | Make sure mdp revision is initialized when user space application retrieves it. Change-Id: Ib09767ac5db3af3958a82c83ed553e8bd69637e0 Signed-off-by: Zohaib Alam <zalam@codeaurora.org> Signed-off-by: Ken Zhang <kenz@codeaurora.org>
* | msm: mdss: hdmi: hdcp encryption enablementKen Zhang2016-03-23
| | | | | | | | | | | | | | | | | | For hdmi as primary case, enable encryption after hdcp authentication passes. That is to avoid black screen before authentication finishes. Change-Id: I956066369dd7bae5794fe4c2751712293924cf54 Signed-off-by: Ken Zhang <kenz@codeaurora.org>
* | msm: display: 8092: Handle no buffer case for VPU compositionKen Zhang2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Handle the case when the buffer is not queued to MDP. Since in mpq, the buffers are queued through VPU, so need to make sure that the configuration are kept even if there is no buffer is queued. Change-Id: Ic50c2ccf796998c95de61edb5555bc4047b02dff Signed-off-by: Ken Zhang <kenz@codeaurora.org> Signed-off-by: Zohaib Alam <zalam@codeaurora.org>
* | msm: mdss: Update wr mem fields with correct namesCasey Piper2016-03-23
| | | | | | | | | | | | | | | | | | | | | | wr mem start and continue were incorrectly named in the documentation and dtsi files. Changing the names to wr-mem-start and wr-mem-continue to more accurately reflect the fields. Change-Id: If2cdd410fd50a4690dcb6c87cb0b9f4818848848 CRs-Fixed: 578028 Signed-off-by: Casey Piper <cpiper@codeaurora.org>
* | mdss: display: Add support for variable refresh ratePadmanabhan Komanduru2016-03-23
| | | | | | | | | | | | | | | | | | Add support for variable refresh rate by changing the VFP immediately and programming it to MDP TG and DSI registers. Change-Id: I186e80cf38d42f4224afedadda96cc613ae68470 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* | msm: mdss: Change return value in dsi_offMayank Chopra2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Match panel_power_off check return value, during dsi off, with panel_power_on, during dsi on. Otherwise, this leads to inconsistency, when performing random dsi on and off sequence. CRs-Fixed: 608203 Change-Id: I0ed7c8d6ebe846492480e36fe8958909927b82b9 Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
* | msm: mdss: Enable EOT packets for DSIMayank Chopra2016-03-23
| | | | | | | | | | | | | | | | | | Expose properties to enable ignoring and appending of EOT packets for DSI panels. CRs-Fixed: 575875 Change-Id: Ib1ad4fedf7bea7f47b5468621793c6845c4d1180 Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
* | msm: mdss: share mdss io utility APIs with other driversDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | MDSS io utility contains APIs to handle driver specific resources like GPIOs, power supplies, clocks and other resources. Sharing them with other drivers allow them to do resource management without re-writing the same code. Change-Id: Ib699407667239336cf82211e3f6e8eec97a104a8 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org> [cip@codeaurora.org: Move mdss_io_util.h to include/linux] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | msm: display: 8092: Update pipe-flush sel reg for VID pipeKen Zhang2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | For mpq platform, buffer is not queued through HWC except the first frame. So, added this change to get the correct pipe flush setting for VIG pipe. Since, in mpq, the buffer is queued directly by Maple firmware only on VIG pipe. The flag MDP_VPU_PIPE determines that the layer will be composed by VPU(maple) on the given pipe. Change-Id: I0566913d5d14f6160e5cbc132b76ba8fbec609a7 Signed-off-by: Zohaib Alam <zalam@codeaurora.org>
* | msm: mdss: set writeback RGBX8888 output alpha to opaqueSree Sesha Aravind Vadrevu2016-03-23
| | | | | | | | | | | | | | | | | | | | Even though the alpha channel on RGBX format should be ignored, even if the pixel is picked up it should still have full alpha value so that all pixels are shown. For this reason set the alpha value to 0xFF. Change-Id: I244a827b5b0ea228d2b2600dba0c3a1c6d8f2392 Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
* | msm: mdss: Check extra mmb allocated to a pipeMayank Chopra2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | If set call to a pipe changes smp configuration such that calculated no. of mmb blocks are less than allocated mmb blocks, fail this set call. This ensures pipe disconnection and smp configuration is possible in next commit cycle. Also, check that no extra mmb is left allocated to any plane when pipe's format changes. If so, fail the set call to let correct smp configuration happen in next commit cycle. Change-Id: Iec2b8cb18088587655cf0c68dc81e3ac7b819cbc Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
* | msm: mdss: dsi-1 as master clock controller at split display caseChandan Uddaraju2016-03-23
| | | | | | | | | | | | | | | | | | | | | | During split display case, both dsi controllers share the same dsi pll(dsi0) dsi-0 clock need to be enabled before dsi-1 and disabled in the reverse order. This mechanism helps using a unified clock control logic. Change-Id: I9fe0095b0427c9c2b7fd84c3179bc8364049cce4 Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org> Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
* | msm: mdss: enable under-run interrupt for secondary ctlUjwal Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | In split-display use-cases two ctl paths are active but one acts as master and other as secondary. Currently under-run interrupt is only enabled for master ctl. Enable under-run interrupt for secondary ctl for seamless tracking. Change-Id: I849419c4077fed384431079952027149c31b33fc Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
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