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* | msm: mdss: add support for Early Clock GatingIngrid Gallardo2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Add support to gate the mdp clocks as soon as the frame transfer is done for command mode panels. Change-Id: I8325f26806ff3163edd87b9e3c01cd045f2aec77 Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org> [cip@codeaurora.org: Resolved merge conflicts, use debugfs_create_u32 for enable_gate] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | msm: mdss: move read ptr irq configuration to the vsync handlerIngrid Gallardo2016-03-23
| | | | | | | | | | | | | | | | | | | | Enable and disable the read pointer interrupt only during the time that the vsync handlers request this interrupt. This also makes sure that mdp clocks are enabled during all this time. Change-Id: I2564a3b0cf05325c282244f5b60df10d44f5b364 Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
* | msm: mdss: add support to call panel events for one panelIngrid Gallardo2016-03-23
| | | | | | | | | | | | | | | | | | | | Add support in the panel interface to apply the requested events to the panel pointed by the controller only, this will give the caller the choice to skip the loop in all the child panels of the interface. Change-Id: I86edfadb6e326354914b79c284feb10837e83245 Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
* | msm: mdss: dsi: create dsi clock managerVinu Deokaran2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | Create a dsi clock manager to control dsi core and link clocks. Clock manager also has a state machine to transition between ON, EARLY_GATE and OFF states. Each client will vote for a specific clock state and the manager will check these votes to maintain lowest possible state. Change-Id: I50d63f87306cdd650f8d496908716153f0548665 Signed-off-by: Vinu Deokaran <vinud@codeaurora.org> [cip@codeaurora.org: Moved new file locations] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | msm: mdss: add reg bus vote to support different frequenciesDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | Current reg bus vote client supports only single frequency - 19MHz. This is not sufficient for different use cases like hist update, pp lookup table update during suspend/resume scenario. A client may request for higher frequency to finish the job early and avoid glitches. A client based register voting allows to traverse through votes from each client and update register bus vote with max client input. Change-Id: I4e94d1073375dbd71d9ba6268fc8c548ddb67440 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | msm: mdss: Swap chroma channels for CrCb during writebackTerence Hampson2016-03-23
| | | | | | | | | | | | | | | | Only way to swap chroma channels for CrCb formats during writeback is to swap starting addresses. Change-Id: I24e72dea5200e1cefc73337117b9f7e44d7994eb Signed-off-by: Terence Hampson <thampson@codeaurora.org>
* | msm: mdss: wait for pipe free before returning busy errorDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Client waits for retire fence and reuse the pipe on another display interface. This pipe is not stagged on MDP hardware but software structures are not updated because retire fence is signaled first. Due scheduling priorities between two threads, validate call from another interface may come first and try to reuse the same pipe. MDSS driver fails this call because software structures are not updated with pipe status. Ideally, driver should wait for timeout duration to allow other interface (or software structure) to release the pipe. This allow clients to reuse the same pipe on multiple displays without switching composition method. Change-Id: I999874f38a829162de7708cf2e5b3b425c9d5f2a Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org> [cip@codeaurora.org: Resolved merge conflicts] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | msm: mdss: avoid registers access during validateIngrid Gallardo2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | During validate ioctl, there is no need to access some of the registers this early on time. This patch moves the register programming from validate to commit, so mdp clocks do not need to be enabled during validate, preventing unnecessary toggling of the clocks once those have been released in command mode panels. Change-Id: I3eb34221d245153fad14463b873d0b870f5eb62a Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
* | msm: mdss: xlog: add support to dump MDP debug busSiddhartha Agrawal2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | Add support to dump the necessary registers from the MDP debug bus. And add support to dump this debug bus for 8994 chipset. Change-Id: I07f4a4833c8daffb35cd00e6a6c873f35ca2b0c0 Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org> Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org> [cip@codeaurora.org: Resolved conflict on mdss_dump_reg] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | mdss: hdmi: reinitialize completion before reuseCasey Piper2016-03-23
| | | | | | | | | | | | | | | | | | When waiting for an rxstatus message, we need to ensure that the completion is reinitialized before waiting for it. Change-Id: I069b652bf111d79026eed06864ba54934a16db36 Signed-off-by: Casey Piper <cpiper@codeaurora.org>
* | msm: mdss: rotator: validate ubwc x and y offsetsTerence Hampson2016-03-23
| | | | | | | | | | | | | | | | For destination roi x and y offsets need to be validated for ubwc formats to make sure that they align to the start of a tile. Change-Id: I43c50401a212b624851fa0d7f1347fe313d19ca2 Signed-off-by: Terence Hampson <thampson@codeaurora.org>
* | msm: mdss: prevent crash in null commit use caseTerence Hampson2016-03-23
| | | | | | | | | | | | | | | | | | | | Prevent client from crashing system when wfd_pre_commit is called without calling validate before. Change-Id: I83a2b878b300fb835908e57037da8a4d83d114ed Signed-off-by: Terence Hampson <thampson@codeaurora.org> [cip@codeaurora.org: Resolved merge conflict] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | msm: mdss: Fix DSI ROI alignment read during DSI probeJeykumar Sankaran2016-03-23
| | | | | | | | | | | | | | | | | | | | Fixes a bug in reading the DSI ROI alignment values as per the property description. Change-Id: Ieffa48891f4f9219951b6e90009369db993791a7 Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sandeep Panda <spanda@codeaurora.org> Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
* | msm: mdss: hdmi: remove DDC power disable in HPD offCasey Piper2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | The HDMI driver is causing an unbalanced mdss_update_reg_bus_vote call when powering off HPD in suspend state. Since the DDC module is powered on for HDCP in MDSS_EVENT_PANEL_ON and then powered off in MDSS_EVENT_BLANK, there is no need to power off the DDC module again in the HPD off function. Change-Id: I3b5e9e352d07e572e6c909554945d949fc374287 Signed-off-by: Casey Piper <cpiper@codeaurora.org>
* | msm: mdss: Add IGC version framework support for default IGC programmingBenet Clark2016-03-23
| | | | | | | | | | | | | | | | | | | | A limited range IGC LUT is set by default in the cases of HDMI output. In order to set the default LUTs, the values must be sent according to the new PP versioning framework. This change adds support for configuring the IGC parameters according to that framework. Change-Id: I08e641f9c6dd1be119c98446afad26f633615ea1 Signed-off-by: Benet Clark <benetc@codeaurora.org>
* | msm: mdss: Check valid PP hardware configs based on mfdBenet Clark2016-03-23
| | | | | | | | | | | | | | | | | | | | The logic for validating the hardware configuration of the mixers, AD hardware, and DSPPs in a display pipeline has been simplified. If an incoming PP configuration is invalid and PP hardware is not available, a warning is printed. Invalid configurations are recoverable, however. Change-Id: Ib3a6206a8c181390fb6ee5a6761e5ea857b37e1a Signed-off-by: Benet Clark <benetc@codeaurora.org>
* | msm: mdss: fix error handling in pan display commit pathDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | Pan display commit leaves the left ctl pipe allocated if right ctl pipe allocation fails. It also tries to release the iommu refcount when it did not added it. This can lead to pipe allocation failure for atomic commit or page fault due to smmu clock disable. This change fixes the error handling in pan display commit path to release the resources in correct order. Change-Id: Icaa0cf164d12fe3f8d4d2012917a5524ad31f824 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | mdss: mdp: update dspp histogram states atomicallyGopikrishnaiah Anandan2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | State of dspp histogram blocks attached to logical display should be changed atomically to idle when histogram collect is ioctl is called by userspace clients. This will ensure that histogram interrupt handler will see consistent states for all dspp's attached to logical display and prevent incorrect sysfs notification to userspace modules. Change-Id: I7f32ce21cd65026e1ea01e3b6fe8b571c7b08db3 Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
* | msm: mdss: hdmi: use HDCP SW keys if availableCasey Piper2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | On compatible hardware, HDCP keys can be provisioned through software instead of being hardware fused. If HDCP keys are available in sofware, set these keys and gather aksv through QSEECom calls. If keys are not available, do not continue HDCP authentication process. Change-Id: I7a93b6e1ef958aaa53ef756393ce1f81882bedaf Signed-off-by: Casey Piper <cpiper@codeaurora.org>
* | msm: mdss: correct ubwc total plane size calc and usageTerence Hampson2016-03-23
| | | | | | | | | | | | | | | | | | | | Total plane size was not calculated properly for ubwc formats. Additional the value that this was compared against was also not calculated properly. This change fixes some minor issues in data validation. Change-Id: I0a925f4824bf084e4a7465ecc650ea93936e8f68 Signed-off-by: Terence Hampson <thampson@codeaurora.org>
* | msm: mdss: hdmi: make edid parser an independent moduleAjay Singh Parmar2016-03-23
| | | | | | | | | | | | | | | | | | Currently only HDMI driver is using EDID parser. But this parse can be utilized by other MDSS drivers. Make this as an independent module which can be used by any other MDSS driver for EDID parsing. Change-Id: I62622af6c27927b7cf0390238f311452c03cd262 Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
* | msm: mdss: hdmi: fix 4k@60 scrambling issueAjay Singh Parmar2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | Enable scrambling for all the pixel clocks where scrambling is mandatory. Also, do not process multiple interrupts of same HDMI cable status as this can lead to spin multiple threads, one modifying scrambling data while other accessing it, resulting in wrong interpretation of scrambling related data. Change-Id: I31f80315a7d1b70bc6a0a84f5cd2990021bb8025 Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
* | msm: mdss: xlog: fix issue preventing dump address to be storedIngrid Gallardo2016-03-23
| | | | | | | | | | | | | | | | Fix bug in xlog dump which prevents the virtual address of the registers to be stored in the driver context. Change-Id: I15fba4b8f88b31b8cd9eb27a21548e04a9a286ff Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
* | msm: mdss: configure pixel extension block for all formatsDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Pixel extension block configuration is mandatory for all pipes and all formats on 8996. It is leading to underrun if not configured for solid fill format or other formats. This change configures the software pixel extension block for all formats - with/without scaling. Change-Id: Ie724873340c6dfd5e6cb11d66aeb0ac3aae7f841 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | msm: mdss: Add default dither programming from CTL initBenet Clark2016-03-23
| | | | | | | | | | | | | | | | | | | | The ability to program default values to the dither hardware is broken using the new post-processing versioning framework. This change adds back the functionality of programming the dither block based on panel bits per pixel. Change-Id: I016e7ebec3e05107e677d6ca6e2ef7fd078af048 Signed-off-by: Benet Clark <benetc@codeaurora.org>
* | mdss: mdp: do not report tile format when ubwc is supportedDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | MDSS driver reports the tile format and ubwc format support in capability node. It should not report both format supports because framework may use tile format over ubwc which is not intended. UBWC is common for venus, camera and GPU. Change-Id: If9230d4974ec150d879c77a6f1efba7f040ba2ed Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org> [cip@codeaurora.org: Resolved merge conflict] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | msm: mdss: add csc tables for mdp5 for various color spacesVinu Deokaran2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add csc tables for 601 full, 601 limited and 709 limited to support different csc matrices. HAL provides color space request to driver, consider it to choose appropriate matrix for conversion. This will help in solving artifacts during GPU/MDP switches so that both GPU and MDP choose same matrix for conversion. Change-Id: Idd73e0695ea64d0c0bd778dba07199e209ca6f3d Signed-off-by: Vinu Deokaran <vinud@codeaurora.org> Signed-off-by: Kalyan Thota <kalyant@codeaurora.org> Signed-off-by: Ping Li <pingli@codeaurora.org>
* | msm: mdss: add generating 128 bytes of DSC PPSKuogee Hsieh2016-03-23
| | | | | | | | | | | | | | | | | | | | Add generating 128 bytes of DSC PPS (picture parameters set) base on specified DSC picture width/height and slice width/height. Send 128 bytes PPS stream to configure and enable panel's DSC. Change-Id: I3f2fcb7098023b7d27ef85392e4d5f36bf189d1b Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
* | msm: mdss: add secure display supportDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | Secure display architecture requires null commit before and after secure display session. It also adds requirement to make the SCM call before and after secure display session. It supports secure display with single-stage SMMU hypervisor controlled. Change-Id: I3f41ed318c80d6e76328de114f7dee0c9891c2f0 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | msm: mdss: restore ctl registers when idle power collapse is enabledJeevan Shriram2016-03-23
| | | | | | | | | | | | | | | | | | | | | | In the current implementation, control register are not being restored for the compression modes. This causes display corruption on command mode panels if idle power collapse is enabled. This change restores the compression mode registers while coming out of idle power collapse. CRs-Fixed: 859333 Change-Id: Id40270e78b798f3baf7a6c3ad2598f7f12bbf3fb Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
* | mdss: mdp: extract if mdp has ubwc from hw revTerence Hampson2016-03-23
| | | | | | | | | | | | | | User space needs a way to identify if mdp has UBWC Change-Id: I5fec34976473ea80c09684d51b14d5588fab09eb Signed-off-by: Terence Hampson <thampson@codeaurora.org>
* | msm: mdss: use the correct variable for continuous splash statusPadmanabhan Komanduru2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | The DSI driver checks if continuous splash screen is enabled via mdss_panel_get_boot_cfg API to MDP driver. In the current code, we use the wrong variable to check continuous splash screen status. This might cause display crash during boot up when continuous splash screen is disabled. Fix this issue by using the correct variable to check the status. Change-Id: Iaa752a5c764dbd3ca94a5e14514f9174dad21695 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* | msm: mdss: reset the skip buffer flag to avoid memory leakDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | Pan display path can call buffer alloc and use one of the buffer. It will enable the skip detach enabled for that buffer. This buffer moves to free queue when atomic api stage next set of layers. It can lead to memory leak when atomic API path reuse the same buffer without resetting the detach flag. Ideally, it should be reset for each attach call. Change-Id: I96e2c030669539d8e5dc7205abc233ecc7118bdb Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | msm: mdss: specify unique name for panel debugfs directoryAravind Venkateswaran2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For dual DSI board configurations with independent displays, the debugfs directory needs to be created for both panels. Use unique directory names for the debugfs node. After this change, the debugfs directory will have the following structure: For Split-DSI: /sys/kernel/debug/mdss_panel_fb0/intf0 (assuming fb0 device node) /sys/kernel/debug/mdss_panel_fb0/intf1 (assuming fb0 device node) For Dual-DSI with independent displays: /sys/kernel/debug/mdss_panel_fb0/intf0 (assuming fb0 device node) /sys/kernel/debug/mdss_panel_fb1/intf0 (assuming fb1 device node) For Single-DSI: /sys/kernel/debug/mdss_panel_fb0/intf0 (assuming fb0 device node) Change-Id: Ic98d0d662932223828c41511c51cb4a0dda42bb2 Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
* | msm: mdss: add support to switchable qos during vblankIngrid Gallardo2016-03-23
| | | | | | | | | | | | | | | | | | Starting with 8996 chipset, qos settings can be adjusted to be different during vblank. This change adds support for this feature. Change-Id: Ifa25dd799a55396224f49c49a29fcc8f5a245bd0 Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
* | msm: mdss: hdmi: add hardware ddc rxstatus supportCasey Piper2016-03-23
| | | | | | | | | | | | | | | | | | | | Support reading rxstatus through hardware interrupts. Reading rxstatus through hardware allows locality deadlines to be enforced. Change-Id: Ic56b3e5c27f2410c7b060a6d5c7c88e0770dc16b Signed-off-by: Alhad Purnapatre <alhadp@codeaurora.org> Signed-off-by: Casey Piper <cpiper@codeaurora.org>
* | msm: mdss: remove unused register read request and invalid commentDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | Ctl rev in vfp update method is unused. Remove this nop instruction. DSI timing mode configuration is not specific for 8916/8939 target but common for all targets. Remove such invalid target specific comment. Change-Id: Ie7c75203ca50e6bd2abf952f4d4362314c01987c Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | msm: fb: add support to set the output formatTatenda Chipeperekwa2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support to set the output of the interface based on the grayscale value. The grayscale value must be set to a format specified according to the V4L2 FOURCC pixel format definitions. We translate from the FOURCC pixel format to the corresponding MDP format when setting the final output format. For example, this is used to set the output format to YUV420 for HDMI TVs that are HDMI 2.0 compliant. Change-Id: Id5623f1211b743b54002c22b19d81dbd13e6564f Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
* | msm: mdss: fix typo in mdp bw calculations preventing to use comp ratioIngrid Gallardo2016-03-23
| | | | | | | | | | | | | | | | Fix typo that prevents to use the compression ratio factor to reduce the bw vote for ubwc formats. Change-Id: Ic06129a1fa0c548bda9673037748b348b8af730a Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
* | msm: mdss: add support for dynamic OT for mdss on 8952Krishna Chaitanya Devarakonda2016-03-23
| | | | | | | | | | | | | | | | | | | | As per QoS recommendation for mdss on 8952, Rotator/WB OT should be configured for both read/write paths. Add support for configuring dynamic OT in msm8952, for Rotator and WB paths. Change-Id: I543a99cb931f2a58f5f98937c32728f290614316 Signed-off-by: Krishna Chaitanya Devarakonda <kdevarak@codeaurora.org>
* | msm: mdss: initialize prefill lines for BW prefetch on 8952Kalyan Thota2016-03-23
| | | | | | | | | | | | | | | | | | initialize min prefill lines, cursor size and max z-order for 8952. Change-Id: If243c285590c45d681aa18a32d830c0c05075a6b Signed-off-by: Kalyan Thota <kalyant@codeaurora.org> Signed-off-by: Krishna Chaitanya Devarakonda <kdevarak@codeaurora.org>
* | msm: mdss: calculate rotator bw based on source fpsKrishna Chaitanya Devarakonda2016-03-23
| | | | | | | | | | | | | | | | If the source FPS for the rotator is set, store it and use it for calculating BW required by rotator. Change-Id: I35801528930897447a039c4a4c950048e99d16d9 Signed-off-by: Krishna Chaitanya Devarakonda <kdevarak@codeaurora.org>
* | msm: mdss: re-check dsi cmd transfer done interruptJeevan Shriram2016-03-23
| | | | | | | | | | | | | | | | | | | | | | There is a possibility that irq trigger may get delayed in the software for more than expected, in such cases the cmd done status may have been updated in DSI isr status register. Add additional check to see if the dma transfer is completed by reading this register and checking the status. Change-Id: Ia27ee162668949934c3e3cedc97e746832824f5c Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
* | msm: mdss: reduce log level when ping pong timeout happensJeevan Shriram2016-03-23
| | | | | | | | | | | | | | | | | | | | | | In the current implementation, driver has a recovery mechanism from pingpong timeout on command mode interface. This change replaces WARN macro with pr_warn to reduce the logging in dmesg when the pingpong timeout happens only once. CRs-Fixed: 856973 Change-Id: I7568466f4e909e4adafaabbcd5da22596750914b Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
* | arm64: dma-mapping: remove order parameter from arm_iommu_create_mapping()Mitchel Humpherys2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arm32 recently removed the `order' parameter from arm_iommu_create_mapping: (68efd7d2fb32c: arm: dma-mapping: remove order parameter from arm_iommu_create_mapping()) in order to make the API easier to understand. The arm32 DMA IOMMU mapper has dynamic resizing of the iova bitmap, so there was no reason to keep the `order' parameter around (which was introduced to reduce the size of the bitmap). Although we don't have dynamic iova bitmap reallocation on arm64, we'd still like to get rid of the `order' parameter since it's confusing and doesn't really help much (especially since all known clients on our system are passing order=0). Remove it. Change-Id: I35e32fdfbe05ec434f64a3a316d13c8f43304bc6 Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org> [cip@codeaurora.org: Removed changes unrelated to display] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | msm: mdss: add ubwc address offset calculationsTerence Hampson2016-03-23
| | | | | | | | | | | | | | | | When adding x and y offsets to uwbc formats, the addresses need to line up with the start of a tile. Change-Id: I975dd07bba4bf6dde7ece7aa9b2bfb61d5315dde Signed-off-by: Terence Hampson <thampson@codeaurora.org>
* | msm: mdss: ignore buffer mapping if it's solid fill layerLei Zhou2016-03-23
| | | | | | | | | | | | | | | | | | | | Ignore mdp_buffer mapping when MDP_SOLID_FILL_LAYER is detected. The client marked this mdp_input_layer as SOLID_FILL layer without input buffer associated with this layer. MDP hardware SOLID_FILL feature will be utilized. Change-Id: Ica48dc5b0be69ac42e2f442d6114781790a3c56a Signed-off-by: Lei Zhou <leizhou@codeaurora.org>
* | mdss: mdp: Set completion if backlight level is zeroGopikrishnaiah Anandan2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | During rapid suspend/resume usecases assertive display is being turned on with backlight level zero. When on command is received with backlight level zero driver bails out with out turning on AD and doesn't signal the client that worker queue has stopped processing which results in a timeout for on command. Change will ensure that client is signalled if driver is skipping the processing of AD due to backlight being zero. Change-Id: Iaa6229f10ce54f44ec64c175f67ef7584ad4c8b2 Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
* | msm: mdss: fix cursor pipe idle checking mechanismVeera Sundaram Sankaran2016-03-23
| | | | | | | | | | | | | | | | | | | | | | The clk status register and vbif status based on xin-id is used to check if pipes are idle. VBIF checks cannot be done for cursor pipes as the same xin-id is shared between dsi, cursor0 and cursor1. Avoid vbif status check and fix clk status check for cursor pipes. Change-Id: I9e0a185beffd4e732c1b5dc61822cc94b3735a27 Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
* | mdss: rotator: add trace and debug logsTerence Hampson2016-03-23
| | | | | | | | | | | | | | | | To assist with profiling and debugging, traces and additional debugging logs have been added. Change-Id: I39529dc52fe99de704268170a294bc4391ec2871 Signed-off-by: Terence Hampson <thampson@codeaurora.org>
generated by cgit v1.2.3 (git 2.25.1) at 2026-02-07 17:41:41 +0000