| Commit message (Collapse) | Author | Age |
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The ndx variable of dsi control structure needs to be configured
correctly in the early stage of probe. Otherwise, subsequent function
could dereference to a wrong value.
Change-Id: Icdcdf6713271af25c5135702d8479f5213909560
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
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In case of dual DSI configuration if any of the DSI
controller is using bridge chip(HDMI) then consider that
as secondary display or else consider DSI1 controller as
secondary always. This change takes care of this assumption.
Change-Id: Ia24c45de2af41144e76b102232b7481ca5c5acf2
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
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In the current implementation, DSI0/DSI1 device is always mapped
to frame buffer-0. For dual DSI configuration, we need to
register both the DSI devices to different frame buffers. Add driver
and dtsi support to register DSI device on primary/secondary
frame buffer at runtime based on the DSI configuration.
Change-Id: Iac872723711c5d0264088c4f3b53d1385fd9ffe0
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
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If timing db(Double Buffered) property is enabled, then MDP FLUSH
bit needs to be set in order to push the data to video interface.
Currently this property is used as a shared property for both DSI
interfaces. But in case of chipsets where there is no FLUSH bit
defined for the secondary DSI interface, this will cause issue.
So moving the property to each controller specific instead of shared.
Change-Id: I25913867da41ca2fb2848ab96f5be5d9228a8f63
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
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MDSS client may want to reuse the pipe during
boot up which are currently in use. The pipe
allocation fails when these pipes are in handoff
state and atomic API tries to reallocate them.
Moving them to used list allows client to reuse
them at early stage without waiting for first valid
kickoff.
Change-Id: Ia6f1282ea192e3a0e948488ba833c2580bebb9bf
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Add sysfs node to trigger cable disconnect/connect hot plug
interrupts. Power off 5v regulator which provides 5v to sink
which in turn pulls hpd line low resulting in disconnect hot
plug interrupt. Similarly, power on 5v regulator to get connect
hot plug interrupt. This is needed to simulate cable connect
and disconnect for some special requirements like resolution
switch from the user applications.
Change-Id: I882358ddb40acf07a5e7be692aac590880e012c2
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
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During dynamic resolution switch update the DSI PHY timings
for panel based on the new porch values. Also calculate the
new frame rate as per new porch values.
Change-Id: I683bf1255c77a2575567847cef5edcfb5529b69d
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
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Add support to check for change in panel video timing
parameters when DSI controller is used for a pluggable
interface.
Change-Id: Ia7ff6b3adf778283c1fc893f2c2eb4335ae4dd68
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
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Invalid memory access during vbif debug bus
dump in log leads to crash. This adds null
check before accessing debug bus memory.
Change-Id: I54b74ce1004c4246398f18cd1a262e29a0a20d20
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Rotator modules uses the buffer but does not set the
correct state. Configure the buffer state, alloc time,
free time, data planes to provide valid information
during debugging.
Change-Id: I7e0942699abfbd3a4be9c531a6174cdc917b22a4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Reset backlight before blank to prevent backlight from
enabling ahead of unblank. For some special cases like
adb shell stop/start.
Change-Id: I417b47f95ef804a156779cf696e6e610cff9f059
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
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If control setup is not done and if userspace calls misr set
via metadata ioctl, then there can be a potential NULL pointer
deference as mixer might be NULL. Add a check to validate if
mixer is not NULL.
Change-Id: I92f5778788cfcce6fa01a038b4321222a8804f28
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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Create virtual wb mixers to support rotation, if no matching
mixers are available in the model. The number of virtual mixers
is equal to the number of DMA pipes available for rotation.
Change-Id: I3f4df3175595168d55373eb91e5cd05ef5f65919
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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HW recovery is triggered when underrun happens. If pipe
XIN halt status is checked during the recovery time frame, it
would fail as the hw is in the recovery process. Check for the
ctl reset status before every frame update and if it is set,
add the same polling mechanism used while sw reset is triggered
to ensure hw reset is complete before checking the pipe status.
And add panic if hw fails to recover within the max polling time.
Change-Id: Ia672195b519e76bc4560d4555222c26fde094a64
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
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If HDMI is configured as non-pluggable, enable the HPD by default
in order to bring up full HDMI functionalities.
Change-Id: Ibbe3b55c5eb93b055455ab461cea11b73a1b514d
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
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Panel status check returns the current state based
on esd status check method. If esd method is not configured
then it returns panel dead which is misleading. This change
returns panel status alive if esd method is not enabled or
esd check callback is not registered for certain method.
Change-Id: I5df21df16618cd62b5d1495982ff889ed53ce31b
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Enabled QPIC display support by stubbing out MDP specific
functions. Fixed compile errors by removing obsolete
include files.
Change-Id: Ibd0159bd530dcef69848a93ad2dd302d58dbc447
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
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Add ftraces to dsi panel on and panel off to get better profiling
data during suspend and resume cases. This delay would be varying
depending upon the panel and so the data would be helpful in
isolating panel related delays.
Change-Id: I16ca90ee7968a57b4f56462b0a00a31a145524b5
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
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Non-secure pipe should not be staged on MDSS when
secure display session is in progress. Client has
to unstage all pipes to disable the secure session
before pushing non-secure layers on MDP. This change
updates the validation checks to avoid such conditions.
Change-Id: I626c6c3a5ef313b1af8369884a9b10d8586f7251
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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In the current composition cycle, if the staging params are
not changed, then currently MDP flush register is not configured.
But due to any unforeseen reason if MDP fence timeout happens then
to handle it gracefully we stage border fill. In this regard as
the mixer config has now changed, then ctl flush has to be set.
Change-Id: I24b9cb28426f8829ac3bb36bfa32859b588d06fd
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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Max threshold Bandwidth selection logic should be independent of
number of entries in max bandwidth limit DT property. Correct the
logic to make it independent.
Change-Id: I6510ad7095560b25bbada7c63c44ae88a6d955f1
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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Currently per pipe bandwidth limit implementation takes
care of only HFLip and VFLip case. Make it generic such
that it takes care of Camera usecase as well.
Change-Id: I6642bdb0611aa973a7563df019bf2dcdd5e4e584
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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During irq_disable, mdp_lock is held and intr status is checked and
cleared if any. If a new irq is triggered from another CPU at the
same point, it would ideally be waiting on mdp_lock held by the other
CPU. And when the mdp_lock is released after clearing the irq, mdp_isr
is executed and at this point, clks might have been disabled. To avoid
it, protect the clk_ena variable with mdp_lock and also check for the
clk_ena status and skip irq handling when it is disabled.
Change-Id: Ic71d2b6f877ca3510a0d0fa593a8a0c17e93d8f3
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
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In case of independent dual DSI configuration, the GLBL_TEST_CTRL
register for both the DSI PHY should be set to 1. This change adds
proper check to handle this case.
Change-Id: I6c16c1a359541ea0d3c5430a331f47b55e4bd8cc
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
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Current code does not reflect the correct panel information
when user space request the panel info and fps data
after the fps update when using the clock method.
This change fixes the code, so further calls to get
the screen info have the correct panel data, as it
is done for vfp method already.
Change-Id: I2cae33cad02f43a9b887c8bdc55aca876e47a99a
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
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Set the GPIO based on the flag parsed from DTSI. To enable the
switch gpio set the flag and to disable set inverse of the flag.
Change-Id: Iddbe654f2cc6c7e2c5815798099f88d2154d76d5
Signed-off-by: Siddharth Zaveri <szaveri@codeaurora.org>
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On smart panels, Early Clock Gating (ECG), is initiated when current
frame transfer is finished and no new frame update is queued. To track
these two different states, driver maintains the state machine
for HW transfer and SW's new frame update. Currently SW state machine is
cleared only after HW transfer has started. Now in normal scenarios SW
state should be cleared before HW is finished and if there is no new
frame update queued then ECG will be initiated. However due to CPU
scheduling, thread that needs to clear SW state got preempted. In the
meantime HW finished the transfer and updated its state machine in the
interrupt context. Since at this moment SW state wasn't cleared, ECG
was not initiated. Avoid this situation by clearing SW state before HW
transfer is started.
CRs-fixed: 941832
Change-Id: I44828c6077eb8729162127b521f4fd4add2e3bcb
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
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It is possible to change the refresh rate of the panel by
changing the byte clock and pixel clock to the required panel supported
frequency. This change adds support to program dynamic refresh
registers and trigger the dynamic refresh interrupt. Once the current
frame is done, hardware ensures that the change in clock frequency is
taken effect within the vertical blanking period.
Change-Id: I3a1e0eb478c34111e94f977088c20e9a50c4ef25
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
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vsync_handler added in lp2 (doze_suspend) power
state enables the vsync on hardware. That can lead
to unclocked register access because device can go
in pm_suspend in this power state. This change blocks
the vsync_handler processing in lp2 power state.
Change-Id: I4386baa6bc2f8303928edade79108b4983f66f42
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Expose the bandwidth limits and status of bandwidth
limit request to the userspace through sysfs entries.
Change-Id: I697138546689e8d9943c3e5ff47ae6a924b8ddfb
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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The vsync_retire worker registers for vsync_handler and
removes it when client requests power_off. It may
possible that vsync_handler is removed from list
through two different contexts. One from worker thread
and other from ctl_stop_sub call. Such race condition
can lead to list corruption. Ideally, ov_off should
wait for retire worker flush before calling ctl_stop
to avoid such race condition.
Change-Id: I7d68d67d1fe1df07e568a5f40db745ce155d7d14
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Save mdp/rotator buffers' smmu domain and DMA
direction information for debugging purpose.
Change-Id: Ica05a90e7a139e8d2259f669530aea75d86c93e9
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Add sysfs node s3d_mode for stereo 3d support,
configure vendor info frame when 3d mode is set and
current video mode can support it. Output edid_3d_modes
in sysfs node in correct format.
Set 1 to s3d_mode will enable side by side, 2 for top
bottom, 3 for framepacking, 0 for 2d.
Change-Id: I634da4ffbd4e7994113d805c3c8facef3c9a5a25
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
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Disable idle pc during unblank, because LPM could introduce
big delay from waiting for DSI DMA.
Change-Id: Id11bf3f3015fa1ea4b22d1e1c2abd380cd8b65a2
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
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Enable OPTMIZE_FOR_SIZE for msm-perf_defconfig and
also fix the forbidden warning found during the compilation.
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
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Unset the HPD state on receiving a suspend event, and ignore
any HPD interrupts that are signalled while panel is in a
suspended state.
Change-Id: I21955079522e0688cd4cee17dae32f5e6d8496ab
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
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The step version is different between msm8996 and msm8937 even
though the major/minor versions are the same. Update the DSI PHY
and clamp register programming for msm8937 by checking for the
step version to avoid incorrect DSI register programming.
Change-Id: Ia9582b2779f40429586e8709bb73c9a5c79bd6c5
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
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Simultaneous buffer maps with read and write permissions are
possible due to the asynchronous nature of MDSS driver.
Client stages the same buffer on MDP & ROTATOR. It calls the map
API for both at the same time. Due to concurrency, the source buffer
is mapped by MDP before and is ref-counted. ROTATOR API called later never
updates the permission which is required for dst buffer.
This leads to permission fault. Requesting the map with DMA_BIDIRECTIONAL
flag to fix the issue.
Change-Id: Ieb819820b19d163fee541dd571c5a58dc78be7d3
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
[cip@codeaurora.org: Resolved merge conflict]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
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Fix compilation issues with unsigned division. Also build
errors are seen for 32bit compilation as local variable of
mdp_overlay in function mdss_mdp_overlay_get_fb_pipe has
huge size which crossing the 1024 limit. Use heap instead
of stack in this case to fix the issue.
Change-Id: I67e8498421d2e116e77076637716708cfc289c96
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
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unify smmu probes for qsmmu and arm smmu since most of
the functionality is common.
Change-Id: I2a3ef5c95bf0008d9e1869decb25d7e3043a0786
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
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Display Steam Compression (DSC) use-cases requires parameter calculations
that affect MDP and DSI separately. Current implementation is not modular
and calculates all the parameters in one big subroutine. Due to this, an
issue has occurred where parameters that affect DSI relies on picture
width where as DSI parameters should be calculated only based on
uncompressed width to a particular DSI controller.
Also current MDP driver tries to service DSC setup for all different
topologies in a single subroutine and has become very error prone.
Modularize MDP DSC setup so that it is easy to maintain and also add
support for partial update for 4K DSC split-panel.
Change-Id: I7057e6a5a22a72a9a216e5bc9f7f946675bfbbb8
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
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MDSS software should trigger frame timeout when command mode
interface recovery is in progress. After this new place for
event, there is a small window where wait4pingpong and recovery
path both can trigger this event. Use atomic_add_unless api
instead of read and dec so that it would add protection and
avoids timeline update multiple times for same frame update.
Change-Id: I412c6341ac4d547acde914409481e9b57b2b88f2
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Adding initialization of appropriate flags related to QoS
and UBWC settings in MDSS capabilities for msm8937.
Change-Id: I16aaf0dd39ce6150183f9b71d4573fdbad62a1da
Signed-off-by: Krishna Chaitanya Devarakonda <kdevarak@codeaurora.org>
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During kernel boot up, the splash memory is unmapped and released
at the beginning of first display commit during overlay start. By this
time, MDP will not start fetching the new buffers that are queued as part
of first commit. This can cause IOMMU page faults on the splash memory
since the buffer is unmapped but IOMMU is attached as part of overlay
kickoff. Hence, perform splash cleanup after waiting for a vsync
during kickoff cycle.
Change-Id: I0b6656f1cc2be9d96fd29e92b99b5aaed94eeb54
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
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Modify the Rotator and WFD OT setting as per recomendations
from systems team.
Change-Id: Ic523230ff0343bbac6c001080cce88acda4b3c7e
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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Add support to configure pluggable feature through device tree,
but not hardcode inside driver.
Change-Id: I1aaf8a65c1910e22bdaf678d0d02d7fe791937bf
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
[cip@codeaurora.org: Resolved merge conflict]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
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For PHY v2, the phy timing structure is different than PHY v1.
This change updates the phy timing structure with the latest
calculated PHY timing parameters for the given panel and refresh
rate.
Change-Id: Ibed32af5578a6dea5eb0f77d3bd0f102db6161dd
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
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The doze_suspend and stop state resets the
recovery handler. It is required to register it
again in doze mode because there can be frame
update in this power state.
Change-Id: I1bef7cdd63f21698aca18d326074ac3a0e4e5de4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Use busy wait while waiting for DDC read and write to complete.
Using completion APIs to wait can result in thread to schedule
and waking up the thread back can cause a delay of 30 - 40 ms
or more. HDCP 2.2 authentication protocol uses some strict
timeouts and can be as low as 20 ms. Avoid any possible
scheduling and use busy wait to complete the DDC transactions
within allowed time.
Change-Id: I1c12d594a6e1e671fbaa4d197e375070deedc78d
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
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Add pluggable information into panel info to let other modules
know that this interface supports HPD (Hot Plug Detect) and can
be dynamically connected or disconnected.
Change-Id: I8322b60c337cd2f46a4a500ad1a6083875f6206b
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
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