| Commit message (Collapse) | Author | Age |
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V3 version of mdss dither block has been moved from dspp to
ppb. Based on mdss revision the driver should enable the dither block in
dspp/ppb. Change enables driver to handle dither block in ppb.
Change-Id: Iaa11755b46417db1e2a12cb2f2b6028cd7530c0b
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Signed-off-by: Ping Li <pingli@codeaurora.org>
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Smmu context fault handler provides the fault iova
information but does not provide any information about
xin client. This patch registers the context fault
handler in MDSS software to get the vmid/xin client
information. It also dumps the registers for source
associated with respective vmid client
Change-Id: I2a833a4b5e81e36f4d7af23a3968c9755424b7a7
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Update the state of any power modules that are enabled during
the probe when HDMI is the primary panel and continuous splash is
enabled. This allows the HDMI transmitter core to correctly power
on/off modules during states transitions such as those associated
with runtime suspend and resume.
Change-Id: If2f4fb5837c0a0a380d95be8292b8d5064eaec0f
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
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Send the FB registered event before initializing MDP in order to
allow the panel driver to complete any internal initialization
before MDP operations begin. For example, in the case of HDMI
panels, this will ensure that the Hot Plug Detection (HPD)
circuitry is enabled and that the HDCP libraries are loaded
before data is transmitted on the link.
Change-Id: Icbf1e0abb937d4196677aa896a5386fbaa8ae034
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
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Enable scrambler during handoff scenarios in which there is no
resolution switch from the bootloader to the kernel. Furthermore,
power on the HDMI core before enabling the scrambler to ensure
that there is a smooth transition during the handoff without any
temporary blinks on the panel.
Change-Id: I94dde166dabf2b3260b6cae34bfcdf0e99fe4112
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
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Do not toggle the power for HDMI modules during continuous splash
since the power would have been enabled in the bootloader.
Toggling power during handoff can leave the core in a bad state
especially when scrambling is enabled for 4K HDMI modes.
Change-Id: I8279b8933386db184ed2c627cef928321cbc3eea
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
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Add a method to convert panel event enumerations to actual event
names in order to aid in debugging.
Change-Id: Iffdf3b974ceaf0cade50d0589a2d5014136fbd69
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
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NULL pointer derefernce can happen with variable pipe
struct during pipe intialization. Fix this to add a
check for NULL pointer.
Change-Id: I3241ed89979deb777ca62d0c893afb96926820ee
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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Stale configs are left in layer mixer, when switching between
single/dual mixers. This might cause unexpected issues later.
Reset the configs during wfd destroy, so that it will have clean
LM configs for the next setup.
Change-Id: I3cd3699af1aa63b12e43a9d53ac505235b668e98
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
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Fix bit offset in picture parameter set configuration
in dsc based on spec.
Change-Id: I244ad4b1ae3936f4362d6b85f04985a611b82d99
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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There might be a race condition where the early wake-up work item gets
preempted for the stop call when the resource state is already set to
off by the early wake-up. In this condition, the stop call clears the
ctx, leading to issues when the early wake-up work item runs again since
the ctx is not valid any more. Fix this condition by making sure that
stop call always waits for the early wake-up work item to finish.
Change-Id: I64aba71bb4c5602df9a524b77bd8bf3296dda012
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
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In AD driver, the AD lock and mdp clk lock are acquired in different
sequences which causes deadlock. This change fixes the issue by
modifying the mutex lock acquiring sequence to always acquire the
mdp clk lock before the AD lock.
Change-Id: I3aa62bf78d296cb68b10013a24816e7016acab65
Signed-off-by: Ping Li <pingli@codeaurora.org>
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Some panel don't require backlight to be updated during
unblank and only require update upon first commit. Add
support to update the backlight based on panel specific
property.
Change-Id: I43f33505be5151640ad7dc2ee1a14df8a55a6dfe
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
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Remove write-back and rotator related obsolete code in order to reduce
dead code maintenance.
CRs-Fixed: 987777
Change-Id: I917d9b5b777fb41f3f87213d8d9e6e7ddf73f92c
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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Add the initialization and shutdown programming sequence for the DSI PHY
v3 which is used on msmcobalt. This includes configuring the phy lane
timings, strength control, and regulator settings.
CRs-Fixed: 1000724
Change-Id: I6a8d45ef71316b5a935a711a5b0a48c055c1c392
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
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Add PHY timing calculation support for v3 PHY used on msmcobalt.
This needed to program the DSI PHY to drive the link at a specific
link rate based on the DSI panel configuration.
CRs-Fixed: 1000724
Change-Id: I180af3544c111cb9f491ea9fb77638beece8299c
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
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Refactor the DSI PHY timing calculations for v2 PHY. This will make things
easier when support has to be added for new revisions.
CRs-Fixed: 1000724
Change-Id: Icd99a3b29feddc64e42a2b4a18987579b7f52e77
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
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DSI controller version 2.0 and above require configuring an additional
link clock called the byte interface clock which is used to drive all
high-speed PPI signals. Add support to configure this clock.
CRs-Fixed: 1000724
Change-Id: I907823b21ad2c6152899233fc52f38d17bcc5ed1
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
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For certain board configurations, the enable port on display
connector card needs to be controlled via LCD mode selection
GPIO. For example, for DSC/single DSI mode, the GPIO needs to
be driven high and for non-DSC/split DSI mode, the GPIO
needs to be driven low. Add support for this.
CRs-Fixed: 1000724
Change-Id: I3546fc2b5dacd77e9d2cd2ea843481dc34bfef54
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
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For split-DSI hardware configuration, both the DSI controller clocks are
sourced from a single PLL (clock-master). In such cases, it is important
to initialize both DSI0 PHY and DSI1 PHY prior to enabling the PLL.
This is due to the fact that for certain HW versions, PLL programming
for the clock-master may require configure some PLL registers on the
clock-slave. If the PHY init sequence for the clock-slave is called
after PLL is programmed, it could reset those PLL registers leading to
unexpected behavior. Fix this by ensuring that PHY init sequence is done
for both controllers at the same time for split display usecases.
CRs-Fixed: 1000724
Change-Id: I09fb8097d31cd0390cea5c32bb7aabceeff2c37e
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
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Newer versions of the DSI phy do not require any programming of the lane
regulator settings. Make this binding an optional property for the DSI
device node.
CRs-Fixed: 1000724
Change-Id: I696aab348cdb04db4068b2b62bcd049c839cbc33
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
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The default configuration for AD config_buffer_mode register is correct
for dual DSI case, but not for single DSI case. This change correctly
set the AD config_buffer_mode for single DSI case.
Change-Id: I8b1b665e027e925d607fda078cc453a5406f85ea
Signed-off-by: Ping Li <pingli@codeaurora.org>
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This merge brings all display changes from msm-3.18 kernel
* (58 commits)
msm: mdss: add support for additional DMA pipes
msm: mdss: refactor device tree pipe parsing logic
msm: mdss: refactor mixer configuration code
msm: mdss: add support for secure display on msm8953.
msm: mdss: disable ECG feature on 28nm PHY platform
msm: mdss: send DSI command using TPG when in secure session
msm: mdss: Update histogram and PA LUT in mdss V3
msm: mdss: validate layer count before copying userdata
msm: mdss: Fix potential NULL pointer dereferences
Revert "msm: mdss: Remove redundant handoff pending check"
msm: mdss: hdmi: Do not treat intermediate ddc error as failure
msm: mdss: revisit igc pipe enumeration logic
msm: mdss: Add PA support for mdss V3
msm: mdss: Add support for mdss v3 ops
msm: mdss: Update the postprocessing ops using mdss revision
msm: mdss: update the caching payload based on mdss version
msm: clk: hdmi: add support for atomic update
msm: sde: Add v4l2 rotator driver to enable multi-context usecase
msm: mdss: refactor pipe type checks
msm: mdss: add proper layer zorder validation
msm: mdss: stub bus scaling functions if driver is disabled
msm: mdss: avoid failure if primary panel pref is not enabled
msm: adv7533: add support for clients to read audio block
msm: mdss: add lineptr interrupt support for command mode panels
msm: mdss: update rotator frame rate in the pipe configuration
mdss: msm: Avoid excessive failure logs in igc config
msm: mdss: delay dma commands for split-dsi cmd mode panels
msm: mdss: enable GDSC before enabling clocks in MDP3 probe
mdss: dsi: turn off phy power supply during static screen
mdss: dsi: read dsi and phy revision during dsi ctrl probe
msm: mdss: Fix memory leak in MDP3 driver
msm: mdss: delay overlay start until first update for external
msm: mdss: free splash memory for MSM8909w after splash done
msm: mdss: hdmi: separate audio from transmitter core
msm: mdss: disable dsi burst mode when idle is enabled
msm: mdss: remove invalid csc initialization during hw init
msm: mdss: dsi: increase dsi error count only for valid errors
msm: mdss: remove HIST LUT programming in mdss_hw_init
msm: mdss: dsi: ignore error interrupt when mask not set
msm: mdss: add support to configure bus scale vectors from dt
msm: mdss: unstage the pipe if there is z_order mismatch
msm: mdss: squash MDP3 driver changes and SMMU change
msm: mdss: Read the bridge chip name and instance id from DTSI
msm: mdss: Enable continuous splash on bridge chip
msm: mdss: Fix multiple bridge chip usecase
msm: mdss: Enable export of mdss interrupt to external driver
msm: mdss: rotator: turn off rotator clock in wq release
msm: mdss: fix ulps during suspend feature logic
clk: msm: mdss: program correct divider for PLL configuration
msm: mdss: fix DSI PHY timing configuration logic
msm: mdss: hdmi: add support for hdmi simulation
msm: mdss: handle race condition in pingpong done counter
clk: qcom: mdss: calculate pixel clock for HDMI during handoff
msm: mdss: ensure proper dynamic refresh programming for dual DSI
msm: mdss: Add fps flag and update blit request version
msm: mdss: initialize fb split values during fb probe
mdss: mdp: fix rotator compat layer copy
msm: mdss: handle DSI ctrl/PHY regulator control properly
CRs-Fixed: 1000197
Change-Id: I521519c8abe8eed6924e2fbe3e1a026126582b77
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
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Enable UBWC format for writeback output buffers in applicable
target devices.
CRs-Fixed: 979566
Change-Id: Ibbfaf9f1c314f44d76f4739ed64562861b26c4be
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[dkeitel@codeaurora.org: fixed minor whitespace conflicts.]
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
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Fix fb null check in framebuffer driver during
atomic API call.
Change-Id: I2b92cba0d106ce00dc94faa09b5c0cc869fd1678
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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To support new v4l2 rotator driver, rotator smmu domains in
MDSS driver will be enabled based on device tree boolean setting.
This allows smmu to be associated with MDSS driver or external
rotator driver for MDS block, such as 3.0.0 onward, with a
separate rotator block, or for MDSS block, pre 2.0.0, with
built-in writeback rotator.
CRs-Fixed: 973961
Change-Id: I68ac7b1b89485d1ce46bdb1c1739c3306a7d7d89
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
[dkeitel@codeaurora.org: fixed minor whitspace conflict.]
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
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When dynamic refresh operation is under progress, it is sometimes
expected that the DSI h/w throws DSI FIFO underflow errors. Avoid
throwing DSI FIFO errors on console for this case. Just clear the
DSI error interrupt and do not trigger the DSI underflow recovery
process.
Change-Id: I03b8764397378104981c1a5a6e627e90f53222ee
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
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There can be a scenario where the DSI hardware finished the
dynamic fps operation and updated the DSI interrupt status
bit but the isr is not triggered. This is possible under
heavy system load where the interrupts are disabled by some
other thread on the CPU where MDSS IRQ is affined. Double
check the status of dynamic fps operation by reading back
the DSI interrupt status bit once the wait for interrupt times
out.
Change-Id: Iebe5ab3f6b43b4b3e61666a600488e8ce50f6995
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
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MDP driver calls add_event_timer multiple times, resulting
in creating multiple event timers. Due to this irqbalancer
changes MDP irq's affinity to different cpu. Ensure that
add_event_timer is added only once for MDP irq.
Change-Id: If0425ef5a3b3ce56c40da52ff3ced6658f05734a
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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Sending zero backlight to AD core will cause a divided by zero
case, which should be avoided. This change adds a check to
prevent zero backlight from been sent to AD core.
CRs-Fixed: 985303
Change-Id: Ida5115edc61dea9855be89186af3faae040fd711
Signed-off-by: Ping Li <pingli@codeaurora.org>
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Define all supported 10 bit RGB/YUV formats for linear/UBWC and set
the appropriate parameters for register programming.
CRs-Fixed: 984465
Change-Id: I37f55f76802bf295f2c48040843637e37663ca41
Signed-off-by: Ramkumar Radhakrishnan <ramkumar@codeaurora.org>
[dkeitel@codeaurora.org: fixed minor whitespace conflict.]
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
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Exhibit supported formats of all pipes and writeback block through
sysfs node of mdp capabilities.
CRs-Fixed: 984465
Change-Id: I1dc11268995e7f3d8efdc7d3e7cf3a1951ff44a5
Signed-off-by: Ramkumar Radhakrishnan <ramkumar@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
[dkeitel@codeaurora.org: fix minor conflict.]
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
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Msm cobalt mdss pipeline supports 10 bit color space conversion.
Change adds support to enable 10 bit csc block.
CRs-Fixed: 984465
Change-Id: Ib859ade710b9cb6dc5565548db6f531c84f3bc5a
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
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Msm cobalt has newer version of mdss block which supports qseed3 module
which is needed for scaling, sharpening. Change adds support for qseed3
on msmcobalt.
CRs-Fixed: 982712
Change-Id: Ibee9b270d483928dce1836f085785acbb8a1947b
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
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MSM cobalt mdss hardware block supports Qseed3 module which provides
functionality of scaling, sharpening. Change adds support for exposing
the block to user-space clients.
CRs-Fixed: 982712
Change-Id: I7a74566a527285aba313321a59bc17dd362e84ff
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
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msmcobalt support newer version of mdss hardware. Change adds support to
mdss driver to handle newer mdss version and capabilities of this version.
CRs-Fixed: 979566
Change-Id: I5f8fe54547e808233ac9873aeeaa36455b2b01e8
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
[dkeitel@codeaurora.org: fix minor conflict in documentation.]
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
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Fix to restore the ping pong split configuration
after power collapse.
Change-Id: I9109081cbde941b55ee889707bda35af7d303cf0
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
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Prevent driver from disabling the tear check when
going to LP1 state. This is needed for certain
panels in cases where there are more than one
frame update in LP1 state.
Change-Id: Ib80f06e0609d9d49584118504adf87da44455563
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
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Commit 0717dcb898a085f863f65252d1ceec4e026e1183 ("uapi:
msm: mdp: Add color space in mdp_input_layer") adds
the csc params member on input layer but does not
pass the same configuration to sspp pipes. Post
Processing module will select the default CSC table
without this configuration.
The CSC configuration on MDSS hardware is not double
buffered. This needs additional input layer validation
check against CSC reconfiguration on staged pipes.
Change-Id: I3e6ea00fc426501cbbbeffa4545ed9cff711dcb4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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frame buffer allocated in recovery mode is not mapped for MDP3 pan display
control path resulting in IOMMU fault. Add mdss_smmu_map_dma_buf call in
mdp3_ctrl_pan_display and use mapped virtual address for DMA.
Change-Id: I4d37ccb86eaea4690862bef76ee3762ff952892a
Signed-off-by: Sachin Bhayare <sachin.bhayare@codeaurora.org>
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DSI software does not wait for MDP_DONE ISR
before sending new frame if burst mode feature is
enabled. It leads to race condition in below case
* MDP kicks off frame-N and mdp_busy sets to true
* MDP receives new frame-N+1 and waits for
PP_DONE interrupt before sending N+1 frame.
* MDP receives PP_DONE interrupt and kicks off
frame-N+1 (DSI_MDP_DONE interrupt is not received yet).
* Frame-N+1 kickoff sets the mdp_busy wait to true.
* DSI receives DSI_MDP_DONE interrupt for frame-N and
reset the mdp_busy to false.
* Any clock off call can turn off the clock at this moment.
DSI software must always execute busy_wait when kickoff
happens from mdp. That avoids the busy wait race condition.
Change-Id: I462cd5ad21d6ccc08dfb862e98fd6fafeef686d4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Retrieve and load the HDCP keys before starting authentication so
that HDCP internal state machine can be initialized completely on
cable connection to avoid possible authentication failures.
Change-Id: I873fb02589bb6c19938743d44dc56ed1cfff7260
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
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The LP1 and LP2 flags must be swapped to be in accordance
with the old HAL mapping used by MDP3 driver.
Change-Id: Id4b0b41d102f9aef2836901b2bea5e961ec0962b
Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
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After commit dbe80b7cc96a1f3f23246552fbd2352f334fa857 ("ARM: dts: msm:
remove gpio output settings in dsi pinctrl") driver is no longer
defining in the pinctrl the gpios as output high configuration;
so driver now has to explicitly configure gpio output direction.
This change add the settings in the driver to configure the gpio
as output pin, fixing panel issues when booting-up with
continuous splash disabled.
Change-Id: I1ac3c5dd07cff4a30cce9de3c340f071dd84d49a
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
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This change adds support to read HPD state from sysfs node,
which will be helpful in automated test cases where multiple
HPD operations are performed on HDMI TV.
Change-Id: I39d19447c01d11a54a8e54c661b2dd177310c205
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
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In simulator panel SW-TE approach, we rely on the sync config
height, init, start_pos and read ptr TE parameters. Set start_pos,
init and read ptr with respect to panel yres, as it is done in
the default settings when it is used with an actual panel.
Setting these parameters with respect to 0 causes fps drops.
Change-Id: I9acf4d1558767e7789a5e37dc2444f947d11eb21
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
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The memory color values for the left and right hold of foliage were
incorrectly returning the values for sky. This change fixes the foliage
hold values that will be returned during read.
CRs-Fixed: 968059
Change-Id: Ib5c2ae9b8fbe8817d730104ace88f20f04b59d17
Signed-off-by: Benet Clark <benetc@codeaurora.org>
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This change add a sysfs node to enable the misr crc generation
in batch mode. Once this is enabled, driver will collect the
crc numbers during each of the interfaces interrupt,
vsync interrupt for video mode panels and ping pong done
for cmd mode panels.
To enable/disable the crc generation, respectively:
echo 1 > /sys/class/graphics/fb0/msm_misr_en
echo 0 > /sys/class/graphics/fb0/msm_misr_en
To collect the last crc generated:
cat /sys/class/graphics/fb0/msm_misr_en
To enable the ftrace to collect the crc for all frames:
echo 1 > <debugfs>/tracing/events/mdss/mdp_misr_crc/enable
CRs-Fixed: 964076
Change-Id: I47fb47b772aef097bc9af3b58a6c79565bcdc872
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
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Set the correct offsets of the MISR for command mode
interfaces in 8996.
CRs-Fixed: 964076
Change-Id: I90c7fa1ff144ae547cc0537421211a73051f1036
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
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Expose pingpong split info to userspace via sysfs. This info
can be used to do ROI alignment for Partial update use cases.
Change-Id: Ifb165944b1725f4299e34068b67926785def032c
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
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