| Commit message (Collapse) | Author | Age |
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Being a soft core, it can be located not only on PPC or Microblaze
platforms.
Since the driver already does endianness detection we only need to
change the Kconfig to use it in other arches.
This is also done in other softcores as xilinx-spi.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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SysRq support activation depends on CONFIG_SERIAL_STM32_USART_CONSOLE, but
this config flag does not exists.
This patch fix this by depending on the valid config flag, which is
SERIAL_STM32_CONSOLE.
Reported-by: Andreas Ruprecht <andreas.ruprecht@fau.de>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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While UART work in DMA mode, function start_rx will request descriptor
from DMA engine, if there is no left descriptor UART, driver will give
err logs "DMA slave single fail".
currently start_rx is called in set_termios function, so everytime, port
setting will call start_rx once.
Now put start_rx in startup, it will be called once while open the port.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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when UART works in DMA mode and left bytes in rx fifo less than
a dma transfer unit, DMA engine can't transfer the bytes out
to rx DMA buffer. so it need a way to fetch them out and
flush them into tty buffer in time.
in the above case, we want UART switch from DMA mode to PIO mode and
fetch && flush bytes into tty layer buffer until rxfifo become empty,
after that done let UART switch from PIO mode back to DMA mode.
(record as method1)
method1 result in the next receive result wrong. for example in PIO part
of method1, we fetched && pushed X1...X3 bytes, when UART rxfifo newly
received Y1...Y4 bytes, UART trigger a DMA unit transfer, the DMA unit's
content is X1...X3Y1 and rxfifo fifo status is empty, so X1X2X3 pushed
twice by PIO way and DMA way also the bytes Y2Y3Y4 missed. add rxfifo
reset operation before UART switch back to DMA mode would resolve the
issue. ([method1 + do fifo reset] record as method2)
before the commit, UART driver use method2. but methd2 have a risk of
data loss, as if UART's shift register receive a complete byte and
transfer it into rxfifo before rxfifo reset operation the byte will
loss.
UART and USP have the similar bits CLEAR_RX_ADDR_EN(uart)/FRADDR_CLR_EN(usp),
When found UART controller changing I/O to DMA mode, UART controller
clears the two low bits of read point (rx_fifo_addr[1:0]).
when enable the bit + method1(record as method3), in above example
the DMA unit's content is X1...X3Y1 and there are Y2Y3Y4 in rxfifo by
experiment, we just push bytes in rx DMA buffer.
BTW, the workaround works only for UART receive DMA channel use SINGLE
DMA mode.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The implementation of cris_console_device() is exactly the same as
uart_console_device(), so let's switch to use uart_console_device().
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Niklas Cassel <nks@flawful.org>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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OMAP h/w-assisted IXON flow control is borked. The transmitter becomes
stuck if XON is never received; clearing the fifos or resetting the
rx flow control bits has no effect.
Remove auto-IXANY as well, since without auto-IXON, it has no purpose.
Signed-off-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Due to Advisory 21 as documented in AM437x errata document,
UART module cannot be disabled once DMA is used. The only
workaround is to softreset the module before disabling it.
DRA7x UARTs are compatible to AM437x UARTs in terms of
this errata and prescribed workaround.
Enable usage of workaround for this errata on DRA7x SoCs.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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AM335x, AM437x and DRA7x SoCs have an errata[1] due to which UART
cannot be idled after it has been used with DMA.
OMAP3 has a similar sounding errata which has been worked around
in a2fc36613ac1af2e9 ("ARM: OMAP3: Use manual idle for UARTs
because of DMA errata"). But the workaround used there does not
apply to AM335x, AM437x SoCs.
After using DMA, the UART module on these SoCs must be soft reset
to go to idle.
This patch implements that errata workaround. It is expected that
UART will be used with DMA so no explicit check for DMA usage
has been added for errata applicability.
MDR1 register needs to be restored right after soft-reset because
"UART mode" must be set in that register for module wake-up on AM335x
to work. As a result, SCR register is now used to determine if
context was lost during sleep.
[1] See Advisory 21 in AM437x errata SPRZ408B, updated April 2015.
http://www.ti.com/lit/er/sprz408b/sprz408b.pdf
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Use of of_machine_is_compatible() for handling AM335x specific
"DMA kick" quirk in 8250_omap driver makes it ugly to extend the
quirk for other platforms. Instead use a new compatible.
The new compatible will also make it easier to take care of
other quirks on AM335x and like SoCs.
In order to not break backward DTB compatibility for users of
8250_omap driver on AM335x based boards, existing use of
of_machine_is_compatible() has not been removed.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The silicon errata[1] workaround implemented in a follow-on
patch, "serial: 8250_omap: workaround errata on disabling
UART after using DMA", requires MDR1 register programming.
Extract MDR1 register update into helper function,
omap8250_update_mdr1() to help with that.
[1] Advisory 21 in http://www.ti.com/lit/er/sprz408b/sprz408b.pdf
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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omap_device infrastructure has a suspend_noirq hook which
runtime suspends all devices late in the suspend cycle (see
_od_suspend_noirq() in arch/arm/mach-omap2/omap_device.c)
This leads to a NULL pointer exception in 8250_omap driver
since by the time omap8250_runtime_suspend() is called, 8250_dma
driver has already set rxchan to NULL via serial8250_release_dma().
Make an explicit check to see if rxchan is NULL in
runtime_{suspend|resume} hooks to fix this.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Fintek chip can be configured for io addresses different than the standard.
Query the chip for the configured addresses and try to match it with the
pnp address.
Reported-by: Peter Hong <peter_hong@fintek.com.tw>
Reviewed-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Chip can be configured to use entry key different than 0x77. Try all the
valid keys until one gives out the right chip id.
Reported-by: Peter Hong <peter_hong@fintek.com.tw>
Reviewed-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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There are some chips with the same interface but different chip ip.
Reported-by: Peter Hong <peter_hong@fintek.com.tw>
Reviewed-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Fintek chip can be connected at address 0x4e and also 0x2e.
Add some logic to find out the address of the chip.
Reported-by: Peter Hong <peter_hong@fintek.com.tw>
Reviewed-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Save the port index and the line id in a private structure.
Reported-by: Peter Hong <peter_hong@fintek.com.tw>
Reviewed-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late fixes and dependencies from Kevin Hilman:
"This is a collection of a few late fixes and other misc stuff that had
dependencies on things being merged from other trees.
Other than the fixes, the primary feature being added is the
conversion of some OMAP drivers to the new generic wakeirq interface"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: multi_v7_defconfig: Enable BRCMNAND driver
ARM: BCM: Do not select CONFIG_MTD_NAND_BRCMNAND
ARM: at91/dt: update udc compatible strings
ARM: at91/dt: trivial: fix USB udc compatible string
arm64: dts: Add APM X-Gene standby GPIO controller DTS entries
soc: qcom: spm: Fix idle on THUMB2 kernels
ARM: dove: fix legacy dove IRQ numbers
ARM: mvebu: fix suspend to RAM on big-endian configurations
ARM: mvebu: adjust Armada XP DT spi muxing after pinctrl function rename
serial: 8250_omap: Move wake-up interrupt to generic wakeirq
serial: omap: Switch wake-up interrupt to generic wakeirq
mmc: omap_hsmmc: Change wake-up interrupt to use generic wakeirq
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We can now use generic wakeirq handling and remove the custom handling
for the wake-up interrupts.
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We can now use generic wakeirq handling and remove the custom handling
for the wake-up interrupts.
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Pull MIPS updates from Ralf Baechle:
- Improvements to the tlb_dump code
- KVM fixes
- Add support for appended DTB
- Minor improvements to the R12000 support
- Minor improvements to the R12000 support
- Various platform improvments for BCM47xx
- The usual pile of minor cleanups
- A number of BPF fixes and improvments
- Some improvments to the support for R3000 and DECstations
- Some improvments to the ATH79 platform support
- A major patchset for the JZ4740 SOC adding support for the CI20 platform
- Add support for the Pistachio SOC
- Minor BMIPS/BCM63xx platform support improvments.
- Avoid "SYNC 0" as memory barrier when unlocking spinlocks
- Add support for the XWR-1750 board.
- Paul's __cpuinit/__cpuinitdata cleanups.
- New Malta CPU board support large memory so enable ZONE_DMA32.
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (131 commits)
MIPS: spinlock: Adjust arch_spin_lock back-off time
MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA
MIPS: BCM47xx: Simplify handling SPROM revisions
MIPS: Cobalt Don't use module_init in non-modular MTD registration.
MIPS: BCM47xx: Move NVRAM driver to the drivers/firmware/
MIPS: use for_each_sg()
MIPS: BCM47xx: Don't select BCMA_HOST_PCI
MIPS: BCM47xx: Add helper variable for storing NVRAM length
MIPS: IRQ/IP27: Move IRQ allocation API to platform code.
MIPS: Replace smp_mb with release barrier function in unlocks.
MIPS: i8259: DT support
MIPS: Malta: Basic DT plumbing
MIPS: include errno.h for ENODEV in mips-cm.h
MIPS: Define GCR_GIC_STATUS register fields
MIPS: BPF: Introduce BPF ASM helpers
MIPS: BPF: Use BPF register names to describe the ABI
MIPS: BPF: Move register definition to the BPF header
MIPS: net: BPF: Replace RSIZE with SZREG
MIPS: BPF: Free up some callee-saved registers
MIPS: Xtalk: Update xwidget.h with known Xtalk device numbers
...
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Introduce a driver suitable for use with the UARTs present in
Ingenic SoCs such as the JZ4740 & JZ4780. These are described as being
ns16550 compatible but aren't quite - they require the setting of an
extra bit in the FCR register to enable the UART module. The serial_out
implementation is the same as that in arch/mips/jz4740/serial.c - which
will shortly be removed.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: linux-serial@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Peter Hurley <peter@hurleysoftware.com>
Cc: Alan Cox <alan@linux.intel.com>
Cc: linux-kernel@vger.kernel.org
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: John Crispin <blogic@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/10159/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial driver updates from Greg KH:
"Here's the tty and serial driver patches for 4.2-rc1.
A number of individual driver updates, some code cleanups, and other
minor things, full details in the shortlog.
All have been in linux-next for a while with no reported issues"
* tag 'tty-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (152 commits)
Doc: serial-rs485.txt: update RS485 driver interface
Doc: tty.txt: remove mention of the BKL
MAINTAINERS: tty: add serial docs directory
serial: sprd: check for NULL after calling devm_clk_get
serial: 8250_pci: Correct uartclk for xr17v35x expansion chips
serial: 8250_pci: Add support for 12 port Exar boards
serial: 8250_uniphier: add bindings document for UniPhier UART
serial: core: cleanup in uart_get_baud_rate()
serial: stm32-usart: Add STM32 USART Driver
tty/serial: kill off set_irq_flags usage
tty: move linux/gsmmux.h to uapi
doc: dt: add documentation for nxp,lpc1850-uart
serial: 8250: add LPC18xx/43xx UART driver
serial: 8250_uniphier: add UniPhier serial driver
serial: 8250_dw: support ACPI platforms with integrated DMA engine
serial: of_serial: check the return value of clk_prepare_enable()
serial: of_serial: use devm_clk_get() instead of clk_get()
serial: earlycon: Add support for big-endian MMIO accesses
serial: sirf: use hrtimer for data rx
serial: sirf: correct the fifo empty_bit
...
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In platforms which does not use CLK framework (HAVE_CLK not set), the
clk_* functions return NULL instead of an error. This patch handles that
scenario.
Signed-off-by: Fernando Guzman Lugo <fernando.guzman.lugo@intel.com>
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The internal clock of the master chip, which is usually 125MHz, is only half
(62.5MHz) for the slave chips. So we have to adjust the uartclk for all the
slave ports. Therefor we add a new function to determine if a slave chip is
present and update pci_xr17v35x_setup accordingly.
Signed-off-by: Soeren Grunewald <soeren.grunewald@desy.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The Exar XR17V358 can also be combined with a XR17V354 chip to act as a
single 12 port chip. This works the same way as the combining two XR17V358
chips. But the reported device id then is 0x4358.
Signed-off-by: Soeren Grunewald <soeren.grunewald@desy.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Align with coding guidelines:
Replaced a chain of "else if" by a switch case.
Signed-off-by: Joakim Nordell <joakim.nordell@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This drivers adds support to the STM32 USART controller, which is a
standard serial driver.
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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set_irq_flags is ARM specific with custom flags which have genirq
equivalents. Convert drivers to use the genirq interfaces directly, so we
can kill off set_irq_flags. The translation of flags is as follows:
IRQF_VALID -> !IRQ_NOREQUEST
IRQF_PROBE -> !IRQ_NOPROBE
IRQF_NOAUTOEN -> IRQ_NOAUTOEN
For IRQs managed by an irqdomain, the irqdomain core code handles clearing
and setting IRQ_NOREQUEST already, so there is no need to do this in
.map() functions and we can simply remove the set_irq_flags calls. Some
users also set IRQ_NOPROBE and this has been maintained although it is not
clear that is really needed. There appears to be a great deal of blind
copy and paste of this code.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: Barry Song <baohua@kernel.org>
Cc: linux-serial@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This fixes up a merge issue with the amba-pl011.c driver, and we want
the fixes in this branch as well.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Serial port driver for the 8250-based UART found on LPC18xx/43xx
devices. The UART is 16550A compatible with additional features
like RS485 support, synchronous mode, IrDA, and DMA.
For now only basic UART and RS485 operation is supported.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Add the driver for on-chip UART used on UniPhier SoCs.
This hardware is similar to 8250, but the register mapping is
slightly different:
- The offset to FCR, MCR is different.
- The divisor latch access bit does not exist. Instead, the
divisor latch register is available at offset 9.
This driver overrides serial_{in,out}, dl_{read,write} callbacks,
but wants to borrow most of code from 8250_core.c.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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On many new Intel SoCs the UART has an integrated DMA engine
(iDMA). In order to use it a special filter function is needed.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The function clk_prepare_enable() may fail, and in that case it
does not make sense to proceed. Let's check its return code and
error out if it is a negative value.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The probe method of this driver calls clk_get(), but clk_put() is
missing from the remove callback.
Using the managed clk function is easier than fixing other parts.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Support command line parameters of the form:
earlycon=<name>,io|mmio|mmio32|mmio32be,<addr>,<options>
This commit seem to be needed even after commit:
serial: 8250: Add support for big-endian MMIO accesses
c627f2ceb692e8a9358b64ac2d139314e7bb0d17
Signed-off-by: Noam Camus <noamc@ezchip.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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when the serial works as a bluetooth sink, due to audio realtime
requirement, the driver should have something similar with ALSA:
1. one big DMA buffer to easy the schedule jitter
2. split this big DMA buffer to multiple small periods, for each
period, we get a DMA interrupt, then push the data to userspace.
the small periods will easy the audio latency.
so ALSA generally uses a cyclic chained DMA.
but for sirfsoc, the dma hardware has the limitation: we have
only two loops in the cyclic mode, so we can only support two
small periods to switch. if we make the DMA buffer too big, we
get long latency, if we make the DMA buffer too little, we get
miss in scheduling for audio realtime.
so this patch moves to use a hrtimer to simulate the cyclic
DMA, then we can have a big buffer, and also have a timely
data push to users as the hrtimer can generate in small period
then actual HW interrupts.
with this patch, we also delete a lot of complex codes to handle
loop buffers, and RX timeout interrupt since the RX work can be
completely handled from hrtimer interrupt.
tests show using this way will make our bad audio streaming be-
come smooth.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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A corner case exists in the current driver. if an app opens the console
device, and before writing to console device, and there are huge kernel
ogs to print out, system will hang on
sirfsoc_uart_console_putchar:
while (rd_regl(port, ureg->sirfsoc_tx_fifo_status) &
ufifo_st->ff_full(port->line))
cpu_relax();
as in sirfsoc_uart_startup(), the driver assigns tx_fifo_op to 0 will stop
TX FIFO, this loop will be endless.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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serial8250_set_mctrl() is a void type function. Returning something
does not look nice.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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RS-485 configuration is also done under the spinlock
so no blocking I/O allowed.
Signed-off-by: Jakub Kicinski <kubakici@wp.pl>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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.stop_rx/tx() are called in atomic context, we cannot use
blocking I/O. While at it correct the name of RX bit and
'*' placement in pointer declarations.
Signed-off-by: Jakub Kicinski <kubakici@wp.pl>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Convert md_proc into general async reconfiguration procedure.
Signed-off-by: Jakub Kicinski <kubakici@wp.pl>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Instead of spinning under port->lock let's just sleep
inside the kthread. It should be equivalent as TX cannot
proceed when thread is blocked.
Signed-off-by: Jakub Kicinski <kubakici@wp.pl>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Convert workqueue usage to a real-time kworker. The problem
with workqueues is that we cannot set real-time priorities on
our work and asynchronous reconfiguration can be blocked by
less important tasks.
We need kthread for the interrupt anyway and because we will
now be using single kthread for all TX-related operations we
can get rid of the port mutex.
Signed-off-by: Jakub Kicinski <kubakici@wp.pl>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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LSR_TEMT_BIT (LSR bit 6) provides us exactly the information
we need to determine if transmission is finished - FIFO level
and shift register empty. We can save ourselves reading FIFO
level explicitly if we use this bit.
Signed-off-by: Jakub Kicinski <kubakici@wp.pl>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Without matching bus-specific strings driver will not be loaded
automatically.
Signed-off-by: Jakub Kicinski <kubakici@wp.pl>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Users of RS-485 can request via ioctl that RTS signals should
be activated selected number of milliseconds before the actual
data transmission or delay reception certain number of milli-
seconds after the transmission is finished. In sc16is7xx,
however, RTS signalling is handled by the hardware and driver
has no way of providing this feature.
We still try to provide .delay_rts_before_send by delaying
transmission but without actual effect on the RTS line.
Note: this change will make the driver return -EINVAL when the
feature is requested (.delay_rts_after_send is set).
Signed-off-by: Jakub Kicinski <kubakici@wp.pl>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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spi interface for sc16is7xx is added along with Kconfig flag
to enable spi or i2c, thus in a instance we can have either
spi or i2c or both, in sync to the hw.
Signed-off-by: Rama Kiran Kumar Indrakanti <indrakanti_ram@hotmail.com>
Signed-off-by: Jakub Kicinski <kubakici@wp.pl>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Add the necessary driver boilerplate to let the driver be used when
the respective ACPI table is discovered by the ACPI subsystem.
[Andre: change table name, add MODULE_DEVICE_TABLE entry and improve
commit message]
Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Graeme Gregory <graeme.gregory@linaro.org>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Naresh Bhat <nbhat@cavium.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The ARM Server Base System Architecture[1] document describes a
generic UART which is a subset of the PL011 UART.
It lacks DMA support, baud rate control and modem status line
control, among other things.
The idea is to move the UART initialization and setup into the
firmware (which does this job today already) and let the kernel just
use the UART for sending and receiving characters.
We use the recent refactoring to build a new struct uart_ops
variable which points to some new functions avoiding access to the
missing registers. We reuse as much existing PL011 code as possible.
In contrast to the PL011 the SBSA UART does not define any AMBA or
PrimeCell relations, so we go with a pretty generic probe function
which only uses platform device functions.
A DT binding is provided with this patch, ACPI support is added in a
separate one.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Naresh Bhat <nbhat@cavium.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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