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Remove all reference to the internal code name "msmtitanium" and
replace them with "MSM8953" which is the official name for the
SoC.
Change-Id: I1637b0270ddbe8283dd9b4ba07e8e263b0a5a944
Signed-off-by: David Collins <collinsd@codeaurora.org>
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Debug policy of secure devices take care of nullifying
the ram dumps in secure boot mode. So no need to check
about secure boot mode in reboot driver to enable
download feature.
Change-Id: Idb5c93aca630f0093fccc2997bf50e7958dfbf54
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
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During SOC masking, SOC 100 will be shown to the user after the
charge termination and as long as the charger is inserted. After
the charger is removed or device is discharging when the charger
was inserted, showing the real monotonic SOC instantly reduces
the user experience. Linearize the drop in SOC so that it can be
spread to a wider range.
Change-Id: I509e59f8e5d9e9addd8c5721369fbcf664158338
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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When SOC masking algorithm is enabled, a SOC of 100 will be shown
to the user when certain conditions are met. When the device
starts discharging after charge termination, auto recharge will
be triggered once the SOC or Vbatt goes below the threshold. When
the recharge is based on Vbatt, a fluctutation in Vbatt can cause
issues in SOC masking algorithm. To make it robust, adjust the
recharge voltage dynamically based on charging status and battery
SOC.
Add a device tree property to allow configuring auto recharge to
be based off SOC or battery voltage. This will help the user to
select auto recharge configuration easily.
Change-Id: I2d749806aa51b9fa747967b592b6622cc12bee65
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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After charge termination, charging status might not get updated
until the recharge begins. This makes charge_full_update to be
not called at all thereby causing SOC masking algorithm to not
clear the charge_full flag. Use delta battery SOC interrupt to
help with this. Keep it disabled by default and enable it after
the charge termination. Disable it again when the user removes
the charger.
Since this needs delta battery SOC threshold to be configured,
add support for it.
Change-Id: Ic1a9f8a065c87efe88e315f2b2e1e1378151531b
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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When FG is restarted, RESTART_GO bit is set and it is cleared
only when the first estimate is done, signalled by SOC_READY
interrupt. If SOC_READY interrupt doesn't fire for some reason,
RESTART_GO bit will not get cleared. Fix this.
Change-Id: I99261d5020f5012ba0a4e35e543458f9e7b30210
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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During battery hotswap, a strong charger will be supplying enough
current to keep the device up and running. Currently, FG driver
shows up the monotonic SOC and voltage as-is (which is zero) to
the battery power supply and hence to the userspace.
Show a fake battery SOC (50%) and fake battery voltage (3.7 V)
when the battery is missing. If a strong charger is not present,
then the device will be powered down anyways.
Change-Id: Ia2c85d1e75bbf0c937a7e36e786362c473c7f7cd
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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Move all "find_votable" requests before any voter creation
in smb library to prevent multiple creation/destruction of
votables due to probe-deferrals.
CRs-Fixed: 2001651
Change-Id: I03cb30775720a53ad24e1c5d5e075d7442b2729c
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
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Add a new votable in parallel driver to support wakeup source
handling via pmic-voter framework.
CRs-Fixed: 2001651
Change-Id: Ia2c67d76081c36508d1ad3c3cb3a0be4c1a55814
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
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Move Taper entry check before charge enable check in
"handle_main_charge_type" to make sure TAPER entry is
handled properly.
CRs-Fixed: 2001651
Change-Id: Id7c3f48b66ba8df20ca2be022565d8bf0e38379b
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
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Parallel charger registers to power supply framework with name
"parallel" instead of "usb-parallel" thus update all references
of "usb-parallel" with "parallel".
While at it, remove extra NULL pointer check of pl_psy in
parallel enable path.
CRs-Fixed: 2001651
Change-Id: I4150808f7122cef970296553fb70671df12aced9
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
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Currently the TTF is inaccurate near 100% SOC. Adjust the tau scale near
100% SOC and adjust the target full battery current to compensate for
the inaccuracy.
Change-Id: I2f6327fab7b71108a928e8c99107522c73c35e07
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
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Currently the enable voter returns 1 when its actually disabled and 0
when its actually enabled.
Fix this reverse logic.
Change-Id: I9f916bd3d30b9d6d89162e0175e4b90e6c0b6f0a
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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There is no need for this property. Remove it.
Change-Id: I656eb51f8b9690d0c1046d1c82d2575fae270a40
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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Currently the parallel charging code is tightly coupled in the main charger
files. Update the design to separate parallel charging code. This
parallel charging code will implement few votables and interacts with
the main and parallel charger.
A brief discussion on important changes
Usb main psy
The new design introduces a charger type called USB-Main which exposes all
the properties required to implement parallel charging for the main
charger. These properties are implemented/supported
- CONSTANT_CHARGE_CURRENT_MAX, sets and gets the FCC of the main charger
- ICL_REDUCTION, indicates by how much the main charger should reduce
its ICL. The parallel charger would draw some portion of the ICL and
this implementation ensures that the main charger reduce its ICL in
order to not exceed the adapter limits.
- VOLTAGE_MAX, sets the float voltage of the battery, we continue to
raise float voltage for the parallel charger so that it operates as
current source.
- INPUT_CURRENT_SETTLED: indicates the AICL results.
- FCC_DELTA: indicates the value by which the main is correcting the
FCC. The main reduces FCC by few mA when in Jeita or Step
charging. This helps in determining the exact FCC which in turn
helps distribute it correctly.
Slave percent
The new file implements the sysfs entry for slave percent. When
thermal balancer updates it, it ends up calling fcc distribution
and also the icl distribution. Note that the icl distribution too
is dependent on the slave's fcc percent - in that it gives 10
percent point more to the main charger.
ICL
ICL needs to be distributed only in USBIN_USBIN configuration.
As noted above the ICL distribution is based on fcc distribution
aka slave_percent. The main charger is given 10% more ICL since it
caters to system load in addition to charging the battery. This is
similar to our traditional USBIN USBIN implementation where FCC was
distributed 50/50 while ICL was distributed 60/40 percent - the main
got 10% more of the ICL value.
Note that the ICL distribution is invoked when AICL settled current
changes, not when the ICL itself changes. The new code tracks the
aicl settled value and invokes the icl distribution when it changes.
It first requests the main charger to reduce its icl and then updates
the parallel's icl.
FCC Votable
The FCC votable is moved to the new file and is similar to its previous
implementation - It distributes FCC when ever the FCC value changes, the
slave_pct changes or parallel charger is enabled or disabled. If the main
charger is further modifying the FCC from what its registers were
configured, this FCC callback takes that in to account via the
FCC_DELTA property prior to distribution.
FV Votable
Like the FCC votable the FV votable is moved to the new file.
The code is similar as it was implemented in the main file where
it distributes FV when ever the FV value changes.
TAPER entry
The code that stepwise reduces slave's ICL as it enters taper mode
is moved to this file. So that it can correctly do this, the
charge type is tracked in its internal structure.
PL_DISABLE Votable
The PL_DISABLE too is moved to a new file. There are few implementation
changes here.
- Earlier the code used to run the same sequence while enabling and
disabling. This could create a situation where FCC/ICL is incorrectly
configured for a brief period. That has been corrected, in that
the enable configures in this order configures fv, distributes fcc,
enables parallel, distributes aicl. The disable does that in reverse
order of enable.
- Charger's presence would vote on enabling/disabling parallel charger.
This is no more required. Instead a vote from CHG_STATE_VOTER suffices
for when fast charging begins. The voters that enable/disable parallel
when typec is present or is in sink mode or when uUSB cable is
inserted are removed.
CHG_STATE_VOTER and TAPER_END_VOTER
A typical charge cycle enters fast charging, moves to taper charging and
finally goes to end of charging. Parallel charging needs to be
enabled while fast charging starts and needs to be kept enabled during
the portion of taper charging when parallel's FCC is above 500mA threshold.
Note that if charging starts from taper, we only want to run it so long
as the parallel's FCC stays higher than 500mA threshold.
CHG_STATE_VOTER votes to enable parallel charging when fast charging
or parallel charging is in progress. When charging stops (i.e. when its not
in fast or taper charging) CHG_STATE_VOTER votes to disable parallel
charging.
Also the TAPER_END_VOTER votes to disable parallel charging when
parallel's FCC share falls below 500mA. It continues to vote disable on
parallel charging until charging stops. At that point it votes to
enable parallel charging.
Between these two voters, parallel charger
- enables when fast charging starts and remains enabled as it
transitions to taper charge.
- is disabled once parallel's FCC falls below 500mA threshold and
remains disabled in taper charge until charging stops.
This makes it important that the battery psy provide correct psy
changes when it enters/exit FAST or TAPER type. The PMI chip and its
battery_psy implementation already guarantees that.
PL_TAPER_EARLY_BAD_VOTER
During some runs we see that parallel operates in taper mode. Given that
we sets its FV higher than main's FV, the parallel should never operate
in taper mode. This voter disables parallel charging if this happens.
This voter enables parallel charging when the main charger stops
charging.
Change-Id: If1676cd126d7eeace7c44cf8d819038d03433d7e
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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Currently if battery psy is not seen while the profile is loaded during
initialization, it doesn't configure the float voltage and the fast charge
current value when battery psy comes in later.
Fix this by setting those parameters whenever batt_psy is seen for the
first time.
While at it change the name of this function from is_charger_available to
batt_psy_initialized to be in line with the added steps.
Change-Id: I31eb364e5fe33cc4b45aba4027150e4c21e74451
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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USB Main charger type represents the main charging path. This will
be used to control charging parameters on the main charger.
FCC_DELTA property will be used to indicate whether hw implements
any FCC mitigation. This will be used to calculate the effective FCC
and set the FCC on the PMI.
PARALLEL_MODE property indicates whether the parallel charger chip is
configured in a mid-mid or usbin-usbin configuration.
ICL_REDUCTION property indicates by how much should the main charger
reduce its input current.
Change-Id: I3b064314e6b5c28a7ea9f79ac52f3a26749605fb
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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FG SRAM read/write APIs consist of peripheral/supporting
read/writes and the core interleaved_mem_access functions.
The current implementation retries only when the core functions
return an error and in case of a read, additionally when the beat
count changes. This works except if the peripheral/supporting
access fail, we do not even retry.
Introduce retries for all possible failures while reading/writing
a SRAM location.
Change-Id: I99ad9acae3ef0dbc3941094076f124d16099468c
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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In the SRAM masked write we read the register first, make
modification to the value and write it back. If the read fails
we bail out of the masked write function.
However there is a bug in the read api where the error code is
not properly returned. This causes the masked write to proceed
with a failed read and corruption ensues.
A similar bug is present in write api too where the error is not
returned correctly to the caller. Fix this.
Change-Id: Ic7651c5cb2e054a0b8b2dfe201463063ce9e167b
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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There is a possible race condition when debugfs files are concurrently
accessed by multiple threads. Fix this.
CRs-Fixed: 1105395
Change-Id: Iea5a8d659da231a81630d8f2302714e69d35de61
Signed-off-by: ansharma <ansharma@codeaurora.org>
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CC can debounce several times while VBUS is present and if APSD is
disabled the APSD result will be unknown. Disable APSD run on CC
debounce when APSD is disabled so the APSD result will not be reset in
this case.
Change-Id: Ia0b18605ea7d51aab0426bc7ad7c873152f42dc7
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
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Sometimes the apsd results show up as Unkonwn for SDP and SDP
for DCP. These are especially after reboot.
For such situations introduce code to rerun APSD right at bootup.
While at it also ensure that APSD rerun is enabled while shutting
down.
Change-Id: Ic81e270fd6efcf619624cb336cb0b8b41193913f
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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If APSD is triggered while APSD is disabled the APSD_RESULT_STATUS
register will be reset. APSD will trigger whenever both VBUS and CC
have been debounced. This includes when VBUS is stable and CC is
re-asserted.
This is an issue particularly when the CC2 workaround re-asserts CC
when PD performs a hard reset since APSD will be disabled.
Fix this by configuring APSD to trigger only on VBUS before CC is
re-asserted by the CC2 workaround.
Change-Id: I507646faaab7aafeedb4104ad0ad5c32970270a6
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
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A part of the ADC circuit does not work as expected which causes die
temp inaccuracies. Enable the stacked diode circuit to bypass the
non-working circuit which fixes the die temp accuracy.
Change-Id: I2537ecd9190d3260396a847d3fd907634f874eb7
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
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Currently, the code reports whatever is in the BATTERY_CHARGING_STATUS_1
register for the battery status.
We have seen that the register continues to report FAST charging
even when the chg_ok pin could be low or dc path is in collapsed
state (collapsed state is treated as dc not online). This unexpected
report of charging while it is not really charging breaks certain
features.
Fix it by checking for usb_online and dc_online. But make sure that
if the battery is full it continues to report so.
Change-Id: I732c916b4f63f9ff0fd8d9c77ce5253c309698a4
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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Currently there is no easy way to detect the device name based on
the bus or device sysfs properties.
Implement MODEL_NAME property to identify the parallel charger.
Change-Id: I8134b415a2b36e249b098f4b61d4dd8415008cfa
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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A misplaced return statement causes an early return from disabling OTG.
If OTG is enabled when a source is attached then Type-C detection will
fail. Therefore, OTG should never be blocked from being disabled.
Remove all of the early returns that could potentially block the
register write which disables OTG.
Change-Id: I4645210233c7490cf3e1b8f6a629fec60399b250
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
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Add support to identify fake battery/debug board and suspend the USB
input path when this is detected.
CRs-Fixed: 1107245
Change-Id: Icaa936e4e5b3c9381bc92b6664b32547a820b9c3
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
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External sense configuration is not supported. Hence remove it.
Change-Id: If65eb8c4d9720d4c4e9d913c91c8b33f420f29d1
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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Add power supply property to report debug/fake battery status.
CRs-Fixed: 1107245
Change-Id: I5590a772604986de8eed1c8417411dac62668440
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
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The power directory structure has changed in kernel version 4.9. Align
msm-4.4 with this new directory structure.
Change-Id: Iba729f8ef33245ea78cdc05276ba8f5593191509
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
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