| Commit message (Collapse) | Author | Age |
| ... | |
| |/
|
|
|
|
|
|
|
|
|
|
|
|
| |
When the battery is in cold temperature for a certain amount of
time and device is charged with Qnovo enabled charging, ESR pulse
will fire less frequently. This along with ESR pulses not getting
qualified can cause the ESR to be less accurate. To improve ESR
accuracy, add change to apply relaxed filter coefficients once
the battery temperature starts ramping up after hitting a lower
threshold of say 6 C after charging begins.
CRs-Fixed: 2151708
Change-Id: Iff6c2ffbab1f327dfefcf1550213c37df4a8ad42
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| |\ |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| | |
As per the hardware recommendation, update ESR tight and broad
filter coefficients for low temperature (< 10 C) to 3 %.
CRs-Fixed: 2155610
Change-Id: I7e5a77bcd14ad64459f6bd13f0be0551dcbefdba
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| |\ \ |
|
| | |/
| |
| |
| |
| |
| |
| |
| | |
Fix OTG enable error path and drop stale votes
on USB_ICL votable.
Change-Id: Ia0fce0ef75bb83ece72cc6a5a8f294b2500a0166
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
|
| |\ \
| |/
|/| |
|
| | |
| |
| |
| |
| |
| |
| |
| | |
Add MODEL_NAME property in parallel psy to expose the model
information of parallel chip.
Change-Id: Ib02fa449696e52dc9e9f4ad7ee0b04e841129b95
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
|
| |\ \
| | |
| | |
| | | |
method"
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Correction in the value being passed to the float_voltage_set method
in the smb1351 parallel_set_property function. The value being passed
is in uV range whereas the expected value lies in the mV range.
Change-Id: If04468062f973e1f102fd2f943271b2a133e3d8b
Signed-off-by: Umang Agrawal <uagrawal@codeaurora.org>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
In slave configuration "POWER_SUPPLY_PROP_CURRENT_MAX" fails to
suspend USB input path for 0/2mA current request. Fix this by
separately handling 0/2mA request to suspend input.
CRs-Fixed: 2148379
Change-Id: Id9b7887c4f2f924d9e4c8484947d74baa96eb8a3
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Current parallel design has fixed order of configuring
ICL/FCC between main and parallel charger, this could
lead to a situation where total(main + parallel) ICL/FCC
goes beyond maximum configured value.
Fix this by dynamic ordering of ICL/FCC between main and
parallel based on AICL change.
CRs-Fixed: 2148379
Change-Id: Ia1ff7093d1de9205ce8072760c80ba0a58638462
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
|
| | |/
|/|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Currently when pd is disabled, we do not allow hvdcp. To fix that
once hvdcp timeout happens and if pd is disabled, force a pd_active
= 0. This will cause us to run legacy workaround and rerun apsd if
the charger was detected as hvdcp.
Importantly, once legacy bit workaround is run, wait 400mS for
typeC to debounce. Currently we wait for 100mS only and that
causes a removal detection since the CC lines are not settled within
100mS.
Also it may take up to 650mS for the vbus to drop once CC lines are
floated during the workaround. The current wait is just 500mS,
bump it up to a 1 second.
Change-Id: I17a7341e96d6efccde6270bc69d79c3f215b83e4
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
|
| |/
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently, Rconn is configured once in fg_hw_init() if it is not
configured already. However, if the driver loads the profile
later, it will overwrite the Rconn value configured during
fg_hw_init. To fix this problem, configure Rconn after handling
battery profile loading.
Usually the Rconn configuration is setup differently from what
the profile has for it. We check if the profile in SRAM is bit
to bit matching with the profile in device tree. We may come
across a mismatch for Rconn configuration and conclude that the
profile isn't matching. Fix this by initializing the Rconn
configuration in the profile read from device tree to the value
read from SRAM.
CRs-Fixed: 2142441
Change-Id: I2b7ac8cd6efe811527c29bc5cd0fa43b77da7b15
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| |\ |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Currently, all the values of raw monotonic SOC (0-255) gets
rounded off to 0-100. This can show up monotonic SOC hitting 0%
earlier when the SOC hadn't really hit zero yet. Improve the
SOC round off calculation so that 0 and 100 % can be shown when
it reaches the exact point.
Change-Id: I5bd9ebc8667a5beed9e1e97ff492aa1350f4d0f7
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| |/
|
|
|
|
|
|
|
|
|
|
| |
There is a scenario where the status change work can hold
a mutex lock for ~1.5 seconds which can race with the FG resume
callback. Avoid this condition by adding a state variable
to track the suspend/resume state and skip executing the
status change work while suspended.
CRs-Fixed: 2101514
Change-Id: Ib5300a5dfce30c4c6bcc8d8428b664c184a83fb4
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
|
| |\ |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
This reverts commit 941bfaf2dc352b2ba2cd7e50c55843e4585aaffb.
Bring back the charger and fuel gauge drivers supported on
8996.
Change-Id: Ibba07ece69e29a8c7bf26acdc9dda30ac755fb83
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
When both sides are doing DRP and the other side applies Rd near the end
of PMIC DFP cycle, sometimes, PMIC does not lock on into AttachedWait.SRC
and transitions back into Unattached.SNK.
If a resistance ranging (5.1k,300k) pulldown is applied and then 5.1kohms
pulldown is applied, then it takes 10-20ms to detect 5.1kohms.
Before this, if DRP.DFP time expires, then PMI transitions to UFP mode to
avoid extending DRP cycle time.
Fix it by extending DFP time. Note the total DRP time should still be
within max limit (100ms).
Change-Id: I1dd180229bc771542b4f6ca7850aa457478ae5cd
Signed-off-by: Harry Yang <harryy@codeaurora.org>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
In Try.SNK software implementation, after forcing sink, there
is a delay of tDRPTRY + Tccdebounce time, giviing opportunity
to the other side to be a SRC.
The current delay is 100ms < tDRPTRY (90ms) + Tccdebounce (20ms),
too short, which sometimes results in checking Tccdebounce_done
status too early.
Change the delay to 120ms.
Change-Id: If9fe9aa7c405a5ae6416e9373449c4a76295e4d8
Signed-off-by: Harry Yang <harryy@codeaurora.org>
|
| |/
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Try.SNK allows a DRP that has a policy based preference to be a Sink
when connecting to another DRP to effect a transition from a destined
Source role to the Sink role.
This is a Software implementation for PMI8998.
Exiting from AttachWait.SRC State, a DRP that strongly prefers the
Sink role may optionally transition to Try.SNK instead of Attached.SRC.
When in the Try.SNK state, the port is querying to determine if the
port partner supports the Source role.
The port shall then transition to Attached.SNK when the SNK.Rp state
is detected for at least tTryCCDebounce and VBUS is detected
Alternatively, the port shall transition to TryWait.SRC if SNK.Rp state
is not detected tTryCCDebounce.
The port shall transition to Attached.SRC when SRC.Rd state is detected
on exactly one of the CC pins.
The port shall transition to Unattached.SNK after tDRPTry if neither of
the CC1 or CC2 pins is in the SRC.Rd state.
CRs-Fixed: 1114313
Change-Id: I777332e87df65082333f4e24a61c5ea834784d09
Signed-off-by: Harry Yang <harryy@codeaurora.org>
|
| |\ |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Currently, charge_counter is based off CC_SOC_SW which is based
off coulomb counter. However, there could be some accumulation
of error due to inaccuracy in ADC over time. This can potentially
affect the accuracy of charge_counter. To overcome this, prime
CC_SOC_SW during discharging based off battery SOC and to a full
value during charge termination.
While at it, expose the charge_counter_shadow property based off
battery SOC for comparison.
CRs-Fixed: 2109421
Change-Id: I50de44afbdbd747db95946416a09062df205fd6c
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
When SOC is held @ 100% after charge termination, charge_full
flag is cleared only when the monotonic SOC drops below recharge
SOC threshold. This can cause the flag to be held for a long time
when the charger is removed. Fix this by clearing charge_full
flag when charging status had changed from FULL.
Change-Id: I35b52ddc45f314347f0e4d8433d5fb550663267c
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Delta battery SOC interrupt can fire during boot just after
registering the interrupts before disabling it through vote() on
delta_bsoc_irq_en_votable during driver probe. When this happens,
from the delta_bsoc interrupt handler, an attempt to disable the
interrupt can be made by fg_charge_full_update() if charge_done
is not set. This will in turn acquire the mutex lock of votable
while trying to do disable_irq() which needs synchronization.
Prevent this situation by using disable_irq_nosync() when
disabling the interrupts from votable callbacks.
CRs-Fixed: 2125269
Change-Id: I1b617c4afd39c544ce79f9396030b730c55445a7
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| |\| |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Currently, wait for soc_update completion is attempted once again
only when the wait is interrupted. Try waiting again even when it
is timed out. This should help IMA_ATOMIC transactions go through
reliably.
Change-Id: I8d31fc41020b8c05ff4d562ae205eaa278d7ffcb
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| |\ \ |
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Handle notifications from parallel charger in GEN3 FG driver so
that ESR FCC control can be configured sooner based on parallel
charging status change. Without this, GEN3 FG driver can simply
wait on notifications from battery/USB power supply to move from
HW autonomous to SW controlled ESR FCC settings when parallel
charging is enabled which cause unwanted battery current spikes.
CRs-Fixed: 2119134
Change-Id: Ic4c473a6cc6062f2eaaebc68c30a1a51763c5dda
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| |\ \ \
| |/ /
|/| | |
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Currently the code ends up holding a wakelock even while discharging.
There is no need to hold wakelock or handle stepcharging/jeita
situations while discharging.
Change-Id: I0edfd16cef88ec45b0f0ebb80533b62c6e775116
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
|
| |\ \ \ |
|
| | | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Disable USB IRQs after high duty cycle IRQ triggered and re-enable
them in the delay worker. This helps to avoid the high duty cycle
IRQ storming.
CRs-Fixed: 2094725
Change-Id: Iba22a7402692b5ee5f738cc17ed9c214f6014ac0
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
|
| |\ \ \ \
| | |/ /
| |/| /
| |_|/
|/| | |
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Currently the driver moves FCC to PMI as it steps down
from SMB. Instead we should step down just the SMB.
Change-Id: I7ad9ca4364a44bacb539f8b045cf97f7945155f5
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
|
| |\| | |
|
| | |/
| |
| |
| |
| |
| |
| |
| |
| | |
Currently the code only waits 100mS between steps. The hardware
could take longer to deglitch its signals and status. Extend the
wait to 500mS.
Change-Id: I4a037f85f43bc670c5a357e4ecb46962b0d33598
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
|
| |\ \ |
|
| | |/
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Currently the driver skips invoking adc api's if usb is not
present i.e. vbus has fallen below 3.3V.
This presence check is not required for the vbus. Skip that
check.
Change-Id: I4a2dd91109a308b553b7407618ee8f3221127f61
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
|
| |\ \
| |/
|/| |
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Currently, ESR extraction control is configured from two paths.
First is invoked when Qnovo is enabled or disabled. Second is
invoked when the pulse train is done and ESR measurement is
requested. When the latter is run, there is a sleep time of 1.5
seconds that is essential for allowing FG to do ESR measurement.
However in that time window, if Qnovo is disabled for some reason
then ESR extraction control will be kept disabled unexpectedly.
Fix this by protecting both the paths using a mutex lock as well
as checking for qnovo enable status before disabling ESR
extraction control after measuring ESR.
Change-Id: Ib93539071724a1ce59d198074854a8a9c5fd3ab3
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| |\ \ |
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Use the MSOC raw value directly from the register instead of
extrapolating it from MSOC value to avoid any rounding-off
errors.
CRs-Fixed: 2080211
Change-Id: I91d98c6aa8a63344ff79b5414c45d0f5a5b52b81
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
|
| |\ \ \ |
|
| | | |/
| |/|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Currently, when becoming inactive, PD leaves the HDC and input
limited interrupt enabled.
Correct it by disabling it.
Change-Id: I62a1d837f6126951cb428a982fe1d8876f1d5bdc
Signed-off-by: Harry Yang <harryy@codeaurora.org>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Change the OTG regulator ops to static for smb1351 and smb135x
charger drivers.
Change-Id: Ide0c6461275f3ba74e0420e1d1a36c1e1f2bd18d
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| |/ /
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
In certain conditions, after the battery SOC reaches 100%, SOC is
not getting updated during discharging. Based on the hardware
recommendation, adjust the Ki coefficient for full SOC so that
SOC can be updated faster during discharging.
While at it, remove prev_charge_status variable which is not
used really.
CRs-Fixed: 2089555
Change-Id: I54b7d86529c21c016ab777053895ccda9c7a2b35
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Currently, FULL_SOC and MONOTONIC_SOC registers are updated
multiple times when the recharge SOC threshold is close enough to
trigger the recharging frequently. This was leading to a SOC
fluctuation when SOC masking algorithm is enabled.
Rearrange charge_full_update used in SOC masking algorithm such
that FULL_SOC and MONOTONIC_SOC registers are updated just once
when the charge_full flag is cleared.
Also, when the device is rebooted/shutdown and if charge_full
flag is set, write to FULL_SOC with battery_soc and a full value
to MONOTONIC_SOC registers. This helps to maintain the same SOC
across a device reboot.
Change-Id: I95afa90f27e4c0f948f301ff8d6a1f84ae422ef0
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|
| | |
| |
| |
| |
| |
| |
| |
| | |
Provide means to suspend the DC path using the power supply
property.
Change-Id: I97f83f5f7c892fc078a92914af0a923b6aacf02e
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Currently, SOC linearization is done when SOC masking feature is
enabled to spread out the drop in SOC across a wider range and
for better user experience. Make this configurable through a DT
property "qcom,linearize-soc" so that the user can enable it as
and when required.
Change-Id: Ic9f5f04f4e872d7804152c17206a8b204de3a9c1
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
|