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* | | msm: ipa: Fix to QMI initialization and polling stateSridhar Ancha2016-05-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using a workqueue for initializing QMI functionality can result in race conditions with cleanup operation during SSR handling because of scheduling delays. Make a change to not to use workqueue and initialize the QMI functionality as part of probe itself. For polling state, there is a possibility that pipe is disconnected during switch between poll mode interrupt mode. This can result in queueing switch_to_intr_work work multiple times till the pipe is connected and there is some activity. Make a change to check if the ep is valid before queuing the work. Change-Id: Id5a5128edb379308fa91b53062b6773af1b6de18 Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com> Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
* | | msm: ipa3: Flush Filtering and Routing cache on SSR eventGhanim Fodi2016-04-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As part of SSR logic, APPS cleans Q6 Filtering and Routing tables so they point to empty tables. At IPA3 connection cache is stored at IPA H/W so packets may get rule hit at the cache and bypass the rules scan. Flushing the cache is needed to ensure handling integrity. CRs-Fixed: 1007738 Change-Id: I80e16f8cd449f6183810304bd92cc5f302125237 Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
* | | platform: qpnp-revid: switch to PMCOBALT and PMICOBALT namesDavid Collins2016-04-27
| | | | | | | | | | | | | | | | | | | | | | | | Change the PMIC names to use PMCOBALT and PMICOBALT. Change-Id: Ia2c9be4ec36f522968364ebb66190278cfbb9244 CRs-Fixed: 1007932 Signed-off-by: David Collins <collinsd@codeaurora.org>
* | | msm: ipa3: use user parameter for GSI ring lenSkylar Chang2016-04-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calculate GSI ring length based on the input parameter to setup pipe API. Change-Id: I151400624f374262a955a04d211a96c43feb6d98 CRs-Fixed: 996292 Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa: usb: change IPC logging to common bufferSkylar Chang2016-04-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use IPA driver IPC buffer for IPC logging for IPA USB. CRs-Fixed: 1005492 Change-Id: If127a18f70cb13f98d8d5443e0c3b617d2601954 Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa: add IPC logging to IPA RMSkylar Chang2016-04-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add IPC logging support for IPA resource Manager. IPC logging will be stored in the same log buffer as IPA IPC log. CRs-Fixed: 1005492 Change-Id: Id2f1a32ee61e894fe78d5efcd76edded19becd0b Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa: ipahal: change IPC logging to common bufferSkylar Chang2016-04-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use IPA driver IPC buffer for IPC logging for IPAHAL. CRs-Fixed: 1005492 Change-Id: Iee4f6e7b5da3ca27e9ef619bfb2bacc45970d3cc Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa3: allocate ipa_low IPC only when neededSkylar Chang2016-04-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | for data path and other frequent log prints, IPA driver is using a debugfs trigger to enable those. This change is an optimization to allocate IPC resources only when needed instead of on boot up. CRs-Fixed: 1005492 Change-Id: I6e7ac15ea7256c18e4174de56adb532ab6c6b0d0 Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa3: enable smart prefetch control for xDCIGidon Studinski2016-04-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable smart prefetch control for xDCI channels. This is done by configuring the channel scratch in GSI. Change-Id: I9a301da3c5426649b40069103d545e50bc75aad2 CRs-Fixed: 1004467 Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
* | | msm: ipa3: enable smart prefetch control for MHIGidon Studinski2016-04-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable smart prefetch control for MHI channels. This is done by configuring the channel scratch in GSI. Change-Id: Icff18699ce96e224d6f58b8aadce006f3d5210ee CRs-Fixed: 1004468 Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
* | | msm: ipa3: set GPI channels to DB modeSkylar Chang2016-04-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to enable prefetch control in GSI, channels needs to be configured to doorbell mode. CRs-Fixed: 1000819 Change-Id: I4847982f48b09de1690bb474db9a60e018e0c0d6 Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa: add support for DOMAIN_ATTR_S1_BYPASSSkylar Chang2016-04-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to set SMMU to S1 bypass configuration IPA driver needs to set DOMAIN_ATTR_S1_BYPASS before attaching to SMMU. The actual SMMU setting is controlled via device tree. CRs-Fixed: 998074 Change-Id: I3e63d9e6c511dd692b299543881e7266799108af Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa3: enable smart prefetch control for GPISkylar Chang2016-04-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable smart prefetch control for GPI (sys) channels. This is done by configuring the channel scratch in GSI. CRs-Fixed: 1000819 Change-Id: Iac1687b9b26eed715a1055cca295daa7b46f8abd Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm_11ad: enable SMMU S1 bypassMaya Erez2016-04-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set DOMAIN_ATTR_S1_BYPASS SMMU attribute to put stage 1 context bank in bypass, as an initial configuration. Stage-1 will be enabled in a later stage. CRs-Fixed: 1001858 Change-Id: I5a320a605622fab85373d02fdbc6c206ddc514aa Signed-off-by: Maya Erez <merez@codeaurora.org>
* | | msm: mhi_dev: Add MHI device driverSiddartha Mohanadoss2016-04-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Modem Host Interface (MHI) device driver supports clients to send control and data packets such as IP data packets, control messages and Diagnostic data between the Host and the device. It follows the MHI specification to transfer data. The driver interfaces with the IPA driver for Hardware accelerated channels and PCIe End point driver to communicate between the Host and the device. The driver exposes to both userspace and kernel space generic IO read/write/open/close system calls and kernel APIs to communicate and transfer data between Host and the device. Change-Id: I64990a972cbf7c2022d638c35f7517071de67f19 Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
* | | msm: ipa: fix to handle deaggr errorSkylar Chang2016-04-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of deaggregation error in IPA, IPA HW will send the deaggregation error frame as exception. This change fixes a bug in this logic for large frames. CRs-Fixed: 999351 Change-Id: I49ae94cea34dda039d03dbeeab2add2bdd1760bd Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa3: add support for MHI burst modeGhanim Fodi2016-04-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MHI channel burst mode is used to reduce link activity by reducing the frequency of host initiated doorbells and device initiated link accesses. This change adds support for mhi burst mode in IPA MHI driver, according to MHI v0.45 spec. CRs-Fixed: 990856 Change-Id: Iae170042b70c6eaf5bc05ea2b4a1ccdb7dd6f946 Acked-by: Nadine Toledano <nadinet@codeaurora.org> Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
* | | msm: ipa: unify IPA RMSkylar Chang2016-04-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unify IPA RM from ipa_v2 and ipa_v3 to common driver under ipa folder CRs-Fixed: 995821 Change-Id: I4a7d8c328af7cd5506b3fbbdc76b1bc5bb0de698 Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa: add common internal headerSkylar Chang2016-04-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a common internal header for ipa_v2 and ipa_v3. Common definitions should go to this header. CRs-Fixed: 995821 Change-Id: I39539cf661d9e0e0bb59236c92b169d3054485a9 Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm_11ad: add rfclk3 clock handlingMaya Erez2016-04-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On platforms where the power supply for 11AD is external the wil6210 device can control the rfclk3 clock using a GPIO. wil6210 driver has to enable the clock during device reset to guarantee the rfclk3 is on for bootloader activity. After the wil6210 device is up, the wil6210 driver needs to leave only the pin clock enabled, to allow the device to toggle it. Change-Id: I0f6181d18268f7a2f615155525fbed0f0fe7572a CRs-Fixed: 986130 Signed-off-by: Maya Erez <merez@codeaurora.org>
* | | platform: qpnp-revid: add support for PM8005David Collins2016-04-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | The subtype register value for PM8005 is 0x18. Add this to the list of known PMICs. Change-Id: I5cd316784f1339975a973e63c962fae6cb9db852 CRs-Fixed: 986619 Signed-off-by: David Collins <collinsd@codeaurora.org>
* | | msm: ipa: fix hdr log printSkylar Chang2016-04-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case IPA header has a processing context, header offset is undefined. This change fixes header log print in case of processing context. Change-Id: I55e895be945a690a707f6015c09578e31c1de693 CRs-Fixed: 993907 Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa3: add ipc logging for odu_bridge driverAmir Levy2016-04-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add ipc logging ability to odu_bridge driver. Messages will be directed to ipc logging buffer which can be found in crashdump. CRs-fixed: 999935 Change-Id: Iadfcf4a88472c54fbfe066fa6304146140b76201 Signed-off-by: Amir Levy <alevy@codeaurora.org>
* | | msm: ipa3: add odu_bridge to ipa_clients folderAmir Levy2016-04-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As part of IPA driver refactoring, a separation has been made between IPA core driver and the IPA clients. odu_bridge driver has moved to the ipa_clients folder and a dedicated header file has been created in order to provide a direct interface between IPA odu_bridge client driver and other drivers without a direct interaction with the IPA core driver. CRs-Fixed: 999935 Change-Id: Ib5109681c62137d1310539daa816d5229bc08098 Signed-off-by: Amir Levy <alevy@codeaurora.org>
* | | msm: ipa3: add ipc logging support for ipahalGhanim Fodi2016-04-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add ipc logging capability to ipahal sublayer. Messages will be directed to ipc logging buffers which can be read from debugfs or crash dump. CRs-Fixed: 999887 Change-Id: I4ef85fc64f465aa0d4901493b80dd676596affcb Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
* | | msm: ipa: support WDI 2.0 suspendSkylar Chang2016-04-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | IPA-driver only suspends the WDI pipe when rdy_ring_rp value equals to the value of rdy_comp_ring_wp Change-Id: I520b7943b85cd61065703c7bf9a5d8efb6302a56 Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa: change for WDI2.0Skylar Chang2016-04-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add rx_completion_ring and rx_completion_ring_wp to indicate which pkt descriptor is processed, also support 64 bits IOVA/PA in ipa-uc. Change-Id: I4ac096336f5aeb01fbba8241cda987f56edc1232 Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: rmnet_ipa3: fix the crash issueSkylar Chang2016-04-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Seeing rmnet_ipa3 causing the device crashed when ipa3 not initialized. The fix is to add the check when rmnet_ipa try to register the ipa3_register_ipa_ready_cb. Change-Id: I55618784befc61e37e68d3b8d8c7c5c30f45e4fc Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | wil6210: add support for platform specific notification eventsMaya Erez2016-04-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the ability to notify the platform driver on different events, such as FW crash, pre reset and FW ready. Change-Id: I796b06fae4376cda792d7f26a430ad4580899846 CRs-Fixed: 986135 Signed-off-by: Maya Erez <merez@codeaurora.org>
* | | msm: ipa3: Add SSR support for IPA3.1Ghanim Fodi2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add SubSystem Restart APPS support for IPA3.1 CRs-Fixed: 991549 Change-Id: I98dbc4cef7c08fa7452a6912e4f98270c72dc6d2 Signed-off-by: Nadine Toledano <nadinet@codeaurora.org> Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
* | | msm: ipa3: Move IPA Status Packet parsing to IPAHALGhanim Fodi2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IPA Status Packet parsing is a logic related to H/W. As such, migrate this logic to IPAHAL (H/W abstraction layer) of IPA driver and adapt the core driver code to use it. New internal S/W API is added to access the IPAHAL for Status Packet parsing. CRs-Fixed: 980623 Change-Id: I5d6a8b8b18de44b0ae512a4610d9f55f538d0fdb Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
* | | msm: ipa3: fix the qmap_id config in IPA-HWGhanim Fodi2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IPA-driver needs to config ep metadata with embedded call QMAP_ID which IPACM will pass. The fix is have right qmap_id configure in ep metadata. CRs-Fixed: 991570 Change-Id: I0a9549a5c30f53c75fd9ff961ae5dcdc0741c866 Signed-off-by: Skylar Chang <chiaweic@codeaurora.org> Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
* | | msm: ipa: Fix warning messagesRavinder Konka2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel throws a warning when space is used in memory cache name. Make changes to use _ instead of space when creating memory cache. Also make change to handle -ENODEV from IPCRTR during SSR. Change-Id: Ia34a5fb16bb4a5e95cc042b7fd5b152119520787 Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com> Signed-off-by: Ravinder Konka <rkonka@codeaurora.org>
* | | msm: ipa3: remove ul_dl sync from IPA MHISkylar Chang2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the usage of ul_dl_sync field in IPA MHI driver as this is no longer in use. CRs-Fixed: 990233 Change-Id: I7295da05664e72aa1b9120f7bc475f92addc095b Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa3: add support for FW loading on MSMsSivan Reinstein2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For MSMs, the IPA FWs (GSI FW/MCS, HPS and DPS) will be loaded via a secure PIL process. Change-Id: Ie3c3c46d52921e558e926ec2be57a885e04c924d CRs-Fixed: 970340 Acked-by: David Arinzon <darinzon@qti.qualcomm.com> Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org>
* | | msm: ipa3: update resource configuration for DIAG and DMA RGsGidon Studinski2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IPA resource allocation was updated in order to prevent HOLB (Head Of Line Blocking) in rare scenarios. This change updates the resource allocation as required. Change-Id: Ifb08b2991dc3540b038e6cf79c5531661570ab23 CRs-Fixed: 978301 Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
* | | msm: ipa3: fix device hang issue if ipa_clk failedSkylar Chang2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | if ipa-driver failed to get ipa-clk during the device probe, seeing device hang issue due to notifier_chain_register. The fix is to only initialize the notifier_chain_register after ipa-driver successfully gets ipa-clk. Change-Id: I705bf9e2b81a9d50cda75d31504f79e082276792 Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa3: configure QMB HW max reads / writesGidon Studinski2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | Configure QMB data movers max reads and max writes. Additionally, select the client's QMB instance according to the destination, PCIe or DDR. CRs-Fixed: 974578 Change-Id: Ieb7061dbb6c024bc707f66c7ef07178ed1960fba Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
* | | msm: ipa3: use vaddr instead of paddr to load IPA FWsSivan Reinstein2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to provide an identical ELF file format between MSM and MDM, the IPA core driver needs to utilize p_vaddr field as the destination address for the FW loader. Change-Id: I818fbe37601dbd4250fc428223a4a1b72b91487a CRs-Fixed: 987522 Acked-by: David Arinzon <darinzon@qti.qualcomm.com> Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org>
* | | msm: ipa3: Add the ability to set dynamically HPS/DPS seq typeNadine Toledano2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HPS/DPS sequencer type is configured statically for PROD EPs according to ipa3_ep_mapping table. This change adds the ability to set a different HPS/DPS sequencer configuration for PRODs, which mainly be used in testing CRs-Fixed: 986167 Change-Id: I47dec10e757694596385f5118486603c702fe302 Signed-off-by: Nadine Toledano <nadinet@codeaurora.org>
* | | msm: ipa3: fix event ring allocation for CONS pipesNadine Toledano2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | Allocate event ring for GPI IPA consumer pipes, regardless of its policy type. CRs-Fixed: 985987 Change-Id: I39de93b4796a44c1059f52e24010db48eeb22919 Signed-off-by: Nadine Toledano <nadinet@codeaurora.org>
* | | msm: ipa: fix to use valid ep index valueRavinder Konka2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When disabling agregation on Q6 pipes during SSR there is a possibility that index -1 is used. Make a change to skip processing if ep index is not valid. Change-Id: I7578e582d1eda0b181225af9d00ec8ad5fbe372d Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com> Signed-off-by: Ravinder Konka <rkonka@codeaurora.org>
* | | msm: ipa: add support for AGGR_SW_EOF_ACTIVESkylar Chang2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Configure AGGR_SW_EOF_ACTIVE for WAN_CONS pipe in order to allow modem to close aggregation on this pipe. This is needed in order for modem to ensure a QMAP command packet always resides in the end of aggregated frame. Change-Id: I7412f1f0af8d2109853e311de815a1f1ec3220e3 CRs-Fixed: 979484 Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa: support qmap control pkt using pkt_initSkylar Chang2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the qmap control pkts are sent back to AP from modem because of exception. The fix is to use pkt_init to skip filtering/natting on IPA-HW to reach modem instead. Also there is a requirement for AP-side to send back qmap flow control acks immediately after receiving the requets. The code change is to make 2st level high-watermark for those qmap control pkts to not be dropped. Also rmnet_ipa driver won't stop queue if the current pkt is qmap control pkt even when outstanding pkts above the first level of high-watermark. Change-Id: I3074e4a37d74c491593e109c1df0c99da85a5e57 Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | msm: ipa: fix to make sure IPA clock is onRavinder Konka2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When sending holb monitoring command to uc there is a possibility that IPA clock is off which can result in unclocked access. Make change to enable IPA clock before sending holb monitoring command to uc. Change-Id: Ia8e7564372d4b4ec9f3ad35927e0d403d0695753 Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com> Signed-off-by: Ravinder Konka <rkonka@codeaurora.org>
* | | msm: ipa: use timeout mechanism for holb monitoring commandRavinder Konka2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we use polling mechanism for holb monitoring command Uc will still try to send a interrupt to notify the response. This can result in a sync mismatch between AP and Uc and will result in a panic. Make changes to use timeout mechanism for holb monitoring command as well. Change-Id: I8c74cfedff30f90dceec7f89b153018c307afa0a Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com> Signed-off-by: Ravinder Konka <rkonka@codeaurora.org>
* | | msm: ipa: fix multiple issuesGidon Studinski2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | Fix multiple Static Analysis issues. CRs-Fixed: 964748 Change-Id: I5a47d03a5b134235ec0cb6e87d83c30193481016 Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
* | | msm: ipa: protect qmi context using mutexSivan Reinstein2016-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds logic to prevent invalid access of qmi ctx during SSR clean up using mutex. Change-Id: I689deaf093909a951a9e5847241ee3938fea240b Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com> Acked-by: David Arinzon <darinzon@qti.qualcomm.com> Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org> Signed-off-by: Ravinder Konka <rkonka@codeaurora.org>
* | | msm: ipa: snapshot of IPA changesSkylar Chang2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | This snapshot is taken as of msm-3.18 commit d5809484b (Merge "msm: ipa: fix race condition when teardown pipe" ) Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
* | | mhi: core: Enable Runtime PM by defaultTony Truong2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable MHI runtime PM by default to enable additional power savings. Change-Id: I115af9e823ed685d7bf6e2ebaf18ad526256dc98 Signed-off-by: Andrei Danaila <adanaila@codeaurora.org> Signed-off-by: Tony Truong <truong@codeaurora.org>
generated by cgit v1.2.3 (git 2.25.1) at 2026-01-29 13:45:32 +0000