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* | | | mmc: block: Add quirk and increase read data timeout for hynix emmcRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hynix emmc cards are causing read data timeout. Increase timeout value to max of 4sec and add card quirk for all Hynix emmc cards. Change-Id: I78637dc787964ec5cafe297587d6a12ecf1d31c6 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: card: Fix broken clock gatingSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit '77dacd' misses to add mmc_host_clk_release() in the completion path of a CQ request i.e., in mmc_blk_cmdq_complete_rq(). Hence, the reference counter of clocks (host->clk_requests) never becomes 0, preventing the clocks from gating. However, the clocks are still turned off through other power management features such as runtime/system suspend. Change-Id: I0032861b1e5218bdf3c5bed664869c708ce50148 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
* | | | mmc: core: postpone runtime suspend in case BKOPS is requiredKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices require long BKOPs time in order to provide high performance. In the current solution, the host disables auto BKOPs or stops manual BKOPs in runtime suspend, regardless of the device need for BKOPs. This patch adds a check for device BKOPs status and defers suspend in case when BKOPs need. CRs-Fixed: 979630 Change-Id: Ib38d1ce58e4195d4969e9a367b5738c8e598d0ba Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org> [subhashj@codeaurora.org: fixed merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: core: update AUTO_EN in BKOPS_EN field on runtime resumeKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On runtime suspend flow, AUTO_EN must be turned off (see eMMC 5.1 specification 6.6.28). During runtime resume, it should be restored again. When partial card initialization flow is used on runtime resume (instead of full card initialization), this flow should restore AUTO_EN bit if needed. CRs-Fixed: 979630 Change-Id: I4ac3b7c45fdba36d014f4c88cb704bbf36011d59 Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
* | | | mmc: revert runtime idle stateKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the runtime idle state. It was introduced by 217cf95511d23f703d0e7e597d3132739739654b Instead of checking BKOPS logic in the runtime idle state, all relevant logic should be performed in runtime suspend callback. CRs-Fixed: 979630 Change-Id: Iaf0d8326c0e3fd6507b075339f2cc87ae1bdf6b2 Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: host: Set max frequency when disabling clock scalingVenkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmc host needs to perform at its peak when clock scaling is disabled, hence switch the frequency to max. CRs-fixed: 981387 Change-Id: Ie959b8e565ee2dad53cdd9d913bcb8696519d7ca Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
* | | | mmc: queue: Fix queue_lock spinlock bug from CMDQ shutdown pathRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CMDQ shutdown path calls blk_cleanup_queue, which changes queue_lock from driver lock to it's original request_queue lock. Hence during above shutdown process if below sequence is exercised as well then may see below spinlock bug. a) Some process say iozoneA has already acquired queue_lock (which is md->lock). b) adb reboot has been issued and CMDQ driver has completed calling blk_cleanup_queue which switches the queue_lock from md->lock to q->__queue_lock. c) ProcessA tries to release queue_lock but finds an unbalance that the lock is already released Hence remove blk_cleanup_queue and instead make sure there are no active_reqs in flight by mmccmdqd before this kthread is exited. Callstack: <6> BUG: spinlock already unlocked on CPU#6, iozone/4391 <6> lock: 0xffffffc06ab8be80, .magic: dead4ead, .owner: <none>/-1, .owner_cpu: -1 [ffffffc0420e3b28] __delay at ffffffc00031a328 [ffffffc0420e3b38] __const_udelay at ffffffc00031a304 [ffffffc0420e3b58] msm_trigger_wdog_bite at ffffffc0004476cc [ffffffc0420e3b68] spin_bug at ffffffc0000e4554 [ffffffc0420e3b98] do_raw_spin_unlock at ffffffc0000e47a0 [ffffffc0420e3bc8] _raw_spin_unlock_irq at ffffffc000db3ee0 [ffffffc0420e3be8] blk_queue_bio at ffffffc0002ff1e4 [ffffffc0420e3bf8] generic_make_request at ffffffc0002fd210 [ffffffc0420e3c58] submit_bio at ffffffc0002fd328 [ffffffc0420e3ca8] submit_bio_wait at ffffffc0002f5768 [ffffffc0420e3d00] compat_sys_call_table at ffffffc00008e000 [ffffffc0420e3d18] submit_bio_wait at ffffffc0002f574c [ffffffc0420e3d38] __blkdev_issue_flush at ffffffc00030043c [ffffffc0420e3da8] blkdev_issue_flush at ffffffc000300494 [ffffffc0420e3dd8] ext4_sync_fs at ffffffc0002597a4 CRs-fixed: 953541 Change-Id: I769cc25c14b6d873f64a898d6b73f33cc59d9c5d Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: core: fix issue with devfreq clock scalingSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to recent DDR52 lower bus speed mode in clock scaling, there is a mismatch between the clock frequencies used by the devfreq framework and the MMC driver. Due to this, SDCC clock is sometimes running at DDR25 and ICE clock is running at 100MHz causing the power regression. Fix this mismatch by initializing the frequencies properly during MMC resume based on the current ios.clock. CRs-Fixed: 974940 Change-Id: I09fe888d0fbd1fde3f6a6f32806315ddbb5bf6e1 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
* | | | mmc: core: set REL_WR_SEC_C register to 0x1 per eMMC5.0 specxiaonian2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some eMMC vendors violate eMMC 5.0 spec and set REL_WR_SEC_C register to 0x10 to indicate the ability of RPMB throughput improvement thus lead to failure when TZ module write data to RPMB partition. This change will check bit[4] of EXT_CSD[166] and if it is not set then change value of REL_WR_SEC_C to 0x1 directly ignoring value of EXT_CSD[222]. CRs-Fixed: 866059 Change-Id: Ibd12c94ad691eca1fa3ea2049b750a6e98178678 Signed-off-by: xiaonian <xiaonian@codeaurora.org> Signed-off-by: Pavan Anamula <pavana@codeaurora.org>
* | | | mmc: card: set dma_mask as the queue bounce limitSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some controllers doesn't have any limitation on the memory it can address. Hence, the bounce limit parameter must be taken based on the device dma_mask. Currently it is set to BLK_BOUNCE_HIGH, which may cause bouncing of memory higher than this limit. Use dma_mask as the limit for queue bounce parameter to avoid this unncessary memory bouncing in the block layer. CRs-Fixed: 964435 Change-Id: I0955438a540ca9adf5bcd3a0dbf9201a5ef456a5 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
* | | | mmc: sdhci-msm: Fix recursive tuning issueSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For any commands, that are sent during tuning sequence CRC errors are expected. But if SDHCI_NEEDS_RETUNING flag is set, then it will recursively do the tuning and gets stuck in tuning. Fix this by not allowing the re-tuning to happen while it is already in tuning process. Change-Id: I9cc39f03a01c34f2f5639d4c20776fd575c25231 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
* | | | mmc: queue: Don't peek requests when queue is stoppedVenkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure we don't peek the block layer queue and act on it when block queue is stopped. The block queue will be stopped when mmc block is suspended, wait till it is properly resumed before pulling new requests. Change-Id: Ifc369687c13dae904271e8f92d3604edbd667d82 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
* | | | mmc: sdhci-msm: Set sdio_pending_processing default state to falseSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It seems that when we are configuring sdiowakeup_irq, we are receiving a spurious interrupt which sets sdio_pending_processing state to true. Now, if the sdio card is physically connected but wifi not enabled in that case suspend functionality will be broken sdhci_msm_suspend_noirq will return -EBUSY if sdio_pending_processing is set to true. Thus fix it by setting this flag to false after we have disabled sdiowakeup_irq. CRs-Fixed: 957968 Change-Id: I755b0b5602345ad6bf557c6055b9057012de0797 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
* | | | mmc: cmdq_hci: Fix NULL pointer dereference crashRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a check on cmdq_host->ops to avoid NULL pointer dereference, if sdhci_dumpregs is called before initializing cmdq_host->ops structure. Change-Id: Idd1794e162c7a53cc63504e15e6e490481f104a3 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: sdhci: Fix timeout mdelay bug in sdhci_resetRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change mdelay to udelay to fix 100sec waiting timeout bug in sdhci_reset. sdhci_reset is intended to only wait for 100msec. Change-Id: I6b5c9b10daf7cd8a7faf16ac6bdb09c5079a39e9 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: sdhci-msm: Fix NULL pointer dereferenceRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If during early boot register dump is called, then there could be a NULL pointer dereference since mmc_host structure might not be populated with cq_host info. Thus fix this by using sdhci_host to get cq_host structure info in sdhci_msm_cmdq_dump_debug_ram. Change-Id: Ieaca7887001daabd4a6a0b05f7b0048dc11bbeee Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: cmdq_hci: Add atomic context support in certain cmdq APIsRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cmdq_halt and cmdq_disable gets called from cmdq_irq in case of error. Thus add cmdq_disable_nosync and unhalt support in cmdq_halt_poll which can be called from irq context. Change-Id: I172e0e29a5584f02dd96c8af5ea1b97dc8c46083 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: block: Do not call post_req in DCMD caseRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No need to call post_req if it's a DCMD request completion. Change-Id: Id11165967e316b1e556aaeb6d67bd18844cee6e1 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: core: Fix mmc_set_ios w.r.t. error handling sequenceRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of error, software may power cycle/reset both controller and card. Thus even if auto bkops is enabled, mmc_set_ios can be used to power-off/power-on. Fix this by removing this condition from mmc_set_ios. Change-Id: I88a610ecbcc4036ac8ba99bc54706243b40db391 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: block: cmdq discard should use softirq completion pathRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently cmdq discard requests are not using same softirq completion path as other cmdq request. So there is no way to detect any error and handle it in case of error of DCMD requests. Make cmdq discard requests use blk_complete_requests which complete via softirq completion path. Change-Id: I1e03c81bc6fee8266cf1c86bada015e548770d7a Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: block: Error handling fixes and support of reset_allRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This does following: 1. Adds support to handle multiple cmdq software requests timeout. Currently we schedule error handling work for the first timedout request. We requeue all pending tasks, knock off all tasks from device queue and reset card and controller as part of this, then for all other software requests timeout, if it comes while executing error work, we return BLK_EH_NOT_HANDLED. This fixes BUG_ON in case of multiple requests timesout together. 2. Current code resets CQE, power cycle the card and requeue all the requests in case of any error. 3. mmc_blk_cmdq_err work takes care freeing up all resource allocation like clk and rpm hold, in case of reset_all. 4. Currently we were never clearing error CMDQ_STATE_ERR in case of any error. This patch takes care of this bug. Change-Id: I83d483c11fe2d7f2e462086cc3c0932057304c0d Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> [subhashj@codeaurora.org: fixed compilation error] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: core: cmdq helper for reset and claim host contextRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does following- This adds an API(mmc_cmdq_hw_reset), for RESET_ALL of SDHCI, power cycle mmc card and reintialize it, which enables cmdq as well(if supported). This acquires claim_host before calling mmc_power_restore. mmc_power_restore should be called with claim_host acquired, since this function is required from non-claim-host context in cmdq error handling. Change-Id: I31c4449dead1d4ad4e10a4822cce2298ec5fb4b6 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> [subhashj@codeaurora.org: fixed merge conflicts, dropped some changes related to mmc_do_hw_reset] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: core: Call cmdq_post_req with tag info instead of mrqRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Call mmc_/cmdq_post_req with tag number instead of mrq. This is needed in error handling as part of multiple request error handling. Change-Id: I175432639d28378ec74669e31deb4d1667c49bb8 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: cmdq_hci: Add CQE WA for CQE HW bugsRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds WA to handle few CQE error which can cause HALT to fail or can give CQTERRI info as NULL. Like - currently there is a HW bug that in case of ADMA error CQE will not stop and CQTERRI register will not be updated with any valid values. Halt will also most likely fail in case of ADMA error. Thus possible WA for this is to disable CQE, do reset_all and requeue all the requests in flight. Change-Id: I5aaddbb7bec1de7dbc959144dc2f1a5ad16789ff Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: queue: Check for CQE disable stateRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a check in mmc_cmdq_ready_wait to not pull any requests in case if CQE is disabled and card is not suspended. This means that CQE must be in error state and so mmc_cmdq_thread should stop issuing requests. Change-Id: I0c5e6556d3d881f1a675db4fff4f995de024ddf8 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: sdhci-msm: Fix wakeup functionality for SDIORitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There could be a case where after platform device (sdhci_msm) suspend, (where external gpio to IRQ is configured for wakeup in case of sdio) external gpioIRQ is raised before system suspend is completed. To solve this problem we use a flag to signal sdhci_msm_suspend_noirq to abort suspend with -EBUSY signal. Change-Id: I82617d5a02674af24d330601e41fb3c20278f672 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: block: Fix use after free issue with request pointerVenkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Accessing the request pointer after submitting the request could result in use after free as the request could be completed and freed by the time its accessed. Fix the usage appropriately. Kasan report: [ 55.025818] ================================================================== [ 55.032035] BUG: KASAN: use-after-free in mmc_blk_cmdq_issue_rq+0xd58/0xe20 at addr ffffffc04c5119ac [ 55.041134] Read of size 4 by task mmc-cmdqd/0/343 [ 55.045905] ============================================================================= [ 55.054069] BUG blkdev_requests (Tainted: G W ): kasan: bad access detected [ 55.061958] ----------------------------------------------------------------------------- [ 55.061958] [ 55.071609] INFO: Allocated in mempool_alloc_slab+0x18/0x20 age=2 cpu=1 pid=1105 [ 55.078975] alloc_debug_processing+0x118/0x170 [ 55.083491] __slab_alloc.isra.20.constprop.22+0x2a4/0x3a0 [ 55.088954] kmem_cache_alloc+0xb0/0x228 [ 55.092865] mempool_alloc_slab+0x14/0x20 [ 55.096853] mempool_alloc+0xdc/0x1ec [ 55.100507] get_request+0x3c4/0x838 [ 55.104060] blk_queue_bio+0x1f0/0x448 [ 55.107791] generic_make_request+0x13c/0x1bc [ 55.112136] submit_bio+0x154/0x2b4 [ 55.115606] mpage_bio_submit+0x3c/0x50 [ 55.119423] mpage_readpages+0x140/0x17c [ 55.123334] blkdev_readpages+0x1c/0x28 [ 55.127153] __do_page_cache_readahead+0x218/0x2ec [ 55.131930] ondemand_readahead+0x2cc/0x2f0 [ 55.136091] page_cache_sync_readahead+0x7c/0x94 [ 55.140697] ext4_readdir+0xb34/0xb78 [ 55.144347] INFO: Freed in mempool_free_slab+0x18/0x20 age=12 cpu=0 pid=603 [ 55.151287] free_debug_processing+0x240/0x2f0 [ 55.155709] __slab_free+0x44/0x374 [ 55.159179] kmem_cache_free+0x1d8/0x264 [ 55.163092] mempool_free_slab+0x14/0x20 [ 55.166991] mempool_free+0xd0/0xec [ 55.170468] __blk_put_request+0x168/0x1ac [ 55.174546] blk_finish_request+0x110/0x124 [ 55.178713] blk_end_bidi_request+0x70/0xa0 [ 55.182880] blk_end_request+0xc/0x18 [ 55.186527] mmc_blk_cmdq_complete_rq+0x1fc/0x284 [ 55.191216] mmc_cmdq_softirq_done+0x38/0x48 [ 55.195467] blk_done_softirq+0x130/0x160 [ 55.199461] __do_softirq+0x280/0x528 [ 55.203105] irq_exit+0x9c/0x114 [ 55.206317] __handle_domain_irq+0xc4/0x110 [ 55.210486] gic_handle_irq+0x5c/0xd8 [ 55.214130] INFO: Slab 0xffffffba48c77b00 objects=25 used=1 fp=0xffffffc04c510798 flags=0x4080 [ 55.222723] INFO: Object 0xffffffc04c511950 @offset=6480 fp=0xffffffc0aed4e408 [ 55.222723] [ 55.231407] Bytes b4 ffffffc04c511940: 00 00 00 00 00 00 00 00 a8 9f ff ff 00 00 00 00 ................ [ 55.240870] Object ffffffc04c511950: 08 e4 d4 ae c0 ff ff ff 08 e4 d4 ae c0 ff ff ff ................ [ 55.250161] Object ffffffc04c511960: 5d a0 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 ]............... [ 55.259442] Object ffffffc04c511970: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ [ 55.268730] Object ffffffc04c511980: 00 39 6a 56 c0 ff ff ff 00 00 00 00 00 00 00 00 .9jV............ [ 55.278017] Object ffffffc04c511990: 00 00 41 24 01 00 00 00 01 00 00 00 00 00 00 00 ..A$............ [ 55.287306] Object ffffffc04c5119a0: 00 00 00 00 00 00 00 00 01 00 00 00 00 10 00 00 ................ [ 55.296595] Object ffffffc04c5119b0: 88 64 32 00 00 00 00 00 00 ea c2 b5 c0 ff ff ff .d2............. [ 55.305882] Object ffffffc04c5119c0: 00 ea c2 b5 c0 ff ff ff 00 00 00 00 00 00 00 00 ................ [ 55.315172] Object ffffffc04c5119d0: d8 75 c2 55 c0 ff ff ff 01 00 00 00 00 00 00 00 .u.U............ [ 55.324459] Object ffffffc04c5119e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ [ 55.333747] Object ffffffc04c5119f0: 00 8d fb 54 c0 ff ff ff 98 e3 d4 ae c0 ff ff ff ...T............ [ 55.343035] Object ffffffc04c511a00: 00 80 f7 b6 c0 ff ff ff 00 00 00 00 00 00 00 00 ................ [ 55.352323] Object ffffffc04c511a10: 40 53 e3 b6 c0 ff ff ff 80 0a 56 55 c0 ff ff ff @S........VU.... [ 55.361613] Object ffffffc04c511a20: 51 a0 ff ff 00 00 00 00 01 00 00 00 00 00 00 00 Q............... [ 55.370901] Object ffffffc04c511a30: 00 00 00 00 00 00 00 00 ff ff ff ff 00 00 00 00 ................ [ 55.380187] Object ffffffc04c511a40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ [ 55.389475] Object ffffffc04c511a50: 40 1a 51 4c c0 ff ff ff 10 00 00 00 00 00 00 00 @.QL............ [ 55.398764] Object ffffffc04c511a60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ [ 55.408053] Object ffffffc04c511a70: 00 00 00 00 00 00 00 00 78 1a 51 4c c0 ff ff ff ........x.QL.... [ 55.417342] Object ffffffc04c511a80: 78 1a 51 4c c0 ff ff ff 00 00 00 00 00 00 00 00 x.QL............ [ 55.426628] Object ffffffc04c511a90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ [ 55.435917] Object ffffffc04c511aa0: 00 00 00 00 00 00 00 00 ........ [ 55.444534] Call trace: [ 55.447073] Memory state around the buggy address: [ 55.451719] ffffffc04c511880: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc [ 55.458920] ffffffc04c511900: fc fc fc fc fc fc fc fc fc fc 00 00 00 00 00 00 [ 55.466126] >ffffffc04c511980: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 55.473328] ^ [ 55.477844] ffffffc04c511a00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 55.485050] ffffffc04c511a80: 00 00 00 00 00 fc fc fc fc fc fc fc fc fc fc fc Change-Id: I24fdca1b4562fd7c1f3a1584d1efccd94ed6698a Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
* | | | mmc: cmdq_hci: Helper API/info in cmdq for haltRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds following helper API/info - 1. cmdq_halt_poll to halt the controller using polling method. This is to be mainly used in case of an error from cmdq_irq context. 2. Adds num_cq_slots & dcmd_cq_slot info to mmc_host structure. This can be useful info for mmc host structure like in case of handling of multiple error requests 3. Adds CMDQ_STATE_CQ_DISABLE for cmdq host. In case of an error if halt also fails, CQE error handling code will disable CQ. So block layer needs to know - to not pull any requests in such case. Change-Id: I8e9a8d5094db82336917fcca4361ce84316c34ef Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> [subhashj@codeaurora.org: fixed merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: sdhci: Handle cmdq_irq before clearing error interrupt.Ritesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cmdq_irq should be handled before clearning error interrupt. Because in case of an error CQE needs to be halted/disabled in cmdq_irq, before we clear the error interrupt. Otherwise, CQE might start processing other requests whose doorbell is set, even in case of error in previous completed request. Change-Id: I8c77ca08dcf440293844120c1b59d2dada84bac5 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: sdhci: revert MMC_PM_KEEP_POWER changes related to emmcSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change reverts the following gerrits as they cause the timeout issues with Hynix cards. Also, the latest code supports sleep/awake through CMD5 and hence MMC_PM_KEEP_POWER need not be set for Hynix eMMC cards. edcf5be "mmc: host: add detect vops chain" 09287cb "mmc: sdhci-msm: configure MMC_PM_KEEP_POWER for SDIO" 7cf603a "mmc: schci: add support for MMC_PM_KEEP_POWER in eMMC" c085820 "mmc: core: set MMC_PM_KEEP_POWER for certain Hynix mmc cards" CRs-Fixed: 947299 Change-Id: If863771191ee7c2b717d5817f4a88e4ad936653a Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fixed merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: cmdq: decrease the QSR polling periodAsutosh Das2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Configure the controller to send the QSR at 1 clock period. This would send SQS(CMD13) when no data transfer is in progress. This decrease in the polling period increases the performance of the device. CRs-fixed: 891366 Change-Id: Ic2807c6334a778b5f0c89fb605c6923a44f7624a Signed-off-by: Asutosh Das <asutoshd@codeaurora.org> Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
* | | | mmc: core: resolve deadlock between devfreq update and suspend contextsKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When mmc request timeout occurs (eg. card is not responding), it is possible that devfreq update poll interval ended and devfreq update started. Update context takes devfreq lock and block on __mmc_claim_host(). Error handling flow (same context that executes mmc request) tries to suspend clock scaling, the flow is trying to take devfreq lock while holding (and not releasing) mmc host. Although it is incrementing devfreq_abort counter, but it is not enough to cause devfreq update context to release devfreq lock, because the context scheduled out from execution. This patch wakes up devfreq update context, it causes to break polling loop waiting for mmc host exclusive access (because devfreq_abourt countr > 0), so devfreq lock will be released and clock scaling may be successfully suspended. Change-Id: I3d1e7b38d7d281594b49d8452198ed4c1e550b73 Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
* | | | mmc: block: serialize the requests if we are scaled downSubhash Jadavani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When in SVS2 on low load scenario and there are lots of requests queued for CMDQ we need to wait till the queue is empty to scale back up to Nominal even if there is a sudden increase in load. This impacts performance where lots of IO get executed in SVS2 frequency since the queue is full. As SVS2 is a low load use case we can serialize the requests and not queue them in parallel without impacting other use cases. This makes sure the queue gets empty faster and we will be able to scale up to Nominal frequency when needed. Change-Id: Idbe7e939e01327061dfa5de93c0eaed59b910592 Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
* | | | mmc: block: Fix invalid data from freed request pointerRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we do blk_end_request, request pointer may get freed. Therefore cache request_queue pointer and tag value at start itself instead of dereferencing already freed request_queue pointer. Change-Id: I35def3ef6a260ebe78e92874ac121aca529f00cf Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: core: fix debugfs path to read ext_csdSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After reading ext_csd, the host is not claimed while doing unhalt if the card is in CQ mode. This may race with RPMB context which tries to halt and disable CQ in the card. This may unhalt the controller while RPMB is still going on, resulting in software request timeout for RPMB commands that are supposed to be sent in legacy mode with controller in halt state. Fix this by claiming the host till the unhalt is done in mmc_ext_csd_open() so as to prevent race with RPMB context. CRs-Fixed: 935719 Change-Id: I6d2738b21c3cd44c8fb6c99f63291059d5b18ee1 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: block: fix partition switch failure observed during shutdownSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If an RPMB request is the last request to be done before shutdown, then the card will be already switched to legacy mode as part of RPMB request handling. Later, in the shutdown handler, we get this error if we try to switch to legacy mode again. mmc0: failed to switch card to legacy mode: -74 CRs-Fixed: 935717 Change-Id: Ie75ba225412d0fecce9c98f07334b570a6cd5772 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
* | | | mmc: sdhci-msm: get lower bus speed mode for clock scalingSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lower bus speed mode to be used during clock scaling may vary based on the target. Hence, add a new dtsi property to define this bus speed mode. Change-Id: If8e2d125b8246ca479f816a475940bb357138297 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
* | | | mmc: core: support DDR52 bus-speed during eMMC clock scalingAsutosh Das2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for DDR52 bus-speed mode during clock scaling. The reason for this change is DDR52 can be supported at SVS mode. Change-Id: I68e5fca57ae5cbc154f5dd7001df368900cb3f57 Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
* | | | mmc: sdhci: delay the QoS vote removalAsutosh Das2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By delaying the QoS vote removal, there is some improvement in performance in single threaded use cases. Change-Id: I80545486057c55c697b72b56d57e2ea47cff86b9 Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
* | | | crypto: ice: general driver clean-upGilad Broner2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Removed spinlock as it was not locking against anything * Removed conversion of interrupt status to error number as it is not used by API client, and in case several bits are set only 1 error is ever handled and the rest get lost. Instead pass to the client the complete status. * Removed redundant includes, variables * vops structure is returned after performing a lookup in the DTS. There's no need for that as we already know the structure to return. * Other minor corrections Change-Id: I6d2549ce04c9e4b19fdd8fe3dfee03d83bfd9d77 Signed-off-by: Gilad Broner <gbroner@codeaurora.org> [subhashj@codeaurora.org: fixed merge conflicts, dropped ICE & UFS driver changes as they are already present] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: sdhci-msm: Add wakeup functionality support for sdioRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds external GPIO wakeup support to sdhci-msm driver for sdio cards. Change-Id: Ic3e280b975d293ea8adadadafecfa8115fe5f428 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
* | | | mmc: core: Remove disabling of clk-gating for sdio cardsRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This removes disabling of clock-gating for qca6574 & qca9377. Now since async card interrupt support for sdio card has been added(3c5351c0643a), re-enable clk-gating support for sdio cards. Change-Id: Ib497556f10c9c6576a3e0a3592f6755c8725370c Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: sdhci: Add asynchronous interrupt support for sdio cardsRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SD host controller have asynchronous interrupt support capability to detect card(sdio) interrupt even when clocks are gated(to save power). This patch add support and enable this capability/feature to of SD host controllers for sdio cards. Change-Id: Ic1945355a19ebfdb3bd000bf8138d8001cea53f6 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> [subhashj@codeaurora.org: fixed merge conflicts & compilatione error] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: sdhci-msm: Remove MMC_CAP2_ASYNC_SDIO_IRQ_4BIT_MODE capabilityRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This removes direct enabling of MMC_CAP2_ASYNC_SDIO_IRQ_4BIT_MODE capability from sdhci-msm driver. This capablity needs to be enabled based on reading HOST_CAPABILITIES register. Change-Id: I74c2877d5906ee9e2180fdb8d50167af6d03b3af Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: sdhci-msm: add support for fourth drive strengthTalel Shenhar2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds support for new drive strength. Before this change sdhci-msm supported only 3 types of drive strength, starting from eMMC version 5.0 there is additional drive strength. Change-Id: Ib0bf945560107ec732e7ffeb7653d271d8d91c2f Signed-off-by: Talel Shenhar <tatias@codeaurora.org> [subhashj@codeaurora.org: fixed minor merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: core: Make sure host is active before sending pon commandSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add mmc_get_card() to make sure host is resumed before sending pon command. Also, add mmc_put_card() after completing pon command so that it can release the host and also vote for runtime suspend. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Change-Id: I52f4d854388a608c6a09e55a693e3b36bd801fd8
* | | | mmc: block: workaround for timeout issue with some vendor devicesSubhash Jadavani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 66a7393a3ba9685d1eddfbce72e3ef8f4848f19f ("mmc: block: ensure CMDQ is empty before queuing cache flush") added a workaround for particular vendor's eMMC devices. Workaround was to wait for all the outstanding requests to finish up before queuing the flush request. Now detailed root cause analysis from vendor shows that original issue can happen only if DCMD command is sent to device too quickly (within less than 6 microseconds) after completion of previous small sector (less than 8 sectors) read operations. Hence with this change, we are fine tuning the previous workaround such that it would almost have no impact on the storage benchmark performance numbers. Change-Id: I1df1c5d7bbcd7b526236651077b7dade2626cb30 Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: core: kick cmdq thread after suspendSubhash Jadavani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eMMC runtime suspend first puts the CMDQ to halt and then sets the card state to suspended after sending out sleep command. If new requests get queued after halting the CMDQ but before the card state has changed to suspended then command queue thread will not be woken up again until some new requests are queued to request queue. And if new request gets queued, we will remain in this state forever. Fix this issue by kicking the CMDQ thread after the suspend completion. Change-Id: I37a03d9a75acf2ab3ebda57da87e246b449abf18 Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: sdhci: Panic after dumping SDHC registersVenkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eMMC CMDQ is pretty latest feature and we may continue to see issues due to HW & SW immaturity. To debug these issues, we should have the host controller register dumps along with current SW state from rampdumps. This change adds the BUG_ON to crash the system in case of eMMC related command timeouts. Change-Id: Ib832aef6eb9ef3941fbe9e73852929c835e97847 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: block: ensure CMDQ is empty before queuing cache flushSubhash Jadavani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices might stop responding to new commands if device cache flush is queued to host controller while host controller is still processing outstanding requests. To workaround this issue, we are making the cmdq thread to wait for all the oustanding requests to be finished before queuing cache flush command on host controller. Change-Id: I15387734f51ca4cadfc9e11270f14d8a0806a00f Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>