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| | * | | | drm/i915: Updating plane parameters for primary plane in setplaneSonika Jindal2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This unifies how the primary plane functions work with how the sprite functions works, which allows us to reuse them to update primary plane properties. v2: Moving setting of plane members in the end to take care of failure cases and not-visible cases (Matt). Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Acked-by: Matt Roper <matthew.d.roper@intel.com> [danvet: Add a real commit message.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * | | | drm/i915: Rework GPU reset sequence to match driver load & thawMcAulay, Alistair2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to address Daniels concerns over different code during reset: http://lists.freedesktop.org/archives/intel-gfx/2014-June/047758.html "The reason for aiming as hard as possible to use the exact same code for driver load, gpu reset and runtime pm/system resume is that we've simply seen too many bugs due to slight variations and unintended omissions." Tested using igt drv_hangman. V2: Cleaner way of preventing check_wedge returning -EAGAIN V3: Clean the last_context during reset, to ensure do_switch() does the MI_SET_CONTEXT. As per review. Signed-off-by: McAulay, Alistair <alistair.mcaulay@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> [danvet: Rebase over ctx->ppgtt rework and extend the comment in check_wedge a bit.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | Merge branch 'drm-next-ast-fixes' of ssh://people.freedesktop.org/~/linux ↵Dave Airlie2014-09-16
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next Pull in first set of changes from Ben for ast on ppc. I've done a quick boot test on x86 and it still seems to boot. * 'drm-next-ast-fixes' of ssh://people.freedesktop.org/~/linux: drm/ast: Cleanup analog init code path drm/ast: Don't assume DVO enabled means SIL164 on uninitialized chips drm/ast: Properly initialize P2A base before using it in ast_init_3rdtx() drm/ast: POST chip at probe time if VGA not enabled drm/ast: Try to use MMIO registers when PIO isn't supported
| | * | | | | drm/ast: Cleanup analog init code pathBenjamin Herrenschmidt2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the MMIO mangling to a separate routine and actually disable the DVO output when using pure analog. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| | * | | | | drm/ast: Don't assume DVO enabled means SIL164 on uninitialized chipsBenjamin Herrenschmidt2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It looks like the AST2400 comes up with the DVO enable bit set, which causes us to incorrectly assume we have a SIL164 regardless of the value of the scratch registers setup by the BMC firmware. So let's limit that test to the case where the chip has already been setup by a BIOS. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| | * | | | | drm/ast: Properly initialize P2A base before using it in ast_init_3rdtx()Benjamin Herrenschmidt2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the P2A has been used to target other SOC registers before that call, we're going to hit the wrong place so make sure we set the base address up properly before using it. (P2A stands for PCIe to AHB bridge and is the bride that allows accessing the AST's internal AHB bus using a relocatable 64k window in the second half of the PCIe MMIO BAR) Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| | * | | | | drm/ast: POST chip at probe time if VGA not enabledBenjamin Herrenschmidt2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to do it on machines without a BIOS such as POWER8. Also for detection to work without triggering PCIe errors, we need to enable VGA early on, inside ast_detect_chip(). While touching those files, replace a few hard coded register numbers with the corresponding symbolic constant. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| | * | | | | drm/ast: Try to use MMIO registers when PIO isn't supportedBenjamin Herrenschmidt2014-09-15
| | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the PIO resources haven't been assigned, then we have no choice but try to use the MMIO version. This is the case for example on POWER8 which doesn't support PIO at all. Chips rev 0x20 or later have MMIO decoding enabled by default. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | | | drm/ast: Add reduced blanking modes for wide screen modeY.C. Chen2014-09-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Egbert Eich <eich@suse.com> Tested-by: Steven You2 Liang <liangyou2@lenovo.com> Signed-off-by: Y.C. Chen <yc_chen@aspeedtech.com> v3: based on [PATCH 1/2] drm/ast: Add missing entry to dclk_table[]. Add reduced blanking modes, improve mode matching to identify these modes by thier sync polarities. [airlied: argh whitespace damage] Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | | | drm: backmerge tag 'v3.17-rc5' into drm-nextDave Airlie2014-09-16
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is requested to get the fixes for intel and radeon into the same tree for future development work. i915_display.c: fix missing dev_priv conflict.
| * \ \ \ \ \ Merge branch 'linux-3.18' of ↵Dave Airlie2014-09-16
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next This is the main merge request for Nouveau 3.18, overview: - various bits of roy's gt21x clock work - various bits of kepler memory clock work (don't get too excited, there's at least one more major bit left that's busting higher freqs) - misc fan control improvements - kepler hdmi infoframe fixes - dp audio - l2 cache + cbc improvements * 'linux-3.18' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (68 commits) drm/gt214-/disp: enable dp audio drm/gt214-/kms: fix hda eld regression drm/g94-/disp: calculate some dp audio constants drm/gt214-/kms: perform hda codec setup on displayport too drm/gk104-/disp: infoframe registers moved yet again on kepler drm/nouveau/bios: parse older ramcfg/timing data like we do newer ones drm/nva3/fb/ram: Per-partition regs drm/nouveau/fb/ram: Support strided regs drm/nv50/fb/ram: Store the number of partitions in the designated fields drm/nv50/kms: Set VBLANK time in modeset script drm/nouveau/bios: Add rammap support for version 1.0 drm/gf100-/pwr/memx: block host and fifo around reclock drm/nouveau/pwr/memx: fix command ordering around block/unblock drm/nouveau/pwr/memx: rename fb off/on to block/unblock drm/nva3/clk: Pause the GPU before reclocking drm/nouveau/gpio: rename g92 class to g94 drm/gk104-/fb/ram: move fb enable/disable to same place as nvidia drm/gk104/fb/ram: twiddle some more bits when reclocking drm/nouveau/bios: parse another large chunk of random memory config data drm/gk104-/fb/ram: perform certain steps only when bios data differs ...
| | * | | | | | drm/gt214-/disp: enable dp audioBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gt214-/kms: fix hda eld regressionBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/g94-/disp: calculate some dp audio constantsBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NVIDIA appear to have tweaked the algorithm from GF110, this implements the previous algorithm for them still. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gt214-/kms: perform hda codec setup on displayport tooBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gk104-/disp: infoframe registers moved yet again on keplerBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Thanks to Vincent Pelletier for pointing this out and providing a proof of concept patch on the list. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/bios: parse older ramcfg/timing data like we do newer onesBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Done after discussion with Roy. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nva3/fb/ram: Per-partition regsRoy Spliet2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/fb/ram: Support strided regsRoy Spliet2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nv50/fb/ram: Store the number of partitions in the designated fieldsRoy Spliet2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nv50/kms: Set VBLANK time in modeset scriptRoy Spliet2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Solves blinking on reclocking memory. The value set is an underestimate, but with non-reduced vblanking this should give us plenty of time Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/bios: Add rammap support for version 1.0Roy Spliet2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gf100-/pwr/memx: block host and fifo around reclockBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/pwr/memx: fix command ordering around block/unblockBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/pwr/memx: rename fb off/on to block/unblockBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | More accurate as to the function of the opcodes. Not only is FB disabled, but the host is prevented from touching the GPU. An upcoming patch for Kepler will also halt PFIFO (as NVIDIA does). Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nva3/clk: Pause the GPU before reclockingRoy Spliet2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V2: always call post correctly even if pre fails V3: move function prototype to nva3.h Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
| | * | | | | | drm/nouveau/gpio: rename g92 class to g94Emil Velikov2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nv92 hardware has only 16 interrupt lines, while nv94 and later has 32. Accessing 0xe0c{0,4} registers on nv92 can lead to incorrect PDISP setup. This is a regression introduced with commit 9d0f5ec9ee0fd5dc5fc1cc2cf559286431e406e3 Author: Ben Skeggs <bskeggs@redhat.com> Date: Mon May 12 15:22:42 2014 +1000 gpio: split g92 class from nv50 Reported-by: estece on #nouveau Cc: stable@vger.kernel.org # 3.16+ Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gk104-/fb/ram: move fb enable/disable to same place as nvidiaBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gk104/fb/ram: twiddle some more bits when reclockingBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | *when* this is done is only a rough approximation of what the binary driver does.. need to investigate more to see if it matters Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/bios: parse another large chunk of random memory config dataBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gk104-/fb/ram: perform certain steps only when bios data differsBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Awful, awful. But, on the GK106 I have, some upcoming patches show that this is actually necessary after all. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gk104-/fb/ram: parse ramcfg data for all frequencies up-frontBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gk104-/fb/ram: use parsed timing data in mr routinesBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the other chipsets should be moved over to this too. It's not needed yet for the upcoming commits, so left this step as it'll conflict badly with Roy's GT21x reclocking work. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/bios: parse freq ranges and timing id into ramcfg structBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/bios: memset dcb struct to zero before parsingBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes type/mask calculation being based on uninitialised data for VGA outputs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gk104/fb/ram: make use of training data provided by vbiosBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/bios: add support for parsing table at BIT 'M' v2 + 0x09Ben Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/bios: add support for parsing table at BIT 'M' v2 + 0x05Ben Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gk104/fb/ram: fix register for second set of training dataBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gk104/fb/ram: more random magic in fb initBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/gk104/fb/ram: skip table entry for mode we're already inBen Skeggs2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NVIDIA binary driver appears to, not sure if it's for a good reason, but grasping at straws for some GDDR5 reclocking issues here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/fb/sddr2: Generate MR valuesRoy Spliet2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V2: Always disable DLL reset Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/fb/sddr3: Expand MR generationRoy Spliet2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nva3/pwr/memx: Match blob's fb access behaviourRoy Spliet2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/pwr/memx: Return debugging informationRoy Spliet2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Time measured from disabling FB to re-enabling, PPWR_IN reveals status of heads at the end of script. Helps debug various issues (like flicker). Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/pwr/memx: Make FB disable and enable explicitRoy Spliet2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Needs to be done after wait-for-VBLANK, and NVA3 requires register writes in between. Rather than hard-coding register writes, just split out fb_disable and fb_enable. v2. Squashed "fb/ramnve0: disable fb before reclocking" Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nva3/pwr/memx: Implement "wait for VBLANK"Roy Spliet2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/therm/nv84+: do not expose non-calibrated internal temp sensorMartin Peres2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/therm: make sure the temperature settings are sane on nv84+Martin Peres2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of my nv92 has a calibrated internal sensor but it displays 0°C as the default values use sw calibration values to force the temperature to 0. Since we cannot read the temperature from the adt7473 present on this board, let's re-enable the internal reading! Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | | | | drm/nouveau/subdev: add a pfuse subdev v2Martin Peres2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We will use this subdev to disable temperature reading on cards that did not get a sensor calibration in the factory. v2: - rename "nouveau_fuse_rd32" to "gxXXX_fuse_rd32" as adviced by Christian Costa - fold the code a little as adviced by Emil Velikov Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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