summaryrefslogtreecommitdiff
path: root/drivers/gpu (follow)
Commit message (Collapse)AuthorAge
...
| | * | | | | | | | | drm/tegra: dsi: Implement host transfersThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for sending MIPI DSI command packets from the host to a peripheral. This is required for panels that need configuration before they accept video data. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: dsi: Add ganged mode supportThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement ganged mode support for the Tegra DSI driver. The DSI host controller to gang up with is specified via a phandle in the device tree and the resolved DSI host controller used for the programming of the ganged-mode registers. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: dsi: Split out tegra_dsi_set_timeout()Thierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for adding ganged-mode support, this commit splits out the tegra_dsi_set_timeout() function so that it can be reused for the slave DSI controller. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: dsi: Add command mode supportThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for DC-driven command mode. This is a mode where the video stream sent by the display controller is packed into DCS command packets (write_memory_start and write_memory_continue) by the DSI controller. It can be used for panels with a remote framebuffer and is useful to save power when used with a dynamic refresh rate (not yet supported by the driver). Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: dsi: Refactor in preparation for command modeThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For command mode panels, the DSI controller needs to be enabled and configured so that panel drivers can send commands prior to the video stream being enabled. Move code from the monolithic output enable/disable functions into smaller, reusable units to allow more fine-grained control over the controller state. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: dsi: Properly cleanup on probe failureThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver wasn't even attempting to do any cleanup when probing failed. Fix this by releasing any resources acquired up to the point of failure and putting the device back into the original state (reset, clocks off). Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: dsi: Mark connector hotpluggableThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DSI panels can always be hotplugged via the DSI bus' attach/detach infrastructure, so unconditionally mark the connector hotpluggable. While at it, also make sure that when a panel is detached the connector is marked unconnected before calling into the DRM hotplug helpers to reflect the correct state. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: dsi: Leave parent clock aloneThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The common clock framework will take care of preparing and enabling the parent of the DSI clock automatically. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: dsi: Do not manage clock on enable/disableThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for supporting command mode panels, don't disable the clock when the output is disabled. The output will be enabled only after the panel has been programmed in command mode, so the clock must always remain on. As a side-effect, pad calibration now only needs to be done at driver probe time, since neither power nor controller state will go away before driver removal. While at it, use a 32-bit variable to store register content because the registers are 32-bit even on 64-bit Tegra. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: dsi: Make FIFO depths host parametersThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than hardcoding them as macros, make the host and video FIFO depths parameters so that they can be more easily adjusted if a new generation of the Tegra SoC changes them. While at it, set the depth of the video FIFO to the correct value of 1920 *words* rather than *bytes*. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: DPMS off/on in encoder prepare/commitSean Paul2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously the panel and output were only enabled on encoder->dpms(). If userspace called dpms on before doing a modeset, the driver would get into a state where the connector had a dpms state of ON, but the encoder and output were not enabled (because the encoder is not yet attached to the connector). Subsequent dpms ON calls are ignored b/c the connector's state already matches the desired state. This patch enables/disables the panel and output on modeset as well, so we can catch the above case. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: Do not enable output on .mode_set()Thierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The output is already enabled in .dpms(), doing it in .mode_set() too can cause noticeable flicker. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: dc: Add powergate supportThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both display controllers are in their own power partition. Currently the driver relies on the assumption that these partitions are on (which is the hardware default). However some bootloaders may disable them, so the driver must make sure to turn them back on to avoid hangs. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 registerSean Paul2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During calibration, sets the "internal reference level for drive pull- down" to the value specified in the Tegra TRM. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | gpu: host1x: mipi: Calibrate clock lanesSean Paul2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Include the clock lanes when calibrating the MIPI PHY on Tegra124 compatible devices. Signed-off-by: Sean Paul <seanpaul@chromium.org> [treding@nvidia.com: bikeshedding] Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | gpu: host1x: mipi: Preserve the contents of MIPI_CAL_CTRLSean Paul2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By paving the CTRL reg value, the current code changes MIPI_CAL_PRESCALE ("Auto-cal calibration step prescale") from 1us to 0.1us (val=0). In the description for PHY's noise filter (MIPI_CAL_NOISE_FLT), the TRM states that if the value of the prescale is 0 (or 0.1us), the filter should be set between 2-5. However, the current code sets it to 0. For now, let's keep the prescale and filter values as-is, which is most likely the power-on-reset values of 0x2 and 0xa, respectively. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | gpu: host1x: mipi: Registers are 32 bits wideThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On 64-bit platforms an unsigned long would be 64 bit and cause unnecessary casting when being passed to writel() or returned from readl(). Make register values 32 bits wide to avoid that. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | gpu: host1x: Make gather offsets unsignedThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the u32 type for the offset in the host1x_job_gather structure for consistentcy with other structures. Negative offsets don't make sense in this context. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | gpu: host1x: Print address/offset pairs consistentlyThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Consistently use a format of %pad+%#x to print address/offset in debug messages. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | gpu: host1x: Fix typo in commentThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | gpu: host1x: Make mapped field of push buffers void *Thierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reduces the amount of casting that needs to be done to get rid of annoying warnings on 64-bit builds. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | gpu: host1x: Use struct host1x_bo pointers in tracesThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than cast to a u32 use the struct host1x_bo pointers directly. This avoid annoying warnings for 64-bit builds. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: Depend on COMMON_CLKThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The introduction of the COMPILE_TEST dependency in commit 158b50aefa14 (drm/tegra: Increase compile test coverage) removes the dependency on COMMON_CLK (implicitly selected via ARCH_TEGRA, ARCH_MULTI_V7 and ARCH_MULTIPLATFORM). Reported-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | | | | | | | | Merge tag 'drm/fixes/for-3.19-rc1' of ↵Dave Airlie2014-11-15
| |\ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~tagr/linux into drm-next drm: Miscellaneous fixes for v3.19-rc1 This is a small collection of fixes that I've been carrying around for a while now. Many of these have been posted and reviewed or acked. The few that haven't I deemed too trivial to bother. * tag 'drm/fixes/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux: video/hdmi: Relicense header under MIT license drm/gma500: mdfld: Reuse video/mipi_display.h drm: Make drm_mode_create_tv_properties() signature consistent drm: Implement drm_get_pci_dev() dummy for !PCI drm/prime: Use unsigned type for number of pages drm/gem: Fix typo in kerneldoc drm: Use const data when creating blob properties drm: Use size_t for blob property sizes
| | * | | | | | | | | | drm/gma500: mdfld: Reuse video/mipi_display.hThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GMA500 driver redefines many constants already found in the generic header. Replace uses of the custom defines by the standard ones and get rid of the duplicate defininitions. Acked-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm: Make drm_mode_create_tv_properties() signature consistentThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The prototype and the function implementation differ in their signature. Make them consistent and use an unsigned integer for the number of modes while at it. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/prime: Use unsigned type for number of pagesThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of pages can never be negative, so an unsigned type is enough. This also matches the type of the n_pages argument of the sg_alloc_table_from_pages() function. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/gem: Fix typo in kerneldocThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function being documented is drm_gem_object_handle_free(), not drm_gem_object_free(). Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm: Use const data when creating blob propertiesThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Creating a blob property will always copy the input data so the data that is passed in can be const. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm: Use size_t for blob property sizesThierry Reding2014-11-13
| | | |/ / / / / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | size_t is the standard type when dealing with sizes of all kinds. Use it consistently when instantiating DRM blob properties. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | | | | | | | | Merge tag 'drm/panel/for-3.19-rc1' of ↵Dave Airlie2014-11-15
| |\ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~tagr/linux into drm-next drm/panel: Changes for v3.19-rc1 This contains support for a couple of new panels, updates for some GPIO API changes and a bunch of updates to the MIPI DSI support that should make it easier to write panel drivers in the future. * tag 'drm/panel/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux: (31 commits) drm/panel: Add Sharp LQ101R1SX01 support drm/dsi: Do not require .owner field to be set drm/dsi: Resolve MIPI DSI device from phandle drm/dsi: Implement DCS set_{column,page}_address commands drm/dsi: Implement DCS {get,set}_pixel_format commands drm/dsi: Implement DCS get_power_mode command drm/dsi: Implement DCS soft_reset command drm/dsi: Implement DCS nop command drm/dsi: Add to DocBook documentation drm/dsi: Implement some standard DCS commands drm/dsi: Implement generic read and write commands drm/panel: s6e8aa0: Use standard MIPI DSI function drm/dsi: Add mipi_dsi_set_maximum_return_packet_size() helper drm/dsi: Constify mipi_dsi_msg drm/dsi: Make mipi_dsi_dcs_{read,write}() symmetrical drm/dsi: Add DSI transfer helper drm/dsi: Add message to packet translator drm/dsi: Introduce packet format helpers drm/panel: s6e8aa0: Fix build warnings on 64-bit drm/panel: ld9040: Fix build warnings on 64-bit ...
| | * | | | | | | | | | drm/panel: Add Sharp LQ101R1SX01 supportThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This panel requires dual-channel mode. The device accepts command-mode data on 8 lanes and will therefore need a dual-channel DSI controller. The two interfaces that make up this device need to be instantiated in the controllers that gang up to provide the dual-channel DSI host. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/dsi: Do not require .owner field to be setThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drivers now no longer need to set the .owner field. It will be automatically set at registration time. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/dsi: Resolve MIPI DSI device from phandleThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a function, of_find_mipi_dsi_device_by_node(), that can be used to resolve a phandle to a MIPI DSI device. Acked-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/dsi: Implement DCS set_{column,page}_address commandsThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide small convenience wrappers to set the column and page extents of the frame memory accessed by the host processors. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/dsi: Implement DCS {get,set}_pixel_format commandsThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide small convenience wrappers to query or set the pixel format used by the interface. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/dsi: Implement DCS get_power_mode commandThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a small convenience wrapper that transmits a DCS get_power_mode command. A set of bitmasks for the mode bits is also provided. Acked-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/dsi: Implement DCS soft_reset commandThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a small convenience wrapper that transmits a DCS soft_reset command. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/dsi: Implement DCS nop commandThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a small convenience wrapper that transmits a DCS nop command. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/dsi: Add to DocBook documentationThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Integrate the MIPI DSI helpers into DocBook and clean up various kerneldoc warnings. Also add a brief DOC section and clarify some aspects of the mipi_dsi_host struct's .transfer() operation. Acked-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/dsi: Implement some standard DCS commandsYoungJun Cho2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add helpers for the {enter,exit}_sleep_mode, set_display_{on,off} and set_tear_{on,off} DCS commands. Signed-off-by: YoungJun Cho <yj44.cho@samsung.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> [treding: kerneldoc and other minor cleanup] Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/dsi: Implement generic read and write commandsThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement generic read and write commands. Selection of the proper data type for packets is done automatically based on the number of parameters or payload length. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/panel: s6e8aa0: Use standard MIPI DSI functionThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the newly introduced mipi_dsi_set_maximum_return_packet_size() function to replace an open-coded version. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | drm/dsi: Add mipi_dsi_set_maximum_return_packet_size() helperYoungJun Cho2014-11-13
| | | |/ / / / / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function can be used to set the maximum return packet size for a MIPI DSI peripheral. Signed-off-by: YoungJun Cho <yj44.cho@samsung.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> [treding: endianess, kerneldoc, return value] Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/dsi: Constify mipi_dsi_msgThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct mipi_dsi_msg is a read-only structure, drivers should never need to modify it. Make this explicit by making all references to the struct const. Acked-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/dsi: Make mipi_dsi_dcs_{read,write}() symmetricalThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the mipi_dsi_dcs_write() function requires the DCS command byte to be embedded within the write buffer whereas mipi_dsi_dcs_read() has a separate parameter. Make them more symmetrical by adding an extra command parameter to mipi_dsi_dcs_write(). The S6E8AA0 driver relies on the old asymmetric API and there's concern that moving to the new API may be less efficient. Provide a new function with the old semantics for those cases and make the S6E8AA0 driver use it instead. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/dsi: Add DSI transfer helperThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A common pattern is starting to emerge for higher level transfer helpers. Create a new helper that encapsulates this pattern and avoids code duplication. Acked-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/dsi: Add message to packet translatorThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces a new function, mipi_dsi_create_packet(), which converts from a MIPI DSI message to a MIPI DSI packet. The MIPI DSI packet is as close to the protocol described in the DSI specification as possible and useful in drivers that need to write a DSI packet into a FIFO to send a message off to the peripheral. Suggested-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/dsi: Introduce packet format helpersThierry Reding2014-11-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add two helpers, mipi_dsi_packet_format_is_{short,long}(), that help in determining the format of a packet. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/panel: s6e8aa0: Fix build warnings on 64-bitThierry Reding2014-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The %* format specifier expects an integer, which works fine with size_t arguments on 32-bit because the types match. However on 64-bit, size_t is typedef'd to unsigned long and will cause a build warning. Signed-off-by: Thierry Reding <treding@nvidia.com>