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| | * | | drm/radeon/kms: add common dpm infrastructureAlex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the common dpm (dynamic power management) infrastructure: - dpm callbacks - dpm init/fini/suspend/resume - dpm power state selection No device specific code is enabled yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/kms: add new asic struct for rv6xx (v4)Alex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Has a different dpm controller than r600. v2: rebase on gpu reset changes v3: rebase on get_xclk changes v4: update rptr/wtpr callbacks Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/kms: add atom helper functions for dpm (v3)Alex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dpm needs access to atombios data and command tables for setup and calculation of a number of parameters. v2: endian fix v3: fix mc reg table bug Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: properly set up the RLC on ON/LN/TN (v3)Alex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is required for certain advanced functionality. v2: save/restore list takes dword offsets v3: rebase on gpu reset changes Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/kms: move ucode defines to a separate headerAlex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoids confusion and duplication. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: add support for thermal sensor on tnAlex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: make get_temperature functions a callbackAlex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/evergreen: add indirect register accessors for CG registersAlex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/kms: add accessors for RCU indirect spaceAlex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: add cik tile mode array queryAlex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: add radeon_asic struct for CIK (v12)Alex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: fix up for latest reset changes v3: use CP for pt updates for now v4: update for 2 level PTs v5: update for ib_parse removal v6: vm_flush api change v7: rebase v8: fix gfx ring function pointers v9: fix vm_set_page function params v10: update for compute changes v11: cleanup for release v12: update rptr/wptr callbacks Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/cik: add support for golden register initAlex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/cik: add support for compute interruptsAlex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: fix up ring functions for compute ringsAlex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The compute rings use RELEASE_MEM rather then EOP packets for writing fences and there is no SYNC_PFP_ME packet on the compute rings. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/cik: switch to type3 nop packet for compute rings (v2)Alex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Type 2 packets are deprecated on CIK MEC and we should use type 3 nop packets. Setting the count field to the max value (0x3fff) indicates that only one dword should be skipped like a type 2 packet. v2: add comment to code Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| | * | | drm/radeon/cik: Add support for compute queues (v4)Alex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On CIK, the compute rings work slightly differently than on previous asics, however the basic concepts are the same. The main differences: - New MEC engines for compute queues - Multiple queues per MEC: - CI/KB: 1 MEC, 4 pipes per MEC, 8 queues per pipe = 32 queues - KV: 2 MEC, 4 pipes per MEC, 8 queues per pipe = 64 queues - Queues can be allocated and scheduled by another queue - New doorbell aperture allows you to assign space in the aperture for the wptr which allows for userspace access to queues v2: add wptr shadow, fix eop setup v3: fix comment v4: switch to new callback method Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| | * | | drm/radeon: implement simple doorbell page allocatorAlex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The doorbell aperture is a PCI BAR whose pages can be mapped to compute resources for things like wptrs for userspace queues. This patch maps the BAR and sets up a simple allocator to allocate pages from the BAR. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: use callbacks for ring pointer handling (v3)Alex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add callbacks to the radeon_asic struct to handle rptr/wptr fetchs and wptr updates. We currently use one version for all rings, but this allows us to override with a ring specific versions. Needed for compute rings on CIK. v2: udpate as per Christian's comments v3: fix some rebase cruft Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/cik: add srbm_select functionAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allows us to select instanced registers based on: - ME (micro engine - Pipe - Queue - VMID Switch MC setup to use this new function. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: add UVD support for CIK (v3)Christian König2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: agd5f: fix clock dividers setup for bonaire v3: agd5f: rebase Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: update radeon_atom_get_clock_dividers for CIKAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CIK uses a slightly different variant of the table structs and params. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: update radeon_atom_get_clock_dividers() for SIAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SI uses v5 of the command table and uses a different table for memory PLLs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/cik: add pcie_port indirect register accessorsAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: add get_xclk() callback for CIKAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: add indirect register accessors for SMC registersAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: update CIK soft resetAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update to the newer programming model. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: add get_gpu_clock_counter() callback for cikAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Used for GPU clock counter snapshots. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: Update radeon_info_ioctl for CIK (v2)Alex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: rebase changes, fix a couple missed cases Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: add SS override support for KB/KVAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: use frac fb div on DCE8Alex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: Handle PPLL0 powerdown on DCE8Alex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only Bonaire has PPLL0. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: add support pll selection for DCE8 (v4)Alex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: make PPLL0 is available for non-DP on CI v3: rebase changes, update documentation v4: fix kabini Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: update DISPCLK programming for DCE8Alex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/atom: add support for new DVO tablesAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/atom: add DCE8 encoder supportAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/dce8: crtc_set_base updatesAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some new fields and DESKTOP_HEIGHT register moved. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/dce8: properly handle interlaced timingAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The register bits changed on DCE8 compared to previous families. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/cik: add hw cursor support (v2)Alex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CIK (DCE8) hw cursors are programmed the same as evergreen (DCE4) with the following caveats: - cursors are now 128x128 pixels - new alpha blend enable bit v2: rebase Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/dce8: add support for display watermark setupAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: update power state parsing for CIAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: handle the integrated thermal controller on CIAlex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No support for reading the temperature yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: atombios power table updates (v2)Alex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: further updates Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: upstream atombios.h updates (v2)Alex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: further updates Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: upstream ObjectID.h updates (v2)Alex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: further updates Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/cik: fill in startup/shutdown callbacks (v5)Alex Deucher2013-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: update to latest driver changes v3: properly tear down vm on suspend v4: fix up irq init ordering v5: remove outdated comment Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| | * | | drm/radeon/cik: add support for doing async VM pt updates (v5)Alex Deucher2013-06-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Async page table updates using the sDMA engine. sDMA has a special packet for updating entries for contiguous pages that reduces overhead. v2: add support for and use the CP for now. v3: update for 2 level PTs v4: rebase, fix DMA packet v5: switch to using an IB Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: implement async vm_flush for the sDMA (v6)Alex Deucher2013-06-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the page table base address and flush the VM TLB using the sDMA. V2: update for 2 level PTs V3: update vm flush V4: update SH_MEM* regs V5: switch back to old style VM TLB invalidate V6: fix packet formatting Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/cik: add support for sDMA dma engines (v8)Alex Deucher2013-06-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CIK has new asynchronous DMA engines called sDMA (system DMA). Each engine supports 1 ring buffer for kernel and gfx and 2 userspace queues for compute. TODO: fill in the compute setup. v2: update to the latest reset code v3: remove ib_parse v4: fix copy_dma() v5: drop WIP compute sDMA queues v6: rebase v7: endian fixes for IB v8: cleanup for release Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon/cik: log and handle VM page fault interruptsAlex Deucher2013-06-25
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/radeon: add support for interrupts on CIK (v5)Alex Deucher2013-06-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Todo: - handle interrupts for compute queues v2: add documentation v3: update to latest reset code v4: update to latest illegal CP handling v5: fix missing break in interrupt handler switch statement Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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